DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5, 7-8, 10-16 are rejected under 35 U.S.C. 103 as being unpatentable over Qu (US 2022/0278745) in view of Kurani (US 2019/0158268).
Regarding claim 1, Qu describes a vehicle (fig. 15 & para. 128, vehicle), comprising:
at least one short-range digital communication network interface (local-network interface) (para. 128 in view of para. 3, computer system 110 which is a digital computer having a network interface);
at least one hardware processor, connected to the local-network interface (fig. 4 processors 301-304 connected to system bus 402 + network interface 404 (local-network interface)), and configured for:
subject to failing to access a reliable time source:
receiving at least one local-time value from at least one other hardware processor by using the local-network interface to access the at least one other hardware processor to receive a local time value; and computing a semi-reliable local-time value using the at least one local-time value (fig. 3 & para. 157, where vehicle cannot obtain GNSS signal (reliable time source), its processors 301-304 maintain their operating time with each other (from at least other processor) via system bus 402 & by using/provided with the internal crystal oscillator (local time value)).
Qu fails to further explicitly describe:
in response to above failure, request for a verified local-time value:
executing at least one secure operation subject to an outcome of at least one test applied to the semi-reliable local-time value.
Kurani also describes timing provisions (para. 2, computer-based systems relying on accurate clock signals & timings), further describing:
in response to above failure, request for a verified local-time value:
executing at least one secure operation subject to an outcome of at least one test applied to the semi-reliable local-time value (fig. 5 & para. 61 & 64-66, for process of determining fault status, invoking (requesting) time correction application 172 to determine the success of reference-locking procedure (step 504). If not, it alerts time maintenance system 170 of a persistent time fault (step 505), which will loop back and run a time verification procedure (step 503) which with operational steps described in fig. 4 (secure operation from outcome of test applied to the local time reference 101 (value)).
It would have been obvious to one with ordinary skill in the art before the effective date of the claimed invention to specify that the failure of access the reliable time source in Qu to invoke/request for a verified local-time value by performing secure operation(s) based on 1+ tests applied to a local time reference as in Kurani.
The motivation for combining the teachings is that this provides an effective technique for analyzing & verifying time in machine-based systems (Kurani para. 6).
Regarding claim 2, Qu and Kurani combined describe:
wherein the local-network interface comprises at least one of:
a bus of the vehicle (Qu fig. 4, system bus 402).
Regarding claim 3, Qu and Kurani combined describe:
wherein the at least one other hardware processor comprises at least one vehicle hardware processor installed in the vehicle and connected to the at least one hardware processor via the local-network interface (Qu fig. 4, in the vehicle, the processors 301-304 are connected to another via system bus 402 (part of local-network interface)).
Regarding claim 4, Qu and Kurani combined describe:
wherein the at least one hardware processor comprises at least one device hardware processor installed in at least one other device connected to the at least one hardware processor via the local-network interface (Qu fig. 6B & para. 158, processor 301’ being the [device hardware] processor in the backup chip (other device) connected to processor 301 (hardware processor) via C interface (part of local-network interface). See also para. 234: parts may be distributed on plurality of network units).
Regarding claim 5, Qu and Kurani combined describe:
wherein the at least one other device comprises at least one of:
a maintenance device, connected to the vehicle for the purpose of performing at least one maintenance operation on the vehicle (Qu fig. 3 & para. 35, the backup chip 110’ (one other device) serves as a backup computer system / dual-chip system redundancy for switchover to maintain operation continuity (maintenance operation)).
Regarding claim 7, Qu and Kurani combined describe:
wherein the at least one other hardware processor retrieves the at least one local-time value from a local clock of the at least one other hardware processor (Qu fig. 3 or 5 & para. 157, [other] processors 302-304 may access the second clock module/RTC chip 306 (local clock) as internal clock (local-time) value if signal receiving module 308 fails to receive GNSS).
Regarding claim 8, Qu and Kurani combined describe:
wherein the at least one other hardware processor retrieves the at least one local-time value by accessing at least one other reliable time source (Qu fig. 3 or 5 & para. 157, [other] processors 302-304 may access the second clock module/RTC chip 306 (one other reliable time source) as internal clock (local-time) value if signal receiving module 308 fails to receive GNSS).
Regarding claim 10, Qu and Kurani combined describe:
wherein computing the semi-reliable local-time value comprises using an uptime value indicative of an amount of time since an initialization of the at least one hardware processor (Qu para. 147, after cold start (initialization of at least one hardware processor), a periodical adjustment time (uptime value) is used to periodically resynchronize RTC clock to GNSS source (indicating amount of time since initialization of hardware processor)).
Regarding claim 11, Qu and Kurani combined describe:
wherein computing the semi-reliable local-time value comprises accessing a monotonic counter of the vehicle (Kurani para. 50, precision reference of the time generated by local time reference 101 is measured by an incrementing buffer counting the time accurately (monotonic counter)).
Regarding claim 12, Qu and Kurani combined describe:
wherein applying the at least one test to the semi-reliable local-time value comprises comparing the semi-reliable local-time value to a timestamp value (Kurani para. 51 or 53, time monitoring application 171 compares current time generated by local time reference 101 (semi-reliable local time value) to a known time reference (timestamp value)).
Regarding claim 13, Qu and Kurani combined describe:
wherein the at least one hardware processor is further configured for updating the timestamp value with the semi-reliable local-time value (Qu para. 147, a periodical adjustment time (updating timestamp value) is used to periodically resynchronize RTC clock (semi-reliable local time value to GNSS source)).
Regarding claim 14, Qu and Kurani combined describe:
wherein the at least one hardware processor is further configured for resetting at least one timer of the at least one hardware processor (Qu para. 147, a periodical adjustment time (resetting [periodic] timer) is used to periodically resynchronize RTC clock (semi-reliable local time value to GNSS source)).
Regarding claim 15, Qu and Kurani combined describe:
wherein executing the at least one secure operation comprises providing the semi-reliable local-time value to at least one additional hardware processor (Qu fig. 3 & para. 157, where vehicle cannot obtain GNSS signal (reliable time source), its processors 301-304 maintain their operating time with each other (from at least other processor) via system bus 402 & by using/provided with the internal crystal oscillator (local time value)).
Regarding claim 16, Qu and Kurani combined describe:
wherein the at least one secure operation comprises at least one of: scheduling downloading a digital file; sending a plurality of statistical values to at least one remote hardware processor (Kurani fig. 2 & para. 41, time monitoring application 171 updates a user interface of the current fault status (sending plurality of statistical values to one remote processor).
Claim 17 is a method claim comprising feature steps found in apparatus claim 1. Hence, it is rejected under the same rationale.
Claim 18 is a software program produce claim comprising feature steps found in apparatus claim 1. Since Qu already describe implementation in software (para. 89), it is rejected under the same rationale.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Qu in view of Kurani as applied to claim 1 above, and further in view of Yu (US 2024/0292358).
Regarding claim 6, Qu and Kurani fail to further explicitly describe:
wherein the at least one hardware processor is further configured for sending the at least one other hardware processor a request for the at least one local-time value.
Yu also describes transmission of timings (fig. 5), further describing:
wherein the at least one hardware processor is further configured for sending the at least one other hardware processor a request for the at least one local-time value (fig. 5 & para. 394-398, first node comprising processor triggers a first timing request to second & third nodes N02 & N03, each node also comprises processor, and receive a timing signaling response, where N02 & N03 are collocated).
It would have been obvious to one with ordinary skill in the art before the effective date of the claimed invention to specify that the hardware processors in Qu and Kurani to send to other hardware processors as in Yu.
The motivation for combining the teachings is that this enhances the procurement of transmission timing (Yu para. 4).
Allowable Subject Matter
Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 9, the prior art fails to further explicitly describe:
wherein computing the semi-reliable local-time value comprises:
computing a set of similar local-time values selected from the at least one local-time value, such that a difference between each two of the set of similar local-time values is less than a similarity threshold value; and
identifying that a relation between an amount of similar values of the set of similar local-time values and an amount of values in the at least one local-time value exceeds a confidence value.
The closest prior art, Qu describing evaluation of difference of time provided by master SoC and time provide by backup SoC’s timing to be within a acceptable range (para. 158), or Bernier (US 6,754,171) describing external primary clock source failure lead to use of internal clock source (abstract), in combination with Kurani, fail to render the above additional features obvious.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Geoffrey (US20050071703) describing fault-tolerant Clock Synchronization (title & abstract), Chu (CN 2022/11617621) describing fault-tolerant mechanism in the embedded system as the main clock node, taking the rest node in the embedded system as the backup main clock node; communicating the main clock node and the backup main clock node through a TTP bus; correcting the local clock of each node by the distributed clock synchronization method, Cherukuri (US 7,362,739) describing alternate clock lane used upon clock failure (title & fig. 3), and Johnson (US 4472714) describing clock synchronization by local clock for control of automobile traffic signal system when AC is absent & cannot be used as clock source (col. 1 lines 45-52).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WARNER WONG whose telephone number is (571)272-8197. The examiner can normally be reached M-F 7am - 3:30pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ian Moore can be reached at 571-272-3085. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
WARNER WONG
Primary Examiner
Art Unit 2469
/WARNER WONG/Primary Examiner, Art Unit 2469