Prosecution Insights
Last updated: July 17, 2026
Application No. 18/606,982

RF CIRCUIT SUPPORTING PREDISTORTION AND METHOD OF OPERATING THE SAME

Non-Final OA §103
Filed
Mar 15, 2024
Priority
Apr 25, 2023 — RE 10-2023-0054359 +1 more
Examiner
CHEN, ZHITONG
Art Unit
2649
Tech Center
2600 — Communications
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
4m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
457 granted / 600 resolved
+14.2% vs TC avg
Strong +20% interview lift
Without
With
+20.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
44 currently pending
Career history
640
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
97.8%
+57.8% vs TC avg
§102
1.0%
-39.0% vs TC avg
§112
0.5%
-39.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 600 resolved cases

Office Action

§103
CTNF 18/606,982 CTNF 91509 DETAILED ACTION 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103, which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over US 20050231279 A1 (Moffatt), in view of Gilabert, P., Montoro, G. and Bertran, E., 2005, December. On the Wiener and Hammerstein models for power amplifier predistortion. In 2005 Asia-Pacific Microwave Conference Proceedings (Vol. 2, pp. 4-pp). IEEE (Gilabert) and in further view of Ding, L., 2004. Digital Predistortion of Power Amplifiers for Wireless Applications (Doctoral dissertation, Georgia Institute of Technology) and US 8995572 B1 (Wu) . Regarding Claims 1 , 10 and 17: A radio-frequency (RF) circuit comprising: a power amplifier; a predistortion circuit configured to predistort an input signal based on reference predistortion information to obtain a predistortion signal, and output the predistortion signal to the power amplifier; and a gain circuit configured to provide a gain, corresponding to a reciprocal of a nonlinear coefficient of the power amplifier, to the predistortion circuit (Moffatt: Figs. 1 and 9a-c, a RF Power Amplifier (PA) with digital predistorter (PD); various PD implementations in Figs. 9a-c; par. 79-83, “The exemplary predistorter 950 uses an NLG pre-multiplier 955 and an NLG post-divider 965. The magnitude corrected voltage is obtained at the output of an adder 970. The alternate predistorter architecture 950 accommodates variations in gain anywhere around the entire feedback loop…” (i.e., mathematically identical to applying a reciprocal gain); Claim 22, “……a divider for dividing said input signal by said non-linear gain parameter”; Gilabert further proves in Section II, PD requires an inverse PA model in indirect learning, and a good model to train PD coefficients in direct learning; III. using either Hammerstein or Wiener models for model PA and PD, which both models are memoryless; Furthermore, Ding: 2.3, using Wiener-Hammerstein cascade model for PD, and 3.-4., for more specific implementations ). It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify Moffatt with PD model implementations as further taught by Gilabert and Ding. The advantage of doing so is to provide a better model to model PA nonlinear behavior for linearization and operation speed (Gilabert: Abstract). Moffett does not teach explicitly on setting an index m of reference predistortion information, wherein m is a positive integer. However, Wu teaches: (Wu: Col. 10 line 28 – Col. 11 line 36; dividing aligned data into N segments and determining coefficients for specific segments ). It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify Moffatt with setting an index m of reference predistortion information, wherein m is a positive integer as further taught by Wu. The advantage of doing so is to provide a proven method to minimize error, and optimal algorithms, LMS and RLS to estimate PD parameters. Regarding Claims 2 , 11, Moffatt as modified further teaches: The RF circuit of claim 1, wherein the nonlinear coefficient comprises a first nonlinear coefficient corresponding to an input terminal of the power amplifier, and a second nonlinear coefficient corresponding to an output terminal of the power amplifier (Moffatt: e.g., par. 82, “ The exemplary predistorter 975 uses an NLG pre-multiplier 980 and an NLG post-divider 990, in a similar manner to FIG. 9B. The output of the NLG pre-multiplier 980 is applied to the AM/AM characteristic correction table 1010 in a manner described further below in conjunction with FIG. 10A, to generate a magnitude corrected voltage that is applied to the NLG post-divider 990 ”, where applying a pre-multiplier and a post-divider to a reference model renders the reciprocal of 1 st and/or 2 nd coefficients ). Regarding Claims 3 , 12 and 18, Moffatt as modified further teaches: The RF circuit of claim 2, wherein the gain circuit comprises: a first gain circuit configured to provide a first gain, corresponding to a reciprocal of the second nonlinear coefficient, to an input terminal of the predistortion circuit; and a second gain circuit configured to provide a second gain, corresponding to a reciprocal of the first nonlinear coefficient, to an output terminal of the predistortion circuit (Moffatt: e.g., par. 82, “ The exemplary predistorter 975 uses an NLG pre-multiplier 980 and an NLG post-divider 990, in a similar manner to FIG. 9B. The output of the NLG pre-multiplier 980 is applied to the AM/AM characteristic correction table 1010 in a manner described further below in conjunction with FIG. 10A, to generate a magnitude corrected voltage that is applied to the NLG post-divider 990 ”, where applying a pre-multiplier and a post-divider to a reference model renders the reciprocal of 1 st and/or 2 nd coefficients ). Regarding Claim 4 , Moffatt as modified further teaches: The RF circuit of claim 3, wherein the first gain circuit is configured to output the input signal, multiplied by the first gain, to the predistortion circuit, and wherein the second gain circuit is configured to output the predistortion signal, multiplied by the second gain, to the power amplifier (Moffatt: e.g., par. 82, “ The exemplary predistorter 975 uses an NLG pre-multiplier 980 and an NLG post-divider 990, in a similar manner to FIG. 9B. The output of the NLG pre-multiplier 980 is applied to the AM/AM characteristic correction table 1010 in a manner described further below in conjunction with FIG. 10A, to generate a magnitude corrected voltage that is applied to the NLG post-divider 990 ”, where applying a pre-multiplier and a post-divider to a reference model renders the reciprocal of 1 st and/or 2 nd coefficients ). Regarding Claims 5 , 13 and 19, Moffatt as modified further teaches: The RF circuit of claim 2, wherein the predistortion circuit is configured to estimate the nonlinear coefficient based on reduction of a first error defined based on a reference model corresponding to the power amplifier, a first output signal output from the power amplifier, and the nonlinear coefficient (Moffatt: e.g., par. 72, “ The NLG adaptive loop, shown in FIG. 8, is designed so that, at higher levels of Vin, the squared difference between Vin and Vfb (i.e., the error signal) is minimized ”; Wu: e.g., Fig. 6 and Col 8 line 1 – Col. 9 line 46, using a least mean squares techniques to estimate PD parameter values……to minimize the normalized error between the reference and the PA output ). Regarding Claims 6 , 20, Moffatt as modified further teaches: The RF circuit of claim 5, wherein the first error is a normalized mean square error (NMSE) between a second output signal and the first output signal, and wherein the second output signal is output while the first nonlinear coefficient and the second nonlinear coefficient are applied to the reference model (Moffatt: e.g., par. 72, “ The NLG adaptive loop, shown in FIG. 8, is designed so that, at higher levels of Vin, the squared difference between Vin and Vfb (i.e., the error signal) is minimized ”; Wu: e.g., Fig. 6 and Col 8 line 1 – Col. 9 line 46, using a least mean squares techniques to estimate PD parameter values……to minimize the normalized error between the reference and the PA output ). Regarding Claim 7 , Moffatt as modified further teaches: The RF circuit of claim 6, wherein the predistortion circuit is configured to estimate a second error based on a difference between the first output signal and a third output signal, and wherein the third output signal is an output of the reference model (Moffatt: e.g., par. 72, “ The NLG adaptive loop, shown in FIG. 8, is designed so that, at higher levels of Vin, the squared difference between Vin and Vfb (i.e., the error signal) is minimized ”; Wu: e.g., Fig. 6 and Col 8 line 1 – Col. 9 line 46, using a least mean squares techniques to estimate PD parameter values……to minimize the normalized error between the reference and the PA output ). Regarding Claim 8 , Moffatt as modified further teaches: The RF circuit of claim 7, wherein the predistortion circuit is configured to predistort the input signal based on the first error being smaller than the second error weighted by an error weight (Moffatt: par. 76-77, to minimize interactions, the NLG is adapted only when Vin is great than 0.56 volts and predistorter 900 is compensating compression; adaptation is not performed for input values, Vin, below 0.05; Wu: Col. 8 line 45 – Col. 9 line 32 ; arranging sample pairs can include selecting transmit samples that meet or exceed a threshold parameter (e.g., a voltage threshold parameter) based on a noise floor; performing the extrapolation with respect to a threshold parameter, and switch to a different parameter estimation model when the signal crossed the threshold boundary ). Regarding Claim 9 , Moffatt as modified further teaches: The RF circuit of claim 7, wherein the predistortion circuit is configured to redefine the reference predistortion information and the reference model based on the first error being greater than the second error weighted by an error weight (Moffatt: par. 76-77, to minimize interactions, the NLG is adapted only when Vin is great than 0.56 volts and predistorter 900 is compensating compression; adaptation is not performed for input values, Vin, below 0.05; Wu: Col. 8 line 45 – Col. 9 line 32 ; arranging sample pairs can include selecting transmit samples that meet or exceed a threshold parameter (e.g., a voltage threshold parameter) based on a noise floor; performing the extrapolation with respect to a threshold parameter, and switch to a different parameter estimation model when the signal crossed the threshold boundary ). Regarding Claims 14-16, all limitations are taught by Claims 6-9. Therefore, Claims 14-16 is rejected for the same reasons as Claims 6-9. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZHITONG CHEN whose telephone number is (571) 270-1936. The examiner can normally be reached on M-F 9:30am - 5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, Applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yuwen Pan can be reached on 571-272-7855. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ZHITONG CHEN/ Primary Examiner, Art Unit 2649 Application/Control Number: 18/606,982 Page 2 Art Unit: 2649 Application/Control Number: 18/606,982 Page 3 Art Unit: 2649 Application/Control Number: 18/606,982 Page 4 Art Unit: 2649 Application/Control Number: 18/606,982 Page 5 Art Unit: 2649 Application/Control Number: 18/606,982 Page 6 Art Unit: 2649 Application/Control Number: 18/606,982 Page 7 Art Unit: 2649 Application/Control Number: 18/606,982 Page 8 Art Unit: 2649 Application/Control Number: 18/606,982 Page 9 Art Unit: 2649
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Prosecution Timeline

Mar 15, 2024
Application Filed
Jun 17, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
96%
With Interview (+20.1%)
2y 8m (~4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 600 resolved cases by this examiner. Grant probability derived from career allowance rate.

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