DETAILED ACTION
Summary
This Office Action is in response to the Amendments to the Claims and Remarks filed April 20, 2026.
In view of the Amendments to the Claims filed April 20, 2026, the restriction requirement sent February 18, 2026 has been withdrawn.
Claims 1-42 are currently pending.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-42 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation "the one or more PV substrings" on line 8. There is insufficient antecedent basis for this limitation in the claim.
Dependent claims are rejected for dependency.
Amending “the one or more PV substrings” to “the one or more corresponding PV substrings” would overcome the rejections.
Claims 3 and 4 recite the limitation "the positive and negative terminals" on line 3. There is insufficient antecedent basis for this limitation in the claims.
Amending “the positive and negative terminals” to “the positive and negative voltage terminals” would overcome the rejections.
Claim 22 recites the limitation "each substring" on line 3. There is insufficient antecedent basis for this limitation in the claim.
Dependent claims are rejected for dependency.
Amending “each substring” to “each PV substring” would overcome the rejections.
Claim 22 recites the limitation "the one or more PV substrings" on line 8-9. There is insufficient antecedent basis for this limitation in the claim.
Dependent claims are rejected for dependency.
Amending “the one or more PV substrings” to “the one or more corresponding PV substrings” would overcome the rejections.
Claims 24 and 25 recite the limitation "the positive and negative terminals" on line 2. There is insufficient antecedent basis for this limitation in the claims.
Amending “the positive and negative terminals” to “the positive and negative voltage terminals” would overcome the rejections.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-5, 7, 19, 21-26, 28, 40, and 42 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jergovic et al. (U.S. Pub. No. 2013/0106194 A1).
With regard to claim 1, Jergovic et al. discloses an apparatus comprising:
a plurality of photovoltaic (PV) substrings arranged on a backsheet (as depicted in Fig. 14, a plurality of photovoltaic (PV) substrings 352 arranged on a backsheet, such as the transparent substrate of PV panel 350; see [0009] teaching “The PV panel has a transparent substrate to which PV devices are mounted”), wherein each PV substring comprises:
positive and negative voltage terminals facing a midline of the backsheet (as depicted in Fig. 14, each PV substring 352 comprises positive and negative voltage terminals connected to PCBs 354/358 facing a vertical midline of the cited backsheet); and
a plurality of electrical circuits disposed substantially along the midline of the backsheet (as depicted in Fig. 14 and 15, a plurality of electrical circuits within PCBs 354/358 disposed substantially along the cited vertical midline of the cited backsheet), wherein
each of the plurality of electrical circuits is coupled to the positive and the negative voltage terminals of one or more corresponding PV substrings of the plurality of PV substrings and configured to convert voltage from the one or more PV substrings (as depicted in Fig. 14 and 15, each of the cited plurality of electrical circuits is coupled to the cited positive and the negative voltage terminals of one or more corresponding PV substrings 352 and configured to convert voltage from the one or more PV substrings 352 via DC/DC converters 376; see [0058]).
With regard to claim 2, Jergovic et al. discloses further comprising
a plurality of direct current to direct current (DC/DC) converters, wherein each of the plurality of electrical circuits comprises one of the DC/DC converters (as depicted in Fig. 14 and 15, a plurality of direct current to direct current (DC/DC) converters 376, wherein each of the cited plurality of electrical circuits within PCB’s 354/358 comprises one of the DC/DC converters 376).
With regard to claim 3, Jergovic et al. discloses wherein
each of the plurality of DC/DC converters comprises: input terminals coupled to the positive and negative terminals of one or more respective PV substrings of the plurality of PV substrings (as depicted in Fig. 14 and 15, each of the cited plurality of DC/DC converters 376 comprises input terminals coupled to the cited positive and negative terminals of one or more respective PV substrings 352; see [0058]); and
output terminals, wherein the output terminals of the plurality of DC/DC converters are coupled in series (as depicted in Fig. 14 and 15, each of the cited plurality of DC/DC converters 376 comprises output terminals, wherein the output terminals of the plurality of DC/DC converters 376 are coupled in series; see [0057-0058] teaching “the DC-DC converters of PCBs of the embodiment of FIG. 14 may be coupled together in series”).
With regard to claim 4, Jergovic et al. discloses wherein
each of the plurality of DC/DC converters comprises: input terminals coupled to the positive and negative terminals of one or more respective PV substrings of the plurality of PV substrings (as depicted in Fig. 14 and 15, each of the cited plurality of DC/DC converters 376 comprises input terminals coupled to the cited positive and negative terminals of one or more respective PV substrings 352; see [0058]); and
output terminals, wherein the output terminals of the plurality of DC/DC converters are coupled in parallel (as depicted in Fig. 14 and 15, each of the cited plurality of DC/DC converters 376 comprises output terminals, wherein the output terminals of the plurality of DC/DC converters 376 are coupled in parallel; see [0057-0058] teaching “the DC-DC converters of PCBs of the embodiment of FIG. 14… may be coupled together in parallel”).
With regard to claim 5, Jergovic et al. discloses wherein
the plurality of PV substrings comprises six PV substrings (as depicted in Fig. 14, the plurality of PV substrings comprises six PV substrings 352),
a first three substrings on a first side of the midline (such as depicted in Fig. 14, a first three lower substrings 352 on a first left side of the cited vertical midline) and
a second three substrings on a second side of the midline (such as depicted in Fig. 14, a second three lower substrings 352 on a second right side of the cited vertical midline).
With regard to claim 7, Jergovic et al. discloses wherein
the plurality of PV substrings comprises six PV substrings (as depicted in Fig. 14, the plurality of PV substrings comprises six PV substrings 352), wherein
the plurality of DC/DC converters comprises six DC/DC converters (as depicted in Fig. 14 and 15, the plurality of DC/DC converters comprises six DC/DC converters 376, one in each cited PCBs 358),
each coupled to and configured to maximum-power-point-track a corresponding one of the six PV substrings (as depicted in Fig. 14 and 15 and described in the Abstract, each cited DC/DC converter 376 coupled to and configured to MPPT a corresponding one of the six PV substrings 352).
With regard to claim 19, Jergovic et al. discloses wherein
each of the plurality of electrical circuits is further configured to maximum-power-point track the one or more corresponding PV substrings (as depicted in Fig. 14 and 15 and described in the Abstract, each cited DC/DC converter 376 configured to MPPT the one or more corresponding PV substrings 352).
With regard to claim 21, Jergovic et al. discloses further comprising
a controller configured to control the plurality of electrical circuits (see [0045] teaching “panel microcontroller”).
With regard to claim 22, Jergovic et al. discloses a method comprising:
arranging a plurality of photovoltaic (PV) substrings on a backsheet (as depicted in Fig. 14, arranging a plurality of photovoltaic (PV) substrings 352 on a backsheet, such as the transparent substrate of PV panel 350; see [0009] teaching “The PV panel has a transparent substrate to which PV devices are mounted”), such that
positive and negative voltage terminals of each substring face a midline of the backsheet (as depicted in Fig. 14, positive and negative voltage terminals connected to PCBs 354/358 for each PV substring 352 face a vertical midline of the cited backsheet); and
disposing, about substantially along the midline of the backsheet, a plurality of electrical circuits (as depicted in Fig. 14 and 15, disposing, about substantially along the cited vertical midline of the cited backsheet, a plurality of electrical circuits within PCBs 354/358); and
coupling each of the plurality of electrical circuits to the positive and negative voltage terminals of the one or more corresponding PV substrings of the plurality of PV substrings, wherein the plurality of electrical circuits are configured to convert voltage from the one or more PV substrings (as depicted in Fig. 14 and 15, coupling each of the cited plurality of electrical circuits within PCBs 354/358 to the cited positive and negative voltage terminals of the one or more corresponding PV substrings 352, wherein the cited plurality of electrical circuits are configured to convert voltage from the one or more PV substrings 352 via DC/DC converters 376; see [0058]).
With regard to claim 23, Jergovic et al. discloses wherein
each the plurality of electrical circuits comprises a direct current to direct current (DC/DC) converter (see Fig. 14 and 15 depicting each the cited plurality of electrical circuits comprises a direct current to direct current (DC/DC) converter 376).
With regard to claim 24, Jergovic et al. discloses wherein
each DC/DC converter comprises: input terminals coupled to the positive and negative terminals of one or more respective PV substrings of the plurality of PV substrings (as depicted in Fig. 14 and 15, each of the cited DC/DC converters 376 comprises input terminals coupled to the cited positive and negative terminals of one or more respective PV substrings 352; see [0058]); and
output terminals, wherein the output terminals of the DC/DC converters are coupled in series (as depicted in Fig. 14 and 15, each of the cited DC/DC converters 376 comprises output terminals, wherein the output terminals of the DC/DC converters 376 are coupled in series; see [0057-0058] teaching “the DC-DC converters of PCBs of the embodiment of FIG. 14 may be coupled together in series”).
With regard to claim 25, Jergovic et al. discloses wherein
each DC/DC converter comprises: input terminals coupled to the positive and negative terminals of one or more respective PV substrings of the plurality of PV substrings (as depicted in Fig. 14 and 15, each of the cited DC/DC converters 376 comprises input terminals coupled to the cited positive and negative terminals of one or more respective PV substrings 352; see [0058]); and
output terminals, wherein the output terminals of the DC/DC converters are coupled in parallel (as depicted in Fig. 14 and 15, each of the cited DC/DC converters 376 comprises output terminals, wherein the output terminals of the DC/DC converters 376 are coupled in series; see [0057-0058] teaching “the DC-DC converters of PCBs of the embodiment of FIG. 14… may be coupled together in parallel”).
With regard to claim 26, Jergovic et al. discloses wherein
arranging the plurality of PV substrings on the backsheet comprises arranging six PV substrings on the backsheet (as depicted in Fig. 14, arranging the plurality of PV substrings on the backsheet comprises arranging six PV substrings 352 on the cited backsheet),
a first three substrings on a first side of the midline (such as depicted in Fig. 14, a first three lower substrings 352 on a first left side of the cited vertical midline) and
a second three substrings on a second side of the midline (such as depicted in Fig. 14, a second three lower substrings 352 on a second right side of the cited vertical midline).
With regard to claim 28, Jergovic et al. discloses wherein
the plurality of PV substrings comprises six PV substrings (as depicted in Fig. 14, the plurality of PV substrings comprises six PV substrings 352) and wherein
the DC/DC converters comprise six DC/DC converters (as depicted in Fig. 14 and 15, the DC/DC converters comprises six DC/DC converters 376, one in each cited PCBs 358), the method further comprising:
coupling each of the DC/DC converters to a corresponding one of the six PV substrings, wherein the DC/DC converters are further configured to maximum-power-point track the corresponding one of the six PV substrings (as depicted in Fig. 14 and 15 and described in the Abstract, coupling each cited DC/DC converter 376 to and configured to MPPT a corresponding one of the six PV substrings 352).
With regard to claim 40, Jergovic et al. discloses wherein
each of the plurality of electrical circuits is configured to maximum-power-point track the one or more corresponding PV substrings (as depicted in Fig. 14 and 15 and described in the Abstract, each cited DC/DC converter 376 configured to MPPT the one or more corresponding PV substrings 352).
With regard to claim 42, Jergovic et al. discloses further comprising
connecting each of the plurality of PV substrings to a controller configured to control the plurality of electrical circuits (see [0045] teaching “panel microcontroller”).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 6 and 27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jergovic et al. (U.S. Pub. No. 2013/0106194 A1) in view of Zhou (CN 112635605 A).
With regard to claims 6 and 27, dependent claims 5 and 26 are anticipated by Jergovic et al. under 35 U.S.C. 102(a)(1) as discussed above.
Jergovic et al. discloses wherein each of the plurality of PV substrings comprises serially-connected solar cells (see Fig. 14 and [0057]) but does not disclose wherein the solar cells are half-cut M10 solar cells.
However, Zhou discloses an apparatus and method (see Title and Abstract) and teaches using half-cut M10 solar cells in order to reduce internal loss (see [0015] and [0018]).
Thus, at the time of the invention, it would have been obvious to a person having ordinary skill in the art to have selected the half-cut M10 solar cells of Zhou for the solar cells of Jergovic et al. because it would have provided for reduced internal loss.
Claim(s) 10 and 31 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jergovic et al. (U.S. Pub. No. 2013/0106194 A1) in view of Zhou (CN 112635605 A), and in further view of Chen et al. (U.S. Pub. No. 2021/0257506 A1).
With regard to claims 10 and 31, dependent claims 6 and 27 are obvious over Jergovic et al. in view of Zhou under 35 U.S.C. 103 as discussed above.
Jergovic et al. teaches wherein the arranging comprises arranging the plurality of PV substrings on a backsheet of a PV module (see module 350, Fig. 14) but does not disclose wherein the PV module comprises a total width of no more than 1135 mm.
However, the width of the PV module is a result effective variable directly affecting the cost of raw materials (see Chen et al. at [0008]).
Thus, at the time of the invention, it would have been obvious to a person having ordinary skill in the art to have optimized the width of the PV module of Jergovic et al., as modified above, and arrive at the claimed range through routine experimentation (see MPEP 2144.05); especially since it would have led to optimizing the material cost of the PV module.
Claim(s) 11-18 and 32-39 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jergovic et al. (U.S. Pub. No. 2013/0106194 A1) in view of Rubin et al. (U.S. Pub. No. 2012/0060895 A1).
With regard to claims 11-18, dependent claim 5 is anticipated by Jergovic et al. under 35 U.S.C. 102(a)(1) as discussed above. Jergovic et al. discloses wherein the six PV substrings comprise:
a first, second, and third substring disposed between the midline and a first edge of the backsheet (such as depicted in Fig. 14, a first, second, and third lower substring 352 disposed between the cited vertical midline and a first left edge of the cited backsheet),
a fourth, fifth, and sixth substring disposed between the midline and a second edge of the backsheet (such as depicted in Fig. 14, a fourth, fifth, and sixth lower substring 352 disposed between the cited vertical midline and a second right edge of the cited backsheet), wherein
the first substring is disposed opposite the sixth substring (as depicted in Fig. 14, the first substring/bottom left most substring 352, is disposed opposite the sixth substring/bottom right most substring 352), wherein
a positive terminal of the first substring is disposed opposite a negative terminal of the sixth substring (as depicted in Fig. 14 and 15, a positive terminal of the cited first substring is disposed opposite a negative terminal of the cited sixth substring),
a negative terminal of the first substring is disposed opposite a positive terminal of the sixth substring (as depicted in Fig. 14 and 15, a negative terminal of the cited first substring is disposed opposite a positive terminal of the cited sixth substring), wherein
the second substring is disposed opposite the fifth substring (as depicted in Fig. 14, the second substring/2nd from the bottom left most substring 352, is disposed opposite the fifth substring/2nd from the bottom right most substring 352), wherein
a positive terminal of the second substring is disposed opposite a negative terminal of the fifth substring (as depicted in Fig. 14 and 15, a positive terminal of the cited second substring is disposed opposite a negative terminal of the cited fifth substring),
a negative terminal of the second substring is disposed opposite a positive terminal of the fifth substring (as depicted in Fig. 14 and 15, a negative terminal of the cited second substring is disposed opposite a positive terminal of the cited fifth substring), wherein
the third substring is disposed opposite the fourth substring (as depicted in Fig. 14, the third substring/3rd from the bottom left most substring 352, is disposed opposite the fourth substring/3rd from the bottom right most substring 352), wherein
a positive terminal of the third substring is disposed opposite a negative terminal of the fourth substring (as depicted in Fig. 14 and 15, a positive terminal of the cited third substring is disposed opposite a negative terminal of the cited fourth substring),
a negative terminal of the third substring is disposed opposite a positive terminal of the fourth substring (as depicted in Fig. 14 and 15, a negative terminal of the cited third substring is disposed opposite a positive terminal of the cited fourth substring).
Jergovic et al. does not disclose a midpoint voltage terminal of the first substring is connected to a midpoint voltage terminal of the sixth substring, a midpoint voltage terminal of the second substring is connected to a midpoint voltage terminal of the fifth substring, and a midpoint voltage terminal of the third substring is connected to a midpoint voltage terminal of the fourth substring.
However, Rubin et al. discloses an apparatus (see Title and Abstract) and teaches a midpoint voltage terminal of a first/second/third substring is connected to a midpoint voltage terminal of a sixth/fifth/fourth substring, the midpoint voltage terminals of the six PV substrings interconnected, in order to connect to bypass diodes in the perimeter margin to protect from shading (see Fig. 1 and annotated Fig. 1 below and see Abstract and [0080]).
PNG
media_image1.png
608
790
media_image1.png
Greyscale
Annotated Fig. 1
Thus, at the time of the invention, it would have been obvious to a person having ordinary skill in the art to have modified the apparatus of Jergovic et al. to include a midpoint voltage terminal of the first/second/third substring connected to a midpoint voltage terminal of the sixth/fifth/fourth substring, as suggested by Rubin et al., because it would have provided for connection to bypass diodes to protect from shading.
With regard to claims 32-39, dependent claim 26 is anticipated by Jergovic et al. under 35 U.S.C. 102(a)(1) as discussed above. Jergovic et al. discloses wherein arranging the six PV substrings on the backsheet further comprises:
disposing a first, second, and third substring disposed between the midline and a first edge of the backsheet (such as depicted in Fig. 14, disposing a first, second, and third lower substring 352 disposed between the cited vertical midline and a first left edge of the cited backsheet),
disposing a fourth, fifth, and sixth substring disposed between the midline and a second edge of the backsheet (such as depicted in Fig. 14, disposing a fourth, fifth, and sixth lower substring 352 disposed between the cited vertical midline and a second right edge of the cited backsheet),
disposing the first substring opposite the sixth substring (as depicted in Fig. 14, disposing the first substring/bottom left most substring 352 opposite the sixth substring/bottom right most substring 352),
disposing a positive terminal of the first substring opposite a negative terminal of the sixth substring (as depicted in Fig. 14 and 15, disposing a positive terminal of the cited first substring opposite a negative terminal of the cited sixth substring) and
a negative terminal of the first substring opposite a positive terminal of the sixth substring (as depicted in Fig. 14 and 15, disposing a negative terminal of the cited first substring opposite a positive terminal of the cited sixth substring),
disposing the second substring opposite the fifth substring (as depicted in Fig. 14, disposing the second substring/2nd from the bottom left most substring 352 opposite the fifth substring/2nd from the bottom right most substring 352),
disposing a positive terminal of the second substring opposite a negative terminal of the fifth substring (as depicted in Fig. 14 and 15, disposing a positive terminal of the cited second substring opposite a negative terminal of the cited fifth substring) and
a negative terminal of the second substring opposite a positive terminal of the fifth substring (as depicted in Fig. 14 and 15, disposing a negative terminal of the cited second substring opposite a positive terminal of the cited fifth substring),
disposing the third substring opposite the fourth substring (as depicted in Fig. 14, disposing the third substring/3rd from the bottom left most substring 352 opposite the fourth substring/3rd from the bottom right most substring 352),
disposing a positive terminal of the third substring opposite a negative terminal of the fourth substring (as depicted in Fig. 14 and 15, disposing a positive terminal of the cited third substring opposite a negative terminal of the cited fourth substring) and
a negative terminal of the third substring opposite a positive terminal of the fourth substring (as depicted in Fig. 14 and 15, disposing a negative terminal of the cited third substring opposite a positive terminal of the cited fourth substring).
Jergovic et al. does not disclose connecting a midpoint voltage terminal of the first substring to a midpoint voltage terminal of the sixth substring, connecting a midpoint voltage terminal of the second substring to a midpoint voltage terminal of the fifth substring, and connecting a midpoint voltage terminal of the third substring to a midpoint voltage terminal of the fourth substring.
However, Rubin et al. discloses an apparatus (see Title and Abstract) and teaches connecting a midpoint voltage terminal of a first/second/third substring to a midpoint voltage terminal of a sixth/fifth/fourth substring, interconnecting the midpoint voltage terminals of the six PV substrings, in order to connect to bypass diodes in the perimeter margin to protect from shading (see Fig. 1 and annotated Fig. 1 below and see Abstract and [0080]).
PNG
media_image1.png
608
790
media_image1.png
Greyscale
Annotated Fig. 1
Thus, at the time of the invention, it would have been obvious to a person having ordinary skill in the art to have modified the method of Jergovic et al. to include connecting a midpoint voltage terminal of the first/second/third substring to a midpoint voltage terminal of the sixth/fifth/fourth substring, as suggested by Rubin et al., because it would have provided for connection to bypass diodes to protect from shading.
Claim(s) 20 and 41 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jergovic et al. (U.S. Pub. No. 2013/0106194 A1) in view of Lowchareonkul (U.S. Patent No. 10,944,268 B1).
With regard to claims 20 and 41, independent claims 1 and 22 are anticipated by Jergovic et al. under 35 U.S.C. 102(a)(1) as discussed above.
Jergovic et al. does not disclose wherein each of the plurality of electrical circuits is further configured to direct current to alternating current (DC/AC) invert power from the one or more corresponding PV substrings.
However, Lowchareonkul discloses an apparatus and method (see Title and Abstract) and teaches an electrical circuit can be configured to direct current to alternating current (DC/AC) invert power from a corresponding PV string in order to provide AC power to a load (see Fig. 1B teaching DC/AC Inverter 142).
Thus, at the time of the invention, it would have been obvious to a person having ordinary skill in the art to have modified the plurality of electrical circuits of Jergovic et al. to include a DC/AC inverter, as suggested by Lowchareonkul, because it would have provided AC power for a load.
Allowable Subject Matter
Claims 8, 9, 29, and 30 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 8 requires an apparatus comprising six PV substrings arranged on a backsheet, a plurality of electrical circuits disposed substantially along a midline of the backsheet, six DC/DC converters, wherein each of the plurality of electrical circuits comprises one of the DC/DC converters, wherein the six DC/DC converters are disposed on a single printed circuit board located about a center of the backsheet, and outputs of the DC/DC converters are combined to form two output terminals provided via a junction box disposed about the center of the backsheet, and in combination with the remaining limitations of claim 8.
The prior art, Jergovic et al. of record, teaches an apparatus comprising six PV substrings 352 arranged on a backsheet, a plurality of electrical circuits disposed substantially along a vertical midline of the backsheet, six DC/DC converters 376, wherein each of the plurality of electrical circuits comprises one of the DC/DC converters (recall Fig. 14 and 15) but does not disclose wherein the six DC/DC converters are disposed on a single printed circuit board located about a center of the backsheet, and outputs of the DC/DC converters are combined to form two output terminals provided via a junction box disposed about the center of the backsheet, and in combination with the remaining limitations of claim 8 and it would not have been an obvious modification.
Claim 9 requires an apparatus comprising six PV substrings arranged on a backsheet, a plurality of electrical circuits disposed substantially along the midline of the backsheet, six DC/DC converters, wherein each of the plurality of electrical circuits comprises one of the DC/DC converters, wherein the six DC/DC converters are disposed on multiple PCBs about along the midline of the backsheet, and outputs of the DC/DC converters are combined to form two output terminals provided via a junction box disposed about a center of the backsheet, and in combination with the remaining limitations of claim 9.
The prior art, Jergovic et al. of record, teaches an apparatus comprising six PV substrings 352 arranged on a backsheet, a plurality of electrical circuits disposed substantially along a vertical midline of the backsheet, six DC/DC converters 376, wherein each of the plurality of electrical circuits comprises one of the DC/DC converters (recall Fig. 14 and 15) but does not disclose wherein the six DC/DC converters are disposed on multiple PCBs about along the midline of the backsheet, and outputs of the DC/DC converters are combined to form two output terminals provided via a junction box disposed about a center of the backsheet, and in combination with the remaining limitations of claim 9 and it would not have been an obvious modification.
Claim 29 requires a method comprising arranging six PV substrings on a backsheet, disposing, substantially along a midline of the backsheet, a plurality of electrical circuits, six DC/DC converters, wherein each the plurality of electrical circuits comprises a DC/DC converter, further comprising disposing the six DC/DC converters on a single printed circuit board located about a center of the backsheet, combining outputs of the DC/DC converts to form two power output terminals, providing the two power output terminals via a junction box disposed about in the center of the backsheet, and in combination with the remaining limitations of claim 29.
The prior art, Jergovic et al. of record, teaches a method comprising arranging six PV substrings 352 on a backsheet, disposing, substantially along a vertical midline of the backsheet, a plurality of electrical circuits, six DC/DC converters 376, wherein each the plurality of electrical circuits comprises a DC/DC converter (recall Fig. 14 and 15) but does not disclose further comprising disposing the six DC/DC converters on a single printed circuit board located about a center of the backsheet, combining outputs of the DC/DC converts to form two power output terminals, providing the two power output terminals via a junction box disposed about in the center of the backsheet, and in combination with the remaining limitations of claim 29 and it would not have been an obvious modification.
Claim 30 requires a method comprising arranging six PV substrings on a backsheet, disposing, substantially along a midline of the backsheet, a plurality of electrical circuits, six DC/DC converters, wherein each the plurality of electrical circuits comprises a DC/DC converter, further comprising disposing the six DC/DC converters on a single printed circuit board located about along the midline of the backsheet, combining outputs of the DC/DC converts to form two power output terminals, providing the two power output terminals via a junction box disposed about in a center of the backsheet, and in combination with the remaining limitations of claim 30.
The prior art, Jergovic et al. of record, teaches a method comprising arranging six PV substrings 352 on a backsheet, disposing, substantially along a vertical midline of the backsheet, a plurality of electrical circuits, six DC/DC converters 376, wherein each the plurality of electrical circuits comprises a DC/DC converter (recall Fig. 14 and 15) but does not disclose further comprising disposing the six DC/DC converters on a single printed circuit board located about along the midline of the backsheet, combining outputs of the DC/DC converts to form two power output terminals, providing the two power output terminals via a junction box disposed about in a center of the backsheet, and in combination with the remaining limitations of claim 30 and it would not have been an obvious modification.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DUSTIN Q DAM whose telephone number is (571)270-5120. The examiner can normally be reached Monday through Friday, 6:00 AM to 2:00 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Allison Bourke can be reached at (303) 297-4684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/DUSTIN Q DAM/Primary Examiner, Art Unit 1721 June 24, 2026
Prosecution Insights