DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention I (i.e., Claims 1-12) in the reply filed on June 18th, 2026, is acknowledged. Therefore, Claims 13-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention. The restriction is, therefore, made FINAL.
Status of Claims
Pursuant to Applicant’s reply to restriction requirement dated June 18th, 2026, Claims 1-20 are pending; however, Claims 13-20 are withdrawn for the above stated reasons and are not subject to the within examination. Therefore, Claims 1-12 shall be examined on the merits.
Information Disclosure Statement
The information disclosure statement (IDS) filed on March 18th, 2024, is being considered by the examiner.
Specification
The disclosure is objected to because of the following informalities:
a) [0088], line 3, “and a lower portion..”; double period to end the sentence
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yu, et al. (US 20220069117 A1; hereinafter referred to as Yu).
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Regarding Claim 1, Yu discloses a method for forming a semiconductor device, the method comprising:
forming a backside contact (backside source contact 270, [0041], Fig. 18A) electrically coupled to a first source or drain (S/D) region (source feature 242S, [0041], Fig. 18A), the backside contact comprising an upper portion (first portion 270-1, [0043], Fig. 18A) and a lower portion (second portion 270-2, [0043], Fig. 18A), the lower portion having a larger critical dimension than the upper portion ([0043], Fig. 18A; W2 [critical dimension of lower portion] > W1 [critical dimension of upper portion]);
forming a frontside contact (frontside drain contact 280, [0035], Fig. 18A) electrically coupled to a second S/D region (drain feature 242D, [0035], Fig. 18A); and
forming a backside contact dielectric liner that conformally wraps around an upper portion and the lower portion of the backside contact (liner 276, [0042], Fig. 18A).
Regarding Claim 2, Yu discloses the method of claim 1, wherein the backside contact dielectric liner extends under and in direct contact with portions of a conductive gate (Fig. 18A; liner is in direct contact with the gate structure 250).
Regarding Claim 3, Yu discloses the method of claim 2, wherein the conductive gate is electrically coupled to the first S/D region and to the second S/D region (Fig. 18A, gate structure 250 is electrically coupled to the first and second source/drain regions through the inner spacer features).
Regarding Claim 4, Yu discloses the method of claim 1, wherein the backside contact dielectric liner conformally wraps around a residual backside contact placeholder (dummy epitaxial feature 238, [0028], Fig. 18A; dummy epitaxial feature 238 is made of the same material as the residual backside contact placeholder of the instant application).
Regarding Claim 5, Yu discloses the method of claim 4, wherein the residual backside contact placeholder is in direct contact with a silicon cap (first epitaxial layer 240, [0028], Fig. 18A; the first epitaxial layer can be made of silicon).
Regarding Claim 6, Yu discloses the method of claim 5, wherein the silicon cap is in direct contact with the second S/D region (Fig 18A).
Regarding Claim 7, Yu discloses the method of claim 1, further comprising forming a passive device region having a silicon layer (substrate 202, [0017], Fig. 3B) under a shallow trench isolation region (isolation feature 214, [0020], Fig. 3B).
Regarding Claim 8, Yu discloses the method of claim 7, wherein a height of the silicon layer under the shallow trench isolation region in the passive device region and a height of the lower portion of the backside contact are the same ([0043]).
Allowable Subject Matter
Claims 9-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter:
a) Regarding Claim 9, the closest prior art of record, Yu, discloses the method of claim 1, wherein forming the backside contact comprises:
forming a first backside placeholder having a first critical dimension (epitaxial feature 238, see Annotated Fig. 11A).
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However, Yu, alone or in combination with any other prior art of record, discloses or can render obvious forming a second backside placeholder on the first backside placeholder, the second backside placeholder having a second critical dimension less than the first critical dimension. Specifically, said limitation is material to the inventive concept of the instant application for DBC integration with thick silicon layers in order to enable passive device and tight N2P spacing. While the use of a singular backside placeholder during the formation of a backside contact (as can be found in Yu, Wei et al., and is known in the art) is not novel, the introduction of a second backside placeholder having a smaller critical dimension than the first and being formed on the first backside placeholder for the formation of a singular backside contact appears to be allowable subject matter.
b) Regarding Claims 10-12, said claims further limit previously stated allowable subject matter. Therefore, said claims are also deemed allowable subject matter.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
a) Chiang, et al. (US 20210305381 A1); discloses backside power rail and backside self-aligned via using a singular placeholder
b) Yu, et al. (US 20220367619 A1); discloses backside power rail formation
c) Ahn, et al. (US 20240421162 A1); discloses an integrated circuit device with a stepped backside contact and a residual backside contact
d) Chang, et al. (US 20220093512 A1); discloses backside power rail and contact formation methods
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Noah C. Robertson whose telephone number is (571) 317-0595. The examiner can normally be reached Monday-Friday 9:30 AM - 6:30 PM (Eastern Time Zone).
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/Noah C. Robertson/Examiner, Art Unit 2812
/William B Partridge/Supervisory Patent Examiner, Art Unit 2812
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