DETAILED ACTION
This action is in response to the claims filed 03/18/2024 for Application number 18/608,563. Claims 1-20 are currently pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 07/18/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Objections
Claims 7 and 8 are objected to because of the following informalities: both claims recite "wherein convert the..." which is grammatically incorrect and should read "wherein . Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-6, 9-14, 17, and 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Liu et al. ("Enhancing the Interoperability between Deep Learning Frameworks by Model Conversion", hereinafter "Liu").
Regarding claim 1, Liu teaches A processing system for machine learning model conversion, comprising:
at least one memory having executable instructions stored thereon (“For example, the PyTorch front-end parser calls torch.load() to deserialize pickled object files to memory.” [pg. 1323, 4.1, ¶2])); and
one or more processors configured to execute the executable instructions in order to cause the processing system to (See pg. 1320, 1. Introduction, ¶1):
receive a request to execute operations using a source model including a plurality of source model tensors with a first memory layout (“The tensor layout refers to the dimensional ordering, which is important because such dimensions usually have specific semantics. For example, 4D image tensors have four dimensions: N, C, H, and W, which represent the batch size, color channel, height, and width, respectively. Depending on whether the C dimension ranks ahead of the H and W dimensions, two tensor layouts NCHW (channels first) and NHWC (channels last) are widely used by different computing devices [23]… If the source model contains Conv2D, MaxPooling, BatchNormalization, etc. nodes, the converted PyThorch model will produce totally wrong results.” [pg. 1326, §4.5, ¶1-2]));
generate a plurality of target model tensors (See pg. 1322, right col), each respective target model tensor being associated with a respective source model tensor of the plurality of source model tensors (“MMdnn adopts a novel unified intermediate representation (IR)-based methodology to systematically handle the conversion challenges. The source model is first transformed into an interme diate computation graph represented by the simple graph-based IR of MMdnn and then to the target framework format, which greatly reduces the engineering complexity.” [Abstract]);
convert the source model from a source architecture associated with the first memory layout to a target architecture associated with a second memory layout, wherein converting the source model comprises, for each respective target model tensor of the plurality of target model tensors, converting the respective source model tensor in the first memory layout to a respective target model tensor in the second memory layout based on a type of a machine learning model layer associated with the respective source model tensor (“Suppose that we are converting a TensorFlow model trained with NHWC input data to the PyTorch format. We assume that the target model still uses NHWC input data. If the source model contains Conv2D, MaxPooling, BatchNormalization, etc. nodes, the converted PyThorch model will produce totally wrong results. This is because the target Conv2D etc. nodes encounter an inconsistent tensor layout other than NCHW, which is either unsupported (e.g., NHWC) or completely unknown (e.g., the input is produced by another convolutional node which has not handled the layout issue). Simply inserting an NHWC-to-NCHW tensor transpose just before and an NCHW-to-NHWC immediately after each of them does not solve the problem.” [pg. 1326, §4.5, ¶2; See further Algorithm 1 explicitly discloses the conversion of a source model to a target model.]));
generate a model output based on an output of each target model tensor of the plurality of target model tensors (“Let y𝑖 and z𝑖 (𝑖∈[1,𝑚]) be two result vectors in the Euclidean space R𝑛, computed by the source and target models on X𝑖, respectively” [pg. 1328, left col, bottom para])
generate a converted model based on the plurality of target model tensors and the generated model output (“The source model is first transformed into an intermediate computation graph represented by our IR and then to the target format, using a node-to-node translation technique similar to the compiler’s instruction selection [6].” [pg. ---1321, right col], ¶1]); and
execute the operations using the converted model (“The conversion works by transforming a source model into the semantic equivalent in another framework format and in the mean time generating a piece of model construction code. Developers may tune such code (e.g., writing custom pre- or post-processing logic) for later retraining or serving” [pg. 1321, top left col, ¶1])).
Regarding claim 2, Liu teaches The processing system of Claim 1, wherein the one or more processors are configured to cause the processing system to convert the source model to the target architecture is based on a traversal of a graph representing the source model. (“In the second phase, an intermediate model generator traverses the source computation graph in certain topological (linear) ordering and transforms it into an intermediate computation graph represented by the simple unified IR of MMdnn (Section 4.3).” [pg. 1323, 4.1, ¶3])
Regarding claim 3, Liu teaches The processing system of Claim 2, wherein the traversal of the graph representing the source model comprises a topological reverse post-order traversal of the graph representing the source model. (“In the second phase, an intermediate model generator traverses the source computation graph in certain topological (linear) ordering and transforms it into an intermediate computation graph represented by the simple unified IR of MMdnn (Section 4.3).” [pg. 1323, 4.1, ¶3; See further, Algorithm 1])
Regarding claim 4, Liu teaches The processing system of Claim 2, wherein the graph representing the source model comprises a plurality of layers, each layer in the graph corresponding to a layer in the source model (“Learnable parameters (i.e., weights and biases) are loaded into either individual graph nodes or some global object depending on the framework implementation. Figure 2 demonstrates the simplified PyTorch front-end parser, which uses a Python dictionary state_dict to store the learnable parameters of each layer.” [pg. 1323, 4.1, ¶2]), and wherein a root node of the graph corresponds to an input layer of the source model. (“Properties of the source node (input layer is implied given input tensors) such as input tensors, output tensors, and attributes
are translated to comply with our syntax.” [pg. 1323, left col, bottom para])
Regarding claim 5, Liu teaches The processing system of Claim 1, wherein the first memory layout comprises a channel-first memory layout and wherein the second memory layout comprises a channel-last memory layout. (“Depending on whether the C dimension ranks ahead of the H and W dimensions, two tensor layouts NCHW (channels first) and NHWC (channels last) are widely used by different computing devices [23].” [pg. 1326, §4.5, ¶2])
Regarding claim 6, Liu teaches The processing system of Claim 1, wherein to convert the respective source model tensor to the respective target model tensor, the one or more processors are configured to cause the processing system to transpose the respective source model tensor from the first memory layout to the second memory layout when the machine learning model layer associated with the respective source model tensor comprises a convolutional layer. (“If the source model contains Conv2D, MaxPooling, BatchNormalization, etc. nodes, the converted PyThorch model will produce totally wrong results. This is because the target Conv2D etc. nodes encounter an inconsistent tensor layout other than NCHW, which is either unsupported (e.g., NHWC) or completely unknown (e.g., the input is produced by another convolutional node which has not handled the layout issue). Simply inserting an NHWC-to-NCHW tensor transpose just before and an NCHW-to-NHWC immediately after each of them does not solve the problem” [pg. 1326, §4.5, ¶2])
Regarding claims 9-14, they are substantially similar to claims 1-6 respectively, and are rejected in the same manner, the same art, and reasoning applying.
Claim 17 recites features similar to claim 1 and is rejected for at least the same reasons therein. Claim 17 additionally requires A non-transitory computer-readable medium having instructions stored thereon which, when executed by one or more processors, performs an operation for machine learning model conversion (Liu, See pg. 1320, 1. Introduction, ¶1)
Regarding claims 18-20, they are substantially similar to claims 2-5 (Claim 19 recite similar features to the combination of claims 3 and 4) respectively, and are rejected in the same manner, the same art, and reasoning applying.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 7 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Liu in view of Louloudakis et al. ("Fix-Con: Automatic Fault Localization and Repair of Deep Learning Model Conversions between Frameworks", hereinafter "Louloudakis").
Regarding claim 7, Liu teaches The processing system of Claim 1, however fails to explicitly teach wherein convert the respective source model tensor to the respective target model tensor, the one or more processors are configured to cause the processing system to transpose the respective source model tensor to a defined layout prior to executing a reshaping operation when the machine learning model layer associated with the respective source model tensor comprises one of a reshaping layer or a matrix multiplication layer.
Louloudakis teaches wherein convert the respective source model tensor to the respective target model tensor, the one or more processors are configured to cause the processing system to transpose the respective source model tensor to a defined layout prior to executing a reshaping operation when the machine learning model layer associated with the respective source model tensor comprises one of a reshaping layer or a matrix multiplication layer. (“In cases where Fix-Con detects the presence of Flatten or Reshape nodes that alter the shape of tensors, then it attempts to repair this by inserting a Transpose node right before Flatten or Reshape to match tensor shape with Source” [pg. 6, top right col; See also pg. 4, right col describes the reshaping operation in further detail]))
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Liu’s teachings by executing a reshaping operation as taught by Louloudakis. One would have been motivated to make this modification in order to match the tensor shape of the target model tensor with the source model tensor. [pg. 6, bottom left col – top right col, Louloudakis]
Regarding claim 15, it is substantially similar to claim 7 respectively, and is rejected in the same manner, the same art, and reasoning applying.
Claims 8 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Liu in view of Yu et al. ("VTensor: Using Virtual Tensors to Build a Layout-Oblivious AI Programming Framework", hereinafter "Yu").
Regarding claim 8, Liu teaches The processing system of Claim 1, however fails to explicitly teach wherein convert the respective source model tensor to the respective target model tensor, the one or more processors are configured to cause the processing system to convert the respective source model tensor to a memory layout compatible with another input into the machine learning model layer when the machine learning model layer associated with the respective source model tensor comprises a binary pointwise operation-based layer.
Yu teaches wherein convert the respective source model tensor to the respective target model tensor, the one or more processors are configured to cause the processing system to convert the respective source model tensor to a memory layout compatible with another input into the machine learning model layer when the machine learning model layer associated with the respective source model tensor comprises a binary pointwise operation-based layer. (“Our objective is to minimize data conversions within the graph by selecting the layout for element wise operators. Each node is associated with a boolean decision vector, denoted as x, where the elements are binary, taking values of either 0 or 1.” [pg. 1086, right col, bottom para])
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Liu’s teachings by using a binary pointwise operation as taught by Yu. One would have been motivated to make this modification in order to minimize data conversion and the end-to-end latency of the neural network. [pg. 1084, §5.2, ¶2, Yu]
Regarding claim 16, it is substantially similar to claim 8 respectively, and is rejected in the same manner, the same art, and reasoning applying.
Conclusion
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/MICHAEL H HOANG/PRIMARY EXAMINER, Art Unit 2122
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