DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claims 1-20 are pending, of which claims 1-7 are rejected and claims 8-20 are allowed.
Response to Arguments
Applicant's arguments filed on January 2, 2026 with respect to claims 1-20 have been fully considered. Regarding claims 8-20 applicant’s arguments are persuasive, therefore, the claims 8-20 are hereby allowed. However, regarding claims 1-7 applicant’s arguments are not persuasive, therefore, the rejections have been maintained.
Response to the art rejection:
Regarding claim 1 Applicant argues that “Claim 1 recites a method comprising: “receiving a codeword having a first portion and a second portion; detecting, using an ECC engine, an error at a first position in the codeword; and signaling an error misdetection when the first position is within the second portion.” The Examiner maps this to Rumbolt’s shortened codeword structure, asserting that Rumbolt’s shortened codeword portion corresponds to the “first portion” and Rumbolt’s constants portion (zero-padding) corresponds to the “second portion.” This mapping is improper because it fails to account for the fundamental structural and functional differences between the claimed invention and Rumbolt’s teaching. In the present invention, the codeword is received from a ternary cell-based memory device, and the first and second portions are both derived from threshold voltage readings of physical memory cells. The Specification explains that user data is chunked and split into codeword portions that are then encoded into ternary values. See Specification at FIG. 7A and accompanying description. The “second portion” in the claimed invention contains synthesized data that has a defined relationship to the first portion based on how data is mapped to ternary cells. This is fundamentally different from Rumbolt’s constant zero-padding. Rumbolt’s “constants portion” is not derived from any data source. Rather, it is artificial padding added to extend a shortened codeword to the length of a parent code. See Rumbolt at ¶ 0025 (“As shown, beyond the shortened codeword and parity bits, a series of data constants, i.e., a series of 0 values, are used to occupy the remaining elements.”). The constants are always zeros and serve only to allow the decoder to identify when error positions fall outside the valid codeword range. The constants do not carry information and are not “received” in any meaningful sense—they are synthesized locally by the decoder based on the known structure of the shortened code. The claimed “signaling an error misdetection when the first position is within the second portion” operates on a different principle. In the present invention, the second portion contains actual data derived from ternary cell readings; if an error is detected in the second portion, it indicates a misdetection because errors in the underlying physical memory cells would manifest as correlated errors across both portions at corresponding positions. In Rumbolt, detecting an error in the constants region merely indicates that the error position computed by the decoder is invalid because no actual data exists in that region. These are different mechanisms addressing different problems. Because Rumbolt does not disclose a codeword having a first portion and a second portion as claimed, where both portions are derived from memory cell readings, Rumbolt cannot anticipate claim 1. Applicant respectfully requests withdrawal of the rejection” (See remarks pages 2-3).
Applicant argument is not persuasive because claims are to be interpreted with broadest reasonable interpretation during examination consistent with the specification. Rumbolt teaches, a method comprising: receiving a codeword having a first portion and a second portion (‘a codeword having shortened codeword portion and constants portions’ [Figs. 4-8]); detecting, using an ECC engine, an error at a first position in the codeword (“The present invention discloses a method and apparatus for performing forward error correction with a multi-dimensional product code, and a method for detecting false decoding errors in frame-based data transmission systems.” [0010, 0025-0026] & [Figs.4-8]); and signaling an error misdetection when the first position is within the second portion ( “….As illustrated in FIG. 8, if any errors are detected outside the codeword's shortened BCH (1280, 1244) length, all errors, both outside the range of the shortened codeword and inside the range of the shortened codeword are determined to be false errors. Where any errors are detected within the codeword but outside the range of the shortened codeword length, the errors are determined to be false errors, as the product code is only valid for the parameter of the shortened code length. In the present invention, an algorithm will detect any errors occurring outside the valid codeword parameter, but the decoder will recognize these errors as false errors, for legitimate errors cannot occur within the range of constant values, i.e., outside the range of the shortened codeword. [0025-0026, 0011] & Figs.4-8]).
With broadest reasonable interpretation in light of the applicant’s specification Rumbolt teaches each and every limitations of claim 1. As applicant argued that “the present invention, the codeword is received from a ternary cell-based memory device, and the first and second portions are both derived from threshold voltage readings of physical memory cells,” – the examiner agrees. However, applicant is reminded that MPEP 2145 states: "Althouqh the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993)." None of the terms (e.g., ‘ternary cell-based memory cell’, ‘portions are derived from threshold voltage’ etc.) are recited in the claim. Therefore, the claim rejections for claims 1-7 have been maintained
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 4-7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Rumbolt et al. (US 2011/0099452 A1), (Hereinafter Rumbolt).
Regarding claim 1, Rumbolt teaches, a method comprising: receiving a codeword having a first portion and a second portion (Rumbolt: ‘a codeword having shortened codeword portion and constants portions’ [Figs. 4-8]); detecting, using an ECC engine, an error at a first position in the codeword (Rumbolt: “The present invention discloses a method and apparatus for performing forward error correction with a multi-dimensional product code, and a method for detecting false decoding errors in frame-based data transmission systems.” [0010, 0025-0026] & [Figs.4-8]); and signaling an error misdetection when the first position is within the second portion (Rumbolt: “….As illustrated in FIG. 8, if any errors are detected outside the codeword's shortened BCH (1280, 1244) length, all errors, both outside the range of the shortened codeword and inside the range of the shortened codeword are determined to be false errors. Where any errors are detected within the codeword but outside the range of the shortened codeword length, the errors are determined to be false errors, as the product code is only valid for the parameter of the shortened code length. In the present invention, an algorithm will detect any errors occurring outside the valid codeword parameter, but the decoder will recognize these errors as false errors, for legitimate errors cannot occur within the range of constant values, i.e., outside the range of the shortened codeword. [0025-0026, 0011] & Figs.4-8]).
Regarding claim 4, Rumbolt teaches, the method of claim 1, wherein determining if the first position is within the first portion comprises determining if the first position is less than a length of the first portion (Rumbolt: “The present invention operates with a large GF, such that m is large enough to ensure the maximum code length of the parent code (2m-1) is sufficiently larger than the shortened codeword length.” [0025, 0022-0026]).
Regarding claim 5, Rumbolt teaches, the method of claim 1, wherein detecting at least one error in the codeword at a first position comprises detecting two errors in the codeword and correcting the two errors if the two errors are in the first portion ( Rumbolt: “As illustrated in FIG. 7, the codeword elements range from 0 to 4095, as the GF operates with m=12, i.e., GF (2.sup.m), which contains 4096 elements. As t=3, up to three errors may be corrected per codeword.” [0022-0026]).
Regarding claim 6, Rumbolt teaches, the method of claim 1, wherein the codeword comprises a BCH codeword (Rumbolt: “An illustrative embodiment of the present invention, as illustrated in FIG. 2, employs a 2D product code comprising 1280 row codes and 1020 column codes. In the illustrative embodiment, the present invention employs a GF with m=12 and operates with the polynomial p(x)=x.sup.12+x.sup.6+x.sup.4+x+1. The row codes are implemented as BCH (1280, 1244) and the column codes are implemented as BCH (1020, 984).” [0026]).
Regarding claim 7, Rumbolt teaches, the method of claim 6, wherein the BCH codeword includes a parity portion generated based on the first portion (Rumbolt: “As further illustrated by FIG. 1(a) the data matrix is comprised of row and column codewords; each codeword n contains k data bits and r parity bits. The 2D data matrix is constructed as a row encoder processes and encodes the k data bits, appending the r parity bits to the data rows. Likewise, a column encoder processes and encodes the k data bits, appending the r parity bits to the data columns. It should be noted that the encoding process can be performed with the rows encoded, followed by the columns encoded, or the encoding process can be performed with the columns encoded, followed by the rows encoded. As illustrated, a section of the data matrix exists where the row parity bits and the column parity bits intersect; here, the row encoder can compute the column parity and append the information into the parity intersection position, or, similarly, the column encoder can compute the row parity and append the information into the parity intersection position. Due to orthogonal mapping the parity value calculated over the row parity is equal to the parity value calculated over the column parity.” [0023] & [Figs. 4-8]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 2-3 are rejected under 35 U.S.C. 103 as being unpatentable over Rumbolt et al. (US 2011/0099452 A1), (Hereinafter Rumbolt).
Regarding claim 2, Rumbolt does not explicitly teach, the method of claim 1, wherein the second portion includes all ones or all zeroes.
However, Rumbolt teaches, [0025]…As shown, beyond the shortened codeword and parity bits, a series of data constants, i.e., a series of 0 values, are used to occupy the remaining elements within the 0 to m element.
With the teaching of Rumbolt, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a series of data values, e.g., a serios of ‘0’ values or a series of ‘1’ values or any other random values as constant known values. By doing so, an algorithm will detect any errors occurring outside the valid codeword parameter, but the decoder will recognize these errors as false errors, for legitimate errors cannot occur within the range of constant values, i.e., outside the range of the shortened codeword.
Regarding claim 3, Rumbolt teaches, the method of claim 1, wherein the second portion includes random data (Rumbolt: [0025]…As shown, beyond the shortened codeword and parity bits, a series of data constants, i.e., a series of 0 values, are used to occupy the remaining elements within the 0 to m element. With the teaching of Rumbolt, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a series of data values, e.g., a serios of ‘0’ values or a series of ‘1’ values or any other random values as constant known values. By doing so, an algorithm will detect any errors occurring outside the valid codeword parameter, but the decoder will recognize these errors as false errors, for legitimate errors cannot occur within the range of constant values, i.e., outside the range of the shortened codeword.
Citation of Pertinent Prior Art
It is noted that any citations to specific, pages, columns, lines, or figures in the prior art references and any interpretation of the reference should not be considered to be limiting in any way. A reference is relevant for all it contains and may be relied upon for all that it would have reasonably suggested to one having ordinary skill in the art. See MPEP 2123.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ENAMUL MD KABIR whose telephone number is (571)270-7256. The examiner can normally be reached on 10:00-6:30 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Albert Decady can be reached on 571-272-3819. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ENAMUL M KABIR/
Examiner, Art Unit 2112
/ALBERT DECADY/Supervisory Patent Examiner, Art Unit 2112
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