DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on March 13, 2026 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 1-2 and 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Masuda (JP 2021064637 and hereinafter Masuda ‘637) in view of Suemasa (US 20220301771 and hereinafter Suemasa ‘771).
In regards to claim 1, Masuda ‘637 discloses a method of manufacturing a capacitor component, the method comprising: forming a dielectric green sheet (described in [0027]); forming a conductive thin film (112, 113 – FIGs. 4-5; [0031]), including a first conductive material (material of thin film 112, 113), on the dielectric green sheet by vapor deposition (described in [0055] as vacuum deposition method) in a stacking direction (upward in FIGs. 5A, 5B); and sintering the conductive thin film to form an internal electrode layer (described in [0036]-[0037]), wherein a mask (M – FIGs. 12-14 and 17; [0041]) which includes openings is provided on one surface of the dielectric green sheet (described in [0041], [0043]), and the conductive thin film is formed in a first region (region of film 112, 113 as seen in FIGs. 12-17), exposed to the openings of the mask, of the one surface of the dielectric green sheet (described in [0041], [0043]).
Masuda ‘637 fails to expressly disclose the conductive thin film including a second conductive material, the internal electrode layer having a hole or recess such that at least a portion of the second conductive material is disposed in the hole or recess and extends from a first portion of the internal electrode layer to a second portion of the internal electrode layer, comprising the first conductive material, such that the first and second portions oppose each other in a direction perpendicular to the stacking direction.
Suemasa ‘771 teaches forming a conductive thin film (12, 18 – FIGs. 5A, 5B; [0017], [0026]) including a first conductive material (12 – FIGs. 5A, 5B) and a second conductive material (18 – FIGs. 5A, 5B), and sintering the conductive thin film ([0043]) to form an internal electrode having a hole or recess (17 – FIGs. 5A, 5B) such that at least a portion of the second conductive material is disposed in the hole or recess (area A in annotated FIG. 5B below) and extends from a first portion of the internal electrode layer (area B in annotated FIG. 5B below) to a second portion of the internal electrode layer (area C in annotated FIG. 5B below), comprising the first conductive material, such that the first and second portions oppose each other in a direction perpendicular to the stacking direction (X-direction seen in FIGs. 5A, 5B and described in [0028] and [0043]; it should also be noted that since the discontinuities, 17, are holes with Sn portion, 18, on the surface thereof, the Sn portion would also extend from a first portion of the hole in the Y-direction to a second portion of the hole in the Y-direction, wherein the portions would oppose each other in the hole in a direction perpendicular to the stacking direction).
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It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Suemasa ‘771 with Masuda ‘637 to incorporate the conductive thin film including a second conductive material, the internal electrode layer having a hole or recess such that at least a portion of the second conductive material is disposed in the hole or recess and arranged between portions of the internal electrode layer, comprising the first conductive material, in a direction perpendicular to the stacking direction as taught by Suemasa ‘771 in the structure taught by Masuda ‘637, as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification allows for degradation of the insulation resistance caused by the electric field concentration near the discontinuity to be suppressed (Suemasa ‘771: [0027]).
In regards to claim 2, modified Masuda ‘637 further teaches wherein the internal electrode layer includes the first conductive material, and the region, including the second conductive material, is formed in the internal electrode layer (see Masuda ‘637 – FIGs. 12-17 and Suemasa ‘771: FIGs. 5A, 5B).
In regards to claim 7, modified Masuda ‘637 further teaches wherein in the forming of the conductive thin film, an average thickness of the conductive thin film is 10 nm or more to 500 nm or less (Suemasa ‘771: [0032]).
While the specific ranges of “wherein in the forming of the conductive thin film, an average thickness of the conductive thin film is 10 nm or more to 500 nm or less” is not specifically disclosed in the cited references a prima facie case of obviousness exists when the claimed ranges “overlap or lie inside ranges disclosed by the prior art” In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
In regards to claim 8, modified Masuda ‘637 further teaches wherein the mask is removed from one surface of the dielectric green sheet (Masuda ‘637: [0050]).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Masuda ‘637 as modified by Suemasa ‘771 as applied to claim 8 above, and further in view of Suzuki et al. (US 20080137264 and hereinafter Suzuki ‘264).
In regards to claim 9, modified Masuda ‘637 further discloses the mask being removed (Masuda ‘637: [0050]).
Masuda ‘637 as modified by Suemasa ‘771 fails to teach, in entirety, wherein a release layer is formed on one surface of the mask in contact with one surface of the dielectric green sheet, and the mask is removed using the release layer.
Suzuki ‘264 teaches wherein a release layer is formed on one surface of the mask (44 – FIGs. 3A-3B; [0096]) in contact with one surface of the dielectric green sheet (42a, 42b – FIG. 3B; [0067]) (seen in FIG. 3B), and the mask is removed using the release layer (described in [0096]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Suzuki ‘264 with Masuda ‘637 as modified by Suemasa ‘771 to incorporate a release layer is formed on one surface of the mask in contact with one surface of the dielectric green sheet, and the mask is removed using the release layer as taught by Suzuki ‘264 in the method taught by Masuda ‘637 as modified by Suemasa ‘771, as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification allows for preventing spheroidizing of internal electrode layers caused by a difference of sintering temperatures of the dielectric material and the metal material, preventing breaking of electrodes, and effectively suppressing a decline of capacitance, which have been significant disadvantages when the fired internal electrode layer is made thinner (Suzuki ‘264: [0023]).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Masuda ‘637 as modified by Suemasa ‘771 as applied to claim 8 above, and further in view of Low et al. (US 20180209046 and hereinafter Low ‘046).
In regards to claim 10, modified Masuda ‘637 further discloses the mask being removed (Masuda ‘637: [0050]).
Masuda ‘637 as modified by Suemasa ‘771 fails to teach, in entirety, wherein the mask is be removed using a stripper.
Low ‘046 teaches wherein the mask is be removed using a stripper ([0058]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Low ‘046 with Masuda ‘637 as modified by Suemasa ‘771 to incorporate wherein the mask is be removed using a stripper as taught by Low ‘046 in the structure taught by Masuda ‘637 as modified by Suemasa ‘771, as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification allows for ensuring removal of the mask (Low ‘046: [0058]).
Allowable Subject Matter
Claims 3-6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
In regards to claims 3-6, specifically, the prior art fails to teach or make obvious, alone or in combination, the limitation of wherein the first conductive material is nickel (Ni), and the second conductive material is indium-tin oxide (ITO).
Response to Arguments
Applicant’s arguments with respect to claim 1 have been considered but are moot because the updated rejection provides a new interpretation/ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Timothy J Dole whose telephone number is (571)272-2229. The examiner can normally be reached M-F 6:30am-2:30pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Wellington can be reached at 571-272-4483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Timothy J. Dole/Supervisory Patent Examiner, Art Unit 2847
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