DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are pending for examination.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim language in the following claims is not clearly understood:
As per claim 1, line 14, it is unclear whether “received identifiers” are referring to “an identifier of the co-processor” and “an identifier of the GVM” in line 9-10 (i.e. consistent term should be used with “the” or “said” if they are the same)
As per claim 2, line 6, it is unclear whether “the identifiers” are referring to “an identifier of the co-processor” and “an identifier of the GVM” in line 9-10 or “received identifier” in line 14 (i.e. consistent term should be used with “the” or “said” if they are the same)
As per claim 3, line 1-2, it is unclear whether “a respective second shared memory transport” is referring to “respective second shared memory transports” in claim 2 (i.e. consistent term should be used with “the” or “said” if they are the same)
As per claim 4, line 4, it is unclear whether “a second shared memory transport” is referring to “respective second shared memory transports” in claim 2 (i.e. consistent term should be used with “the” or “said” if they are the same)
Line 6-7 and 10, it is unclear whether “the address” is referring to “an address of the shared DMA buffer” or “an address of the hardware transport resource” in claim 1 (i.e. consistent term should be used with “the” or “said” if they are the same)
As per claims 8-15, 14-17, they have the same deficiencies as claims 1-4 above. Appropriate corrections are required.
As per claims 2-7, 9-13, 15-20, they depend from rejected claims and do not resolve the deficiencies thereof and are therefore rejected for at least the same reasons.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 8-10, 14-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Rogers et al. Us Pub 2023/0297696 (hereafter Rogers) in view of Chen US Pub 2022/0365805 (hereafter Chen), and further in view of Krasner et al. US Pub 2020/0348957 (hereafter Krasner).
As per claim 1, Rogers teaches the invention substantially as claimed including a system comprising: a host configured to operate a hypervisor (para[0038], FIG. 1, host operating a hypervisor);
and a co-processor configured to communicate with the host via a link layer transport (para[0038, 0053-0054, 0079], FIG. 1, GPU (co-processor) communicate with host via communication channel using an interface);
wherein the host is configured to allocate a hardware transport resource for the GVM and the co-processor (para[0084], data is transmitted from VM to the GPU using the bounce buffer 110, thus the buffer is allocated for the VM and the GPU);
and to send an identifier of the GVM to the co-processor via the link layer transport (para[0093, 0199], memory accessor of GPU receives and evaluates the memory request, which includes guest (VM) ID);
and wherein the GVM and the co-processor are configured to establish a communication channel based on received identifiers (para[0060-0061, 0076, 0138-0139], establish a secure communication channel between the VM and the GPU using the interfaces);
and to transmit data over the communication channel directly between the GVM and the co-processor without intervention by the host (para[0083-0084], data exchange directly between the VM and GPU using the buffer).
Rogers does not explicitly teach a guest virtual machine (GVM) configured to communicate with the host via a paravirtualized interface; to send an address of the hardware transport resource and an identifier of the co-processor to the GVM via the paravirtualized interface.
Chen teaches a guest virtual machine (GVM) configured to communicate with the host via a paravirtualized interface (para[0030-0035], FIG. 2, virtual machine with guest OS communicate with host OS using VirtIO device);
to send an identifier of the co-processor to the GVM via the paravirtualized interface (para[0035, 0043-0046, 0053], VM receives hardware ID corresponds to the Hardware device (coprocessor)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Chen’s teaching to Roger’s invention in order to provide a device pass-through method for a virtual machine and a server to optimize the performance of the VM, where VirtIO device is provided that is dedicated to the hardware device, which improves the efficiency of accessing the hardware device (para[0005-0007, 0044]).
Roger and Chen do not explicitly teach to send an address of the hardware transport resource; to establish a communication channel based on the address of the hardware transport resource.
However, Krasner teaches to send an address of the hardware transport resource; to establish a communication channel based on the address of the hardware transport resource (para[0078], the VM instructs the GPUs to perform the calculations on the data by sending the tasks and an address that specifies a location in the shared memory in which data is stored, thus the GPU received instruction including address of the shared memory via direct channel).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Krasner’s teaching to Roger and Chen’s invention in order to provide a method for offloading parallel processing of requests using a specialized VM in a manner that most efficiently utilizes the GPUs processing capabilities, such as parallel processing (para[0019, 0086]).
As per claim 2, Roger, Chen and Krasner teach the system of claim 1, Roger teaches the co-processor is configured to communicate with the host via a first shared memory transport (para[0083-0084] VM and GPU communicates via secure communication channels via buffers 110);
and the GVM and the co-processor are configured, in response to receiving the identifiers, to establish the communication channel based on respective second shared memory transports (para[0083-0084, 0199], VM and GPU communicates via secure communication channels via buffers 110, and received guest ID and CPU ID are used to communicate requests with each other).
In addition, Chen teaches wherein: the GVM is configured to communicate with the host via a Virtio interface (para[0030-0035], FIG. 2, virtual machine with guest OS communicate with host OS using VirtIO device);
As per claim 3, Roger teaches wherein: the GVM and the co-processor include a respective second shared memory transport to communicate via shared memory and interrupt matching (para[0083-0084] VM and GPU communicates via secure communication channels via shared buffers 110 and perform interrupt translations via virtual interface).
As per claim 8, it is a method claim of claim 1 above, thus it is rejected for the same rationale.
As per claim 9, it is a method claim of claim 2 above, thus it is rejected for the same rationale.
As per claim 10, it is a method claim of claim 3 above, thus it is rejected for the same rationale.
As per claim 14, it is a non-transitory processor readable medium claim of claim 1 above, thus it is rejected for the same rationale.
As per claim 15, it is a non-transitory processor readable medium claim of claim 2 above, thus it is rejected for the same rationale.
As per claim 16, it is a non-transitory processor readable medium claim of claim 3 above, thus it is rejected for the same rationale.
Allowable Subject Matter
Claims 4-7, 11-13, 17-20 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
REASONS FOR ALLOWABLE SUBJECT MATTER
The following is an examiner’s statement of reasons for allowance:
Interpreting the claims in light of the specification, Examiner finds the claimed invention in the dependent claims 4-7, 11-13, 17-20 (including all of the limitations of the base claim and any intervening claims) is patentably distinct from the prior art of record. The prior art does not expressly teach or render obvious the invention as recited in dependent claims 4-7, 11-13, 17-20.
Rogers et al. Us Pub 2023/0297696 teaches a virtual machine (VM) executing within the TEE is provided access to the PPU by a hypervisor. To protect the data in transit, the VM and the PPU may encrypt or decrypt the data for secure communication between the devices. To protect the data within the PPU, a protected memory region may be created in PPU memory where compute engines of the PPU are prevented from writing outside of the protected memory region. Direct memory access between the VM and the GPU can be secured using the shared key and a bounce buffer or similar unsecure memory region to transmit data.
Chen US Pub 2022/0365805 teaches a device pass-through method for a virtual machine (VM) and a server using the same method are provided. The method includes the following. A host operating system (OS) kernel including a device driver and a socket node corresponding to a hardware device and a VM including a guest OS and a guest kernel are established, and the guest OS includes an application and an analyzer. The guest kernel receives an I/O request command from the application and transmits an I/O request packet corresponding to the I/O request command to the analyzer.
Krasner et al. US Pub 2020/0348957 teaches a method for processing data includes receiving a write request by a host operating system during a predetermined time window, storing data associated with the write request in a shared memory, making a first determination that a threshold number of write requests are obtained within the predetermined time window, and, in response to the first determination, sending an offload request to a virtual machine (VM), wherein the offload request specifies at least the write request.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Dunning et al. US Pub 2024/0286043 teaches the VM may communicate with the GPU over one or more communication channels via the virtual interfaces to perform one or more operations. GPU state data may refer to data representing one or more variables, conditions, parameters, resources, device code, and/or other data used to perform one or more tasks using the GPU(s), such as one or more parallel processing tasks.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TAMMY EUNHYE LEE whose telephone number is (571)270-7773. The examiner can normally be reached Mon, Tues, Thur 9PM-4PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Aimee Li can be reached at (571)272-4169. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TAMMY E LEE/Primary Examiner, Art Unit 2195
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