Prosecution Insights
Last updated: July 17, 2026
Application No. 18/610,227

SEMICONDUCTOR DEVICES IN INTEGRATED CIRCUIT HAVING DIFFERENT THRESHOLD VOLTAGES

Non-Final OA
Filed
Mar 19, 2024
Examiner
ANDERSON, ERIK ARTHUR
Art Unit
4100
Tech Center
4100
Assignee
Texas Instruments Incorporated
OA Round
1 (Non-Final)
94%
Grant Probability
Favorable
1-2
OA Rounds
1y 0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 94% — above average
94%
Career Allowance Rate
44 granted / 47 resolved
+33.6% vs TC avg
Moderate +13% lift
Without
With
+13.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
26 currently pending
Career history
74
Total Applications
across all art units

Statute-Specific Performance

§103
47.1%
+7.1% vs TC avg
§102
9.3%
-30.7% vs TC avg
§112
43.6%
+3.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 47 resolved cases

Prosecution Timeline

Mar 19, 2024
Application Filed
May 22, 2026
Non-Final Rejection mailed (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12672526
METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR SUBSTRATE FOR RADIOFREQUENCY APPLICATIONS
3y 7m to grant Granted Jun 30, 2026
Patent 12672322
SEMICONDUCTOR DEVICE INCLUDING POROUS SEMICONDUCTOR MATERIAL ADJACENT AN ISOLATION STRUCTURE
3y 5m to grant Granted Jun 30, 2026
Patent 12656463
IMAGE SENSOR FOR TIME-OF-FLIGHT SYSTEM
4y 9m to grant Granted Jun 16, 2026
Patent 12641768
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
3y 9m to grant Granted May 26, 2026
Patent 12626746
METHOD FOR MANUFACTURING SRAM MEMORY CIRCUIT
3y 9m to grant Granted May 12, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
94%
Grant Probability
99%
With Interview (+13.0%)
3y 4m (~1y 0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 47 resolved cases by this examiner. Grant probability derived from career allowance rate.

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