DETAILED ACTION
Response to Amendment
1. Applicant’s amendment filed on 08/28/26 has been received and entered in the case. In view of applicant’s argument that the currents flowing through transistors Q1 and Q2 in figure 8B of Scott et al are not supply currents, the previously applied anticipation and obviousness rejections based on Scott et al are hereby withdrawn by the examiner. However, new prior art rejections under 35 USC 102 and 103 are now set forth below based on an alternative interpretation of the Scott et al reference.
Notice of Pre-AIA or AIA Status
2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
3. The information disclosure statement (IDS) submitted on 03/20/24 has been considered by the examiner.
Priority
4. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 102
5. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Scott et al, U.S. Patent Application Publication No. 2020/0028472.
As to claim 1, Scott et al discloses, in figures 7 and 8B,
a Doherty amplifier circuit comprising:
a carrier amplifier (the claimed carrier amplifier reads on carrier amplifier 12 shown in figure 7 of Scott et al) configured to amplify a high frequency signal (the claimed high frequency signal reads on high frequency signal RFIN shown in figure 7 of Scott et al);
a peak amplifier (the claimed peak amplifier reads on peak amplifier 18 shown in figure 7 of Scott et al) configured to amplify the high frequency signal; and
a control circuit (the claimed control circuit reads on control circuit 24 shown in figure 7 of Scott et al) configured to control the peak amplifier based on a supply current (the claimed supply current reads on the current flowing out from the control circuit 24 and into the carrier amplifier at the collector terminal of transistor Q1 or transistor Q2, as shown in figure 8B of Scott et al) of an amplifying transistor (the claimed amplifying transistor reads on either transistor Q1 or transistor Q2 shown in figure 8B of Scott et al) of the carrier amplifier (note that transistors Q1 and Q2 shown in figure 8B of Scott et al are included within carrier amplifier 12, and note further that peak amplifier 18 is controlled by the output of saturation detector 24 at output terminal 28, and finally note that this output signal from saturation detector 24 is based on, i.e., responsive to, the currents flowing out from terminals 26 and 26’ into the collector terminals of transistors Q1 and Q2, as shown in figure 8B of Scott et al).
As to claim 2, the claimed bias circuit can be read on circuit 42, note that it outputs a bias signal (using the test of broadest reasonable interpretation, the output of this circuit can be interpreted as a type of bias signal because it biases the input terminal of peak amplifier 18) which provides a bias voltage to the input terminal of peak amplifier 18, and note further that control circuit 24 shown in figure 7 of Scott et al has an additional output terminal 60 which outputs a control signal received by bias circuit 42 for controlling this circuit based on, i.e., responsive to, the current flowing out of control circuit 24 at out terminals 26 and 26’ and into the collector terminals of transistors Q1 and Q2.
As to claim 3, the claimed control terminal of the peak amplifier reads on control terminal 30 (to the extent that this terminal is part of peak amplifier 18 shown in figure 7 of Scott et al) or, alternatively, the claimed control terminal of the peak amplifier can be read on the unillustrated but inherent control terminal of peak amplifier 18 (to the extent that terminal 30 is not part of peak amplifier 18 shown in figure 7 of Scott et al), and note further that the control terminal of Scott et al's peak amplifier 18 controls the operation state thereof, and finally note that control circuit 24 shown in figure 7 of Scott et al is configured to output a signal to the above-noted control terminal based on the supply current, i.e., the current flowing out of terminal 26 or 26’ of control circuit 24 and into the collector terminal of either transistor Q1 or Q2.
As to claim 4, note that Scott et al's control circuit 24 is configured to control the peak amplifier 18 based on, i.e., responsive to, the supply current flowing out of terminal 26 or 26’ of control circuit 24 and into the collector terminal of either transistor Q1 or transistor Q2, and also based on, i.e., responsive to, a drive level of carrier amplifier 12.
Claim Rejections - 35 USC § 103
6. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 5-9 are rejected under 35 U.S.C. 103 as being unpatentable over Scott et al, supra, in view of Lyalin et al, U.S. Patent Application Publication No. 2019/0334481.
As to claim 5, Scott et al does not disclose multiple stages of carrier amplifiers.
Lyalin et al discloses in figure 1, multiple stages of carrier amplifiers 116, 120 and multiple stages of peak amplifiers 136, 140.
It would have been obvious to one of ordinary skill in the art before the effective filing date of applicant’s invention to modify Scott et al’s figure 7 so as to include multiple stages of carrier amplifiers in order to provide the ability to increase the gain of Scott et al’s output signal (RFOUT) obtained from cascading multiple stages of carrier amplifiers in series with each other. Note that when figure 7 of Scott et al is modified so as to include multiple stages of carrier amplifiers, amplifier transistor Q1 or Q2 will be in a first stage carrier amplifier 12 among the multiple stages of carrier amplifiers, and note further that control circuit 24 will be configured to control the peak amplifier 18 based on the supply current of the amplifying transistor in the first stage carrier amplifier 12.
As to claim 6, note that when the above-noted teachings of Scott et al and Lyalin et al are combined there will be multiple stages of peak amplifiers 18 and the control circuit 24 of Scott et al will be configured to control a final stage peak amplifier 18 among the multiple stages of peak amplifiers.
As to claim 7, note that when the above-noted teachings of Scott et al and Lyalin et al are combined there will be multiple stages of peak amplifiers 18 and the control circuit 24 of Scott et al will be configured to control a final stage peak amplifier 18 among the multiple stages of peak amplifiers.
As to claim 8, note that when the above-noted teachings of Scott et al and Lyalin et al are combined the control circuit 24 of Scott et al will be configured to control a first stage peak amplifier 18 among the multiple stages of peak amplifiers.
As to claim 9, note that when the above-noted teachings of Scott et al and Lyalin et al are combined there will be multiple stages of peak amplifiers 18 and the control circuit 24 of Scott et al will be configured to control a first stage peak amplifier 18 among the multiple stages of peak amplifiers.
Allowable Subject Matter
7. Claims 10 and 11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: none of the prior art of record, including Scott et al and Lyalin et al, supra, discloses or suggests the Doherty amplifier of claim 1 wherein the supply current is supplied from a power supply terminal to a collector or drain of the amplifying transistor through a choke coil, as recited in claim 10. Claim 11 is allowable in view of its dependency on allowable claim 10.
Response to Arguments
8. Applicant's argument set forth on lines 15-22 of page 7 the response filed on 08/28/26 has been fully considered but is not persuasive.
Applicant’s argument that “one of ordinary skill in the art would understand the supply current of an amplifying transistor in the carrier amplifier to be the current from supply modulator 52, which is not used by saturation detector 24...the alleged control circuit in Scott does not operate based on any supply current of the amplifying transistor” is not persuasive because, as noted above, the currents output from terminals 26 and 26’ of control circuit 24 can clearly be interpreted as being supply currents, using the test of broadest reasonable interpretation, because they are currents which are supplied to the carrier amplifier 12.
Prior Art Not Relied Upon
9. The prior art made of record in the previous office action and not relied upon is considered pertinent to applicant's disclosure.
As noted in the previous office action, figure 2 of Takayashiki et al (USPAP 2017/0302229) also appears to anticipate at least independent claim 1 of the present application, i.e., this figure shows a Doherty amplifier comprising a carrier amplifier (carrier amplifier 62), a peak amplifier (peak amplifier 63), and a control circuit (the control circuit formed by the combination of current detection unit 53, current ratio calculation unit 55, and gate voltage control unit 56), note that this control circuit controls peak amplifier 63 based on, i.e., responsive to, the current which will flow through one or more of the inherent amplifying transistors which, by necessity, will be included within Takayashiki et al's carrier amplifier 62.
Action is Non-Final
10. In view of the above-noted new grounds of rejection based on Scott et al, not necessitated by any amendments to the claims by applicant, this office action is hereby made non-final.
Conclusion
11. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KENNETH B WELLS whose telephone number is (571)272-1757. The examiner can normally be reached Monday-Friday, 8:30am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, REGIS J BETSCH, can be reached at (571)270-7101. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KENNETH B WELLS/Primary Examiner, Art Unit 2836 September 7, 2026
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