DETAILED ACTION
This office action is in response to the response filed on 05/19/2026.
Notice of Pre-AIA or AIA Status
The present application is being examined under the pre-AIA first to invent provisions.
Election/Restrictions
Claims 17-19 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected group, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 02/23/2026.
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action:
(a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1-4, 7, 11-13 and 16 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Lei US 2017/0033704 in view of Ugare US 20250055385.
Regarding Claim 1, Lei teaches (Figures 1-10) a three-phase power electronics module, comprising: three power modules (122-126, Fig. 3) arranged in a row, each module having a positive DC terminal, a negative DC terminal (162 and 164, fig. 5), and an AC terminal (166) and configured to convert DC electrical power delivered via the two DC terminals into AC electrical power at the AC terminal; two capacitor modules (fig. 7, 200), each capacitor module having a positive terminal and a negative terminal (par. 46); a first bus bar (see fig. 8, busbar connected to 162 and par. 37, 46 and 50), having a first planar region (169), electrically connecting the positive DC terminals of the power modules and the positive terminals of the capacitor modules (par. 44-48); and a second bus bar (220), having a second planar region (with 222) overlapping and spaced apart from the first planar region, electrically connecting the negative DC terminals of the power modules and the negative terminals of the capacitor modules (see figs. 7-8, par. 44-48). (For example: Par. 35-48)
Lei does not teach two capacitor modules interspersed between the power modules.
Ugare teaches (Figure 6) two capacitor modules (603 and 606) interspersed between the power modules (at 630). (For Example: Par. 64-70)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Lei to include two capacitor modules interspersed between the power modules as taught by Chen to reduce space in the circuit.
Regarding Claim 2, Lei teaches (Figures 1-10) further comprising a third capacitor module (200 of 126) at one end of the three power modules (122-126), the third capacitor module having a positive terminal electrically connected to the first bus bar and a negative terminal electrically connected to the second bus bar (see fig. 5, 162-164). (For example: Par. 35-48)
Regarding Claim 3, Lei teaches (Figures 1-10) the module.
Lei does not teach further comprising an insulator between the first planar region and the second planar region.
Ugare teaches (Figure 6) an insulator (627) between the first planar region and the second planar region. (For Example: Par. 67)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Lei to include two capacitor modules interspersed between the power modules as taught by Chen to improve conduction is the system.
Regarding Claim 4, Lei teaches (Figures 1-10) wherein: the DC terminals of the power modules and the terminals of the capacitor modules (see fig. 7-8, 162-164) extend from a top surface of the power electronics module (with 224); and the first planar region and second planar region are parallel to the top surface (see fig. 7, with 220). (For example: Par. 35-48)
Regarding Claim 7, Lei teaches (Figures 1-10) wherein: the DC terminals of the power modules (162-164) and the terminals of the capacitor modules (at 226 and 228) extend from a top surface of the power electronics module (Fig. 8-9); and the first planar surface and the second planar surface are perpendicular to the top surface (see figs. 7-9 with 222 and 169). (For example: Par. 35-48)
Regarding Claim 11, Lei teaches (Figures 1-10) a three-phase power electronics module (at fig. 2), comprising: three power modules arranged in a row (122-126), each module having a positive DC terminal (162), a negative DC terminal (164), and an AC terminal (164) and configured to convert DC electrical power delivered via the two DC terminals into AC electrical power at the AC terminal; and two capacitor modules (200), each capacitor module having a positive terminal and a negative terminal (at 214 and 216), wherein the positive terminal of each capacitor module extends between and is electrically connected with the positive DC terminals of adjacent power modules (see fig. 7); and the negative terminal of each capacitor module extends between and is electrically connected with the negative DC terminals of adjacent power modules (see fig.7). (For example: Par. 35-48)
Lei does not teach two capacitor modules interspersed between the power modules.
Ugare teaches (Figure 6) two capacitor modules (603 and 606) interspersed between the power modules (at 630). (For Example: Par. 64-70)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Lei to include two capacitor modules interspersed between the power modules as taught by Chen to reduce space in the circuit.
Regarding Claim 12, Lei teaches (Figures 1-10) wherein: each power module (Fig. 5-7) includes a housing (132) defining two slots each providing access to one of the two DC terminals (at 162-163); and the AC terminal extends through the housing (166). (For example: Par. 35-48)
Regarding Claim 13, Lei teaches (Figures 1-10) wherein: each of the capacitor modules (Fig. 7, 200) includes a housing which abuts (with 228) the over-molded housing of an adjacent power modules (210); and the positive terminals and the negative terminals of each of the capacitor modules extend into the slots of the adjacent power modules (they are connected with 220). (For example: Par. 35-48)
Regarding Claim 16, Lei teaches (Figures 1-10) wherein each of the power modules further includes a set of signal terminals extending through the respective housing (Fig. 5, 168-170). (For example: Par. 35-48)
Claims 5-6 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Lei US 2017/0033704 in view of Ugare US 20250055385 and further in view of Jakobi US 2024/0322697.
Regarding Claim 5, Lei teaches (Figures 1-10) module.
Lei does not teach wherein one of the first bus bar and the second bus bar has a stepped profile.
Jakobi teaches (Figure 1a) wherein one of the first bus bar and the second bus bar has a stepped profile (dc+). (For Example: Par. 24-33)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Lei to include wherein one of the first bus bar and the second bus bar has a stepped profile as taught by Jakobi to reduce the stray inductance of the power module.
Regarding Claim 6, Lei teaches (Figures 1-10) the modules.
Lei does not teach wherein one of the positive DC terminals and the negative DC terminals extends farther from the top surface than the other of the positive DC terminals and the negative DC terminals and includes a portion parallel to the top surface which connects to a region of one of the first bus bar and the second bus bar that is not the first planar region or the second planar region.
Jakobi teaches (Figures 1a and 1b) wherein one of the positive DC terminals and the negative DC terminals (DC+) extends farther from the top surface (100) than the other of the positive DC terminals and the negative DC terminals (dc-) and includes a portion parallel to the top surface (112) which connects to a region of one (114) of the first bus bar and the second bus bar that is not the first planar region or the second planar region (at 162). (For Example: Par. 24-33)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Lei to include wherein one of the positive DC terminals and the negative DC terminals extends farther from the top surface than the other of the positive DC terminals and the negative DC terminals and includes a portion parallel to the top surface which connects to a region of one of the first bus bar and the second bus bar that is not the first planar region or the second planar region, as taught by Jakobi to reduce the stray inductance of the power module.
Claim 8-10 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Lei US 2017/0033704 in view of Ugare US 20250055385 and further in view of Esmaili US 2010/0089641.
Regarding Claim 8, Lei teaches (Figures 1-10) wherein: each of the positive terminal and the negative terminal of each of the capacitor modules (214 +/-) includes a tab (228) which extends parallel to the top surface (210). (For example: Par. 35-48)
Lei does not teach the first bus bar includes a plurality of tabs extending from the first planar region parallel to the top surface and electrically connected to the tabs of respective positive terminals; and the second bus bar includes a plurality of tabs extending from the second planar region parallel to the top surface and electrically connected to the tabs of respective negative terminals.
Esmaili teaches (Figures 2-4) the first bus bar (52) includes a plurality of tabs extending from the first planar region parallel to the top surface (at 50 see fig. 2, with 70-78) and electrically connected to the tabs of respective positive terminals (fig. 3, 162); and the second bus bar (53) includes a plurality of tabs extending from the second planar region parallel to the top surface (at 52, see fig. 2 with 70-78) and electrically connected to the tabs of respective negative terminals (164, Fig. 3). (For Example: Par. 19-23)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Lei to include the first bus bar includes a plurality of tabs extending from the first planar region parallel to the top surface and electrically connected to the tabs of respective positive terminals; and the second bus bar includes a plurality of tabs extending from the second planar region parallel to the top surface and electrically connected to the tabs of respective negative terminals, as taught by Esmaili to provide a low inductance busbar system to reduce voltage spikes.
Regarding Claim 9, Lei teaches (Figures 1-10) wherein: each of the positive DC terminal and the negative DC terminal (162-164) of each of the power modules includes a tab which extends parallel to the top surface (see fig. 5 and 8, with 165 and 163). (For example: Par. 35-48)
Lei does not teach the first bus bar includes a plurality of tabs extending from the first planar region parallel to the top surface and electrically connected to the tabs of respective positive DC terminals; and the second bus bar includes a plurality of tabs extending from the second planar region parallel to the top surface and electrically connected to the tabs of respective negative DC terminals.
Esmaili teaches (Figures 2-4) the first bus bar (52) includes a plurality of tabs extending from the first planar region parallel to the top surface (at 50 see fig. 2, with 70-78) and electrically connected to the tabs of respective positive terminals (fig. 3, 162); and the second bus bar (53) includes a plurality of tabs extending from the second planar region parallel to the top surface (at 52, see fig. 2 with 70-78) and electrically connected to the tabs of respective negative terminals (164, Fig. 3). (For Example: Par. 19-23)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Lei to include the first bus bar includes a plurality of tabs extending from the first planar region parallel to the top surface and electrically connected to the tabs of respective positive terminals; and the second bus bar includes a plurality of tabs extending from the second planar region parallel to the top surface and electrically connected to the tabs of respective negative terminals, as taught by Esmaili to provide a low inductance busbar system to reduce voltage spikes.
Regarding Claim 10, Lei teaches (Figures 1-10) the modules.
Lei does not teach wherein: the first bus bar includes a plurality of first tabs extending perpendicular to the top surface and perpendicular to the first planar region, each first tab electrically connected to a positive DC terminal of a power module or to a positive terminal of a capacitor module; and the second bus bar includes a plurality of second tabs extending perpendicular to the top surface and perpendicular to the second planar region, each second tab electrically connected to a negative DC terminal of a power module or to a negative terminal of a capacitor module.
Esmaili teaches (Figures 2-4) wherein: the first bus bar (52) includes a plurality of first tabs extending perpendicular to the top surface and perpendicular to the first planar region (see fig. 2, tabs 70-73), each first tab electrically connected to a positive DC terminals of a power module or to a positive terminal of a capacitor module (see fig. 3, 162 and 82); and the second bus bar (53) includes a plurality of second tabs extending perpendicular to the top surface (164) and perpendicular to the second planar region (see fig. 2, 74-78), each second tab electrically connected to a negative DC terminals of a power module or to a negative terminal of a capacitor module (see fig. 3, 164 and 78). (For Example: Par. 19-23)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Lei to include wherein: the first bus bar includes a plurality of first tabs extending perpendicular to the top surface and perpendicular to the first planar region, each first tab electrically connected to a positive DC terminals of a power module or to a positive terminal of a capacitor module; and the second bus bar includes a plurality of second tabs extending perpendicular to the top surface and perpendicular to the second planar region, each second tab electrically connected to a negative DC terminals of a power module or to a negative terminal of a capacitor module, as taught by Esmaili to provide a low inductance busbar system to reduce voltage spikes.
Allowable Subject Matter
Claim 14-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Reasons for Indicating Allowable Subject Matter
The following is an examiner’s statement of reasons for indicating Allowable Subject Matter:
Claim 14; prior art of record fails to disclose either by itself or in combination: “…further comprising a third capacitor module adjacent to an outside power module of the three power modules, wherein: the third capacitor module includes an over-molded housing which abuts the over-molded housing of outside power module; a positive terminal of the third capacitor module extends into one of the slots of the outside power module and is electrically connected with the positive DC terminal of the outside power module; and a negative terminal of the third capacitor module extends into the other slot of the outside power module and is electrically connected with the negative DC terminal of the outside power module”.
These features taken alone or in combination are neither disclosed nor suggested by the prior art of record.
Response to Arguments
Applicant's arguments filed 05/19/2026 have been fully considered but they are not persuasive.
Applicant argued that “Applicant disagrees that Lei teaches two capacitor modules. Fig. 7 of Lei only shows one capacitor module. "[T]he power module assembly 57 is disposed on top of a capacitor assembly 200". (Lei [0044]). The Examiner relies on Ugare for the capacitor modules being interspersed between power modules. However, Fig. 6 of Ugare only shows one power module. A module cannot be interspersed between objects when there is only a single object. Although there may be other power modules in the vehicle of Ugare, the relative position of those other power modules with respect to the capacitor modules is not apparent. Since the cited references, taken together, do not disclose this limitation, the rejections of these claims and all dependent claims is improper”. First , Lei teaches in Figure 3 a plurality of power modules 122 starting from 124 and ending in 126 each one having a capacitor module so these means that at least two capacitor modules limitation is met by the prior art. Second, the Ugare reference teaches multiple capacitor modules see par. 65, “[0065] The bulk capacitor assembly 600 further includes one or more first capacitors 603 provided on a first side of the stacked busbar 635, one or more second capacitors 606 provided on a second side of the stacked busbar 635”. Figure 6 show how in a single module (at 630) you can have two capacitor modules 603 and 606 at both ends of the power module which when put at a stack configuration as shown in Lei fig. 3 and figure 5 of Ugare you will have the power modules interspersed between the modules.
Applicant argued that “the Examiner asserts that Lei discloses "a third capacitor module at one end of the three power modules". Applicant disagrees. Lei teaches a single capacitor module which is not at one end of the power modules.”. However, Figure 3 of Lei teaches another power module 122 from the plurality of power modules, this other power module which has the same configuration as the plurality of power modules will have a capacitor module of its own and will be connected to one end of any one of the three power modules .
Applicant argued that “Applicant disagrees. Terminals 214 and 216 of the capacitor modules of Lei do not "extend between" terminals of adjacent power modules. At least one busbars 220 is required to mechanically and electrically connect terminals 216 to the terminals of at least one power module. (Lei [0045]). Since the cited reference does not disclose this limitation, the rejection of claim 11 and all dependent claims is improper”. However, Lei shows in Figures 3-4 the stack of power modules 122 each one having a capacitor module see fig. 7 with 200, this capacitor assembly has positive and negative terminals which are connected to their power modules and as shown in figure 4 and 2 the capacitor assembly is connected to the rest of the power modules because it provides power to node 84 of figure 2.
Applicant argued that “Please refer to Figs. 11-18 of the present disclosure to understand what is intended by a terminal extending between terminals of adjacent modules. If the Examiner is construing the claim language more broadly than intended, Applicant is open to suggestions of alternative language.” However, the extend feature is not describe in details so as to know how the extension should be as in any of the figures 11-18. The extension toward the outside of the module is shown in figure 9 of Lei.
Application argued that “With respect to claim 12, the Examiner asserts that Lei teaches "each power module includes a housing defining two slots each providing access to one of the two DC terminals", referring to Figs. 5-7. Applicant has reviewed these figures of Lei and does not find the slots to which the Examiner is referring”. However, Lei teaches the two DC terminal going to the outside of 206 and that space that lets the DC terminals be connected to the outside of 206 is the slot which can be seen in figures 7 and 8.
Applicant argued that “With regard to claim 13, the Examiner asserts that Lei teaches "the positive terminals and the negative terminals of each of the capacitor modules extend into the slots of the adjacent power modules". Applicant finds no teaching in Lei”. However, Lei shows in Figures 3-4 the stack of power modules 122 each one having a capacitor module see fig. 7 with 200, this capacitor assembly has positive and negative terminals which are connected to their power modules and as shown in figure 4 and 2 the capacitor assembly is connected to the rest of the power modules because it provides power to node 84 of figure 2. Also, the extension toward the outside of the module is shown in figure 9 of Lei and the connection with the power module is shown in figure 7 with the 220 busbar for each power module 122.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GUSTAVO A ROSARIO-BENITEZ whose telephone number is (571)270-7888. The examiner can normally be reached M-F 9AM-5PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MONICA LEWIS can be reached at 5712721838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/GUSTAVO A ROSARIO-BENITEZ/Primary Examiner, Art Unit 2838
Prosecution Insights