Prosecution Insights
Last updated: May 29, 2026
Application No. 18/610,683

SEMICONDUCTOR APPARATUS AND METHOD OF MANUFACTURING THE SAME

Final Rejection §102§103
Filed
Mar 20, 2024
Priority
Mar 30, 2023 — JP 2023-055620
Examiner
LEE, PETE T
Art Unit
2848
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Mitsubishi Electric Corporation
OA Round
2 (Final)
75%
Grant Probability
Favorable
3-4
OA Rounds
3m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
593 granted / 791 resolved
+7.0% vs TC avg
Moderate +10% lift
Without
With
+10.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
22 currently pending
Career history
815
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
86.4%
+46.4% vs TC avg
§102
9.0%
-31.0% vs TC avg
§112
2.0%
-38.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 791 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Response to Arguments Applicant’s arguments filed on 04/24/26 with respect to claims 1-3 and 10-11 have been considered but do not apply to the references used in the rejection below. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-3 and 11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hartmann (JP 2013539919A). Regarding claim 1, Hartman discloses a semiconductor apparatus (Fig.3) comprising: an insulating substrate (24) including an insulating layer including a first main surface (top surface of 24) ,and a circuit pattern (26) disposed directly on the first main surface and including a first portion (see 48); and an electrode including a second portion (16) bonded to the first portion (48), wherein bonding between the first portion and the second portion is ultrasonic bonding ( part 34 is ultrasound bonded to 26), and one of the first portion and the second portion is fitted in the other of the first portion and the second portion ( 34 is fitted into 48:Fig.3). Regarding claim 2, Hartman discloses wherein the first portion has a recess (48), and the second portion (34) is fitted in the recess. Regarding claim 3, Hartman discloses, wherein in a planar view of the first main surface, a step of the recess extends in a direction perpendicular to a direction of ultrasonic vibration applied for the ultrasonic bonding ( step of 48 extends in top down direction and ultrasound is done in left right direction). Regarding claim 11, Hartman discloses method of manufacturing a semiconductor apparatus, comprising: preparing an insulating substrate (11) and an electrode (16), the insulating substrate including an insulating layer and a circuit pattern (26) disposed directly on the insulating layer (24) and including a first portion (48), the electrode including a second portion (bottom of 16); fitting one of the first portion and the second portion into the other of the first portion and the second portion (see bottom of 16 fitted into 48); and ultrasonically bonding the first portion and the second portion (16 and 48 are ultrasound bonded). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 10 are rejected under 35 U.S.C. 103 as being unpatentable over Hartmann as applied to claim 1 above, and further in view of Yutaka et al. (JP 2014056917 A1) hereinafter Yutaka. Regarding claim 4, Hartmann discloses the insulating layer includes a second main surface opposite to the first main surface (see bottom of 24 opposite to the top surface; Fig.3). Hartmann is silent with respect to the insulating substrate includes a heat dissipation plate disposed on the second main surface. Yutaka discloses the insulating substrate includes a heat dissipation plate disposed on the second main surface (see 6 disposed on bottom of surface of 51;Fig.5). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Yutaka to modify the device of Hartmann in order to perform heat dissipation to prevent damage to the device. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETE LEE whose telephone number is (571) 270-5921. The examiner can normally be reached on Monday-Friday (2nd & 4th Friday Off). If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Timothy Dole can be reached at (571) 272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /PETE T LEE/Primary Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Mar 20, 2024
Application Filed
Jan 26, 2026
Non-Final Rejection mailed — §102, §103
Mar 29, 2026
Interview Requested
Apr 24, 2026
Response Filed
May 11, 2026
Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
75%
Grant Probability
86%
With Interview (+10.5%)
2y 5m (~3m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 791 resolved cases by this examiner. Grant probability derived from career allowance rate.

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