DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
Receipt is acknowledged of a request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e) and a submission, filed on 12/04/2025.
Response to Arguments
Applicant’s arguments with respect to claim(s) rejected have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-6, 8 and 10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hiner et al. 20190115319.
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Regarding claim 1, fig. 2O of Hiner (as labeled by examiner above) discloses an electronic package, comprising:
a substrate 288, comprising:
a first pad and a second pad on a first surface of the substrate without an intervening pad there between, wherein the first pad and the second pad have a first pitch (a top surface pitch);
a third pad and a fourth pad on the first surface of the substrate without an intervening pad there between, wherein the third pad and the fourth pad have the first pitch (the top surface pitch);
a fifth pad and a sixth pad on a second surface of the substrate without an intervening pad there between, wherein the second surface is opposite from the first surface, wherein the fifth pad and the sixth pad have a second pitch (a bottom surface pitch) that is greater than the first pitch, and wherein the fifth pad is electrically coupled to the first pad by a first single via, and the sixth pad is electrically coupled to the second pad by a second single via;
a seventh pad and an eighth pad on the second surface of the substrate without an intervening pad there between, wherein the seventh pad and the eight pad have the second pitch (the bottom surface pitch), and wherein the seventh pad is electrically coupled to the third pad by a third single via, and the eighth pad is electrically coupled to the fourth pad by a fourth single via;
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a bridge substrate above the substrate;
a first die 201 electrically coupled to the first pad, the second pad, and the bridge substrate; and
a second die 202 electrically coupled to the third pad, the fourth pad, and the bridge substrate, wherein the bridge substrate electrically couples the first die to the second die.
Regard claim 2, fig. 2O of Hiner discloses wherein the bridge substrate is on an uppermost surface of the substrate.
Regarding claims 3-4, fig. 2O of Hiner discloses further comprising: an underfill material 224 beneath the first die and beneath the second die; and wherein the underfill material is continuous between the first die and the second die.
Regarding claim 5, fig. 2O of Hiner discloses further comprising: a mold material 225/226 adjacent to sides of the first die and the second die, and between the first die and the second die.
Regarding claim 6, fig. 2O of Hiner discloses further comprising: an underfill material 224 beneath the first die and beneath the second die; and a mold material 226/225 around the underfill material, the first die and the second die.
Regarding claim 8, fig. 2O of Hiner discloses wherein the fifth pad, the sixth pad, the seventh pad, and the eighth pad are part of a fan-out layer patterned directly into the second surface of the substrate.
Regarding claim 10, fig. 2O of Hiner discloses wherein the bridge substrate is an active device (where current can flow).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 11-16, 18 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Hiner in view of Edwards 20060038272.
Regarding claim 11 (see rejection of claim 1 above), Hiner discloses a system, comprising: an electronic package, the electronic package comprising: a substrate, comprising: a first pad and a second pad on a first surface of the substrate without an intervening pad there between, wherein the first pad and the second pad have a first pitch; a third pad and a fourth pad on the first surface of the substrate without an intervening pad there between, wherein the third pad and the fourth pad have the first pitch; a fifth pad and a sixth pad on a second surface of the substrate without an intervening pad there between, wherein the second surface [[that]] is opposite from the first surface, wherein the fifth pad and the sixth pad have a second pitch that is greater than the first pitch, and wherein the fifth pad is electrically coupled to the first pad by a first single via, and the sixth pad is electrically coupled to the second pad by a second single via; a seventh pad and an eighth pad on the second surface of the substrate, wherein the seventh pad and the eight pad have the second pitch, and wherein the seventh pad is electrically coupled to the third pad by a third single via, and the eighth pad is electrically coupled to the fourth pad by a fourth single via; a bridge substrate above the substrate; a first die electrically coupled to the first pad, the second pad, and the bridge substrate; and a second die electrically coupled to the third pad, the fourth pad, and the bridge substrate, wherein the bridge substrate electrically couples the first die to the second die. Hiner does not disclose of a board and the electronic package coupled to the board.
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However, fig. 4a of Edwards discloses of a board 410 and the electronic package coupled to the board in order to connect the package to the board as bigger system.
In view of such teaching, it would have been obvious to form a system of Hiner further comprising a board and the electronic package coupled to the board such as taught by Edwards in order to form a bigger system.
Regarding claim 12, Hiner discloses wherein the bridge substrate is on an uppermost surface of the substrate.
Regarding claim 13, Hiner discloses that the electronic package further comprising: an underfill material beneath the first die and beneath the second die.
Regarding claim 14, Hiner discloses wherein the underfill material is continuous between the first die and the second die.
Regarding claim 15, Hiner discloses that the electronic package further comprising: a mold material adjacent to sides of the first die and the second die, and between the first die and the second die.
Regarding claim 16, Hiner discloses that the electronic package further comprising: an underfill material beneath the first die and beneath the second die; and a mold material around the underfill material, the first die and the second die.
Regarding claim 18, Hiner discloses wherein the fifth pad, the sixth pad, the seventh pad, and the eighth pad are part of a fan-out layer patterned directly into the second surface of the substrate.
Regarding claim 20, Hiner discloses wherein the bridge substrate is an active device.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Hiner in view of MOALLEM et al. 20200259240.
Regarding claim 7, HIner discloses claim 1, but does not disclose further comprising: a solder resist between the bridge substrate and the first die, and between bridge substrate and the second die.
However, fig. 1 and par [0027] of MOALLEM discloses package substrate 110 and 112 may include one or more dielectric layers 114-128 that provide physical support and isolation and a network of interconnecting conductors. Examples of dielectric layers include solder resist layers 114, 122, 124, and 128; intermediate dielectric layers 116 and 120; and core dielectric layers 118 and 126.
In view of such teaching, it would have been obvious to form a structure of Hiner further comprising: a solder resist between the bridge substrate and the first die, and between bridge substrate and the second die in order to provide physical support and isolation and a network of interconnecting conductors such as taught by MOALLEM.
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Wu in view of MOALLEM et al. 20200259240.
Regarding claim 17, Hiner and Edwards disclose claim 11, but do not disclose further comprising: a solder resist between the bridge substrate and the first die, and between bridge substrate and the second die.
However, fig. 1 and par [0027] of MOALLEM discloses package substrate 110 and 112 may include one or more dielectric layers 114-128 that provide physical support and isolation and a network of interconnecting conductors. Examples of dielectric layers include solder resist layers 114, 122, 124, and 128; intermediate dielectric layers 116 and 120; and core dielectric layers 118 and 126.
In view of such teaching, it would have been obvious to form a structure of Hiner and Edwards further comprising: a solder resist between the bridge substrate and the first die, and between bridge substrate and the second die in order to provide physical support and isolation and a network of interconnecting conductors such as taught by MOALLEM.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Hiner in view of Kobayashi et al. 20070200211 (Kobayashi).
Regarding claim 8, Hiner discloses claim 1, but does not disclose wherein the first pitch is less than 100 μm and the second pitch is greater than 100 μm.
However, par [0013] The wiring pitch for maintaining the via forming portion in the connection between the layers in the multilayer wiring substrate will be described with reference to FIGS. 3 and 4. In a method of setting a width of the wiring 24, a wiring interval and a diameter of the via pad portion 25 to be 20 .mu.m, 20 .mu.m and 100 .mu.m respectively and arranging a large number of via pad portions 25 shown in FIG. 3 in parallel as in the related-art method as connecting conditions for the wiring 24 and the via pad portion 25, it is necessary to set a pitch of the via pad portion 25 to be 120 .mu.m in order to carry out a connection through the via under the existing circumstances.
In view of such teaching, it would have been obvious to form a structure of Hiner comprising wherein the first pitch is less than 100 μm and the second pitch is greater than 100 μm such as taught by Kobayashi in order to carry out a connection through the via of desired dimensions.
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Hiner and Edward and Kobayashi.
Regarding claim 19, Hiner discloses claim 11, but does not disclose wherein the first pitch is less than 100 μm and the second pitch is greater than 100 μm.
However, par [0013] The wiring pitch for maintaining the via forming portion in the connection between the layers in the multilayer wiring substrate will be described with reference to FIGS. 3 and 4. In a method of setting a width of the wiring 24, a wiring interval and a diameter of the via pad portion 25 to be 20 .mu.m, 20 .mu.m and 100 .mu.m respectively and arranging a large number of via pad portions 25 shown in FIG. 3 in parallel as in the related-art method as connecting conditions for the wiring 24 and the via pad portion 25, it is necessary to set a pitch of the via pad portion 25 to be 120 .mu.m in order to carry out a connection through the via under the existing circumstances.
In view of such teaching, it would have been obvious to form a structure of Hiner and Edwards comprising wherein the first pitch is less than 100 μm and the second pitch is greater than 100 μm such as taught by Kobayashi in order to carry out a connection through the via of desired dimensions.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VONGSAVANH SENGDARA whose telephone number is (571)270-5770. The examiner can normally be reached 9AM-6PM EST.
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/VONGSAVANH SENGDARA/Primary Examiner, Art Unit 2893