DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is in response to amendments and remarks filed December 8, 2025. Claims 41-60 are currently pending.
Response to Arguments
Applicant’s arguments with respect to claim(s) 41-60 have been considered but are moot because the new ground of rejection as set forth below.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 45, 46, 48, 49, 51, 56 and 57 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In regards to claims 45 and 56, the limitation “further comprising an oxide semiconductor layer” with the limitation “a photoelectric conversion layer” in claim 1 and 52 is unclear. The combination is unclear because according to paragraphs 35 and 137 and figures 46A-46E, the photoelectric conversion layer is a stacked layer with a lower and an upper photoelectric conversion layer, where the lower photoelectric conversion layer is an oxide semiconductor layer with indium (IGZO). The clarity issue is that the photoelectric conversion layer and the oxide layer are separate and distinct, yet the specification states the oxide semiconductor layer is the lower part of the photoelectric conversion layer. This is how the claim will be interpreted for examination. Please clarify.
Claims 46, 48, 49 and 51 are rejected because of their dependency on claim 45 and claim 57 is rejected because of its dependency on claim 56.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 41-60 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-19 of U.S. Patent No. 10468451 in view of Tashiro et al. (US 20170162616).
In regards to claims 41, 52 and 59, 10468451 teaches and electronic apparatus including an imaging device (claim 1, 17 and 18), the imaging device comprising: a plurality of pixels, each pixel of the plurality of pixels including a first photoelectric conversion unit disposed above and at a light-incident side of a substrate (claim 1, lines 2-8), the first photoelectric conversion unit including: a first electrode; a photoelectric conversion layer disposed above the first electrode; a second electrode disposed above the photoelectric conversion layer; a third electrode disposed at a same layer as the first electrode; an insulating material disposed between the third electrode and the photoelectric conversion layer, wherein a portion of the insulating material is disposed between the first electrode and the third electrode (claim 1, lines 9-20); and a transfer control electrode disposed between the first electrode and the third electrode (claim 5), but does not specifically teach wherein the transfer control electrode is connected to a driving circuit. Tashiro teaches a transfer control electrode (111) disposed between a first electrode (150) and a third electrode (112), wherein the transfer control electrode (111) is connected to a driving circuit (fig. 2 and 12, paragraph 77 and 177-179). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include a driving circuit connected to various electrodes in order to control the potential of the electrodes at different times to move charges in a desired manner providing for more efficient charge transfer and reduction in noise for improved image formation. The method of claim 59 is also taught by the above combination of 10468451 in claim 18 and Tashiro.
In regards to claims 42-51 and 53-58, the limitations are either taught but dependent claims 2-16 or are obvious additions to claim 41, 52 and 59.
Claims 41-60 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-24 of U.S. Patent No. 10714532 in view of Tashiro et al. (US 20170162616).
In regards to claims 41, 52 and 59, 10714532 teaches an electronic device including an imaging device (claim 1, 17, 18, 19 and 23), the imaging device comprising: a plurality of pixels, each pixel of the plurality of pixels including a first photoelectric conversion unit disposed above and at a light-incident side of a substrate (claim 1, lines 2-7), the first photoelectric conversion unit including: a first electrode, a photoelectric conversion layer disposed above the first electrode; a second electrode disposed above the photoelectric conversion layer; a third electrode disposed at a same layer as the first electrode; an insulating material disposed between the third electrode and the photoelectric conversion layer, wherein a portion of the insulating material is disposed between the first electrode and the third electrode (claim 1, lines 9-20); and a transfer control electrode disposed between the first electrode and the third electrode, wherein during a charge storage operation, a potential applied to the transfer control electrode is less than a potential applied to the third electrode (claims 5 and 6), but does not specifically teach wherein the transfer control electrode is connected to a driving circuit. Tashiro teaches a transfer control electrode (111) disposed between a first electrode (150) and a third electrode (112), wherein the transfer control electrode (111) is connected to a driving circuit (fig. 2 and 12, paragraph 77 and 177-179). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include a driving circuit connected to various electrodes in order to control the potential of the electrodes at different times to move charges in a desired manner providing for more efficient charge transfer and reduction in noise for improved image formation. The method of claim 59 is also taught by the above combination of 10714532 in claim 23 and Tashiro.
In regards to claims 42-51, 53-58 and 60, the limitations are either taught but dependent claims 2-18 or are obvious additions to claim 41, 52 and 59.
Claims 41-60 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 11348965 in view of Tashiro et al. (US 20170162616).
In regards to claims 41, 52 and 59, 11348965 teaches an imaging device (claims 1, 15 and 16), comprising: a plurality of pixels, each pixel of the plurality of pixels including a first photoelectric conversion unit disposed above and at a light-incident side of a substrate (claim 1, lines 1-7), the first photoelectric conversion unit including: a first electrode, a photoelectric conversion layer disposed above the first electrode; a second electrode disposed above the photoelectric conversion layer; a third electrode disposed at a same layer as the first electrode; an insulating material disposed between the third electrode and the photoelectric conversion layer, wherein a portion of the insulating material is disposed between the first electrode and the third electrode (claim 1, lines 9-38, claim 7); and a transfer control electrode disposed between the first electrode and the third electrode, wherein during a charge storage operation, a potential applied to the transfer control electrode is less than a potential applied to the third electrode (claim 1, lines 9-38 and claim 4, the fourth electrode is the transfer electrode), but does not specifically teach wherein the transfer control electrode is connected to a driving circuit. Tashiro teaches a transfer control electrode (111) disposed between a first electrode (150) and a third electrode (112), wherein the transfer control electrode (111) is connected to a driving circuit (fig. 2 and 12, paragraph 77 and 177-179). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include a driving circuit connected to various electrodes in order to control the potential of the electrodes at different times to move charges in a desired manner providing for more efficient charge transfer and reduction in noise for improved image formation. The method of claim 59 is also taught by the above combination of 11348965 in claims 2-4 and 20 and Tashiro.
In regards to claims 42-51, 53-58 and 60, the limitations are either taught but dependent claims 2-14 and 17-20 or are obvious additions to claim 41, 52 and 59.
Claims 41-60 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12027565 in view of Tashiro et al. (US 20170162616).
In regards to claims 41, 52 and 59, 12027565 teaches as electronic device including an imaging device (claims 1, 8 and 15), the imaging device comprising: a plurality of pixels, each pixel of the plurality of pixels including a first photoelectric conversion unit disposed above and at a light-incident side of a substrate (claim 1, lines 2-6), the first photoelectric conversion unit including: a first electrode; a photoelectric conversion layer disposed above the first electrode; a second electrode disposed above the photoelectric conversion layer; a third electrode disposed at a same layer as the first electrode; an insulating material disposed between the third electrode and the photoelectric conversion layer, wherein a portion of the insulating material is disposed between the first electrode and the third electrode; and a transfer control electrode disposed between the first electrode and the third electrode (claim 1, lines 7-32), but does not specifically teach wherein the transfer control electrode is connected to a driving circuit. Tashiro teaches a transfer control electrode (111) disposed between a first electrode (150) and a third electrode (112), wherein the transfer control electrode (111) is connected to a driving circuit (fig. 2 and 12, paragraph 77 and 177-179). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include a driving circuit connected to various electrodes in order to control the potential of the electrodes at different times to move charges in a desired manner providing for more efficient charge transfer and reduction in noise for improved image formation. The method of claim 59 is also taught by the above combination of 12027565 in claim 15 and Tashiro.
In regards to claims 42-51, 53-58 and 60, the limitations are either taught but dependent claims 2-7, 9-14 and 16-20 or are obvious additions to claim 41, 52 and 59.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 41, 47, 50, 52, 58 and 59 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sul et al. (US 20130093911) in view of Tashiro et al. (US 20170162616).
Re claims 41 and 52: Sul teaches an electronic device, comprising: an imaging device (fig. 1, 2 and 6) including a plurality of pixels (100), each pixel of the plurality of pixels including a first photoelectric conversion unit (210/215/222/221/223/280/240) disposed above and at a light-incident side of a substrate (270), the first photoelectric conversion unit (210/215/222/221/223/280/240) including: a first electrode (222), a photoelectric conversion layer (210) disposed above the first electrode (222); a second electrode (221) disposed above the photoelectric conversion layer (210); a third electrode (223) disposed at a same layer as the first electrode (222); an insulating material (280/240) disposed between the third electrode (223) and the photoelectric conversion layer (210) (see fig. 6, 280 of 280/240 is disposed between the photoelectric conversion layer 210 and the third electrode 223), wherein a portion of the insulating material (240 of 280/240) is disposed between the first electrode (222) and the third electrode (223) (see fig. 6), but does not specifically teach a transfer control electrode disposed between the first electrode and the third electrode, wherein the transfer control electrode is connected to a driving circuit. Tashiro teaches a transfer control electrode (111) disposed between a first electrode (150) and a third electrode (112), wherein the transfer control electrode (111) is connected to a driving circuit (fig. 2 and 12, paragraph 77 and 177-179). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include a transfer electrode and apply a desired potential with a driving circuit connected to various electrodes in order to control the potential of the electrodes at different times to move charges in a desired manner providing for more efficient charge transfer and reduction in noise for improved image formation.
Re claims 47 and 58: Sul as modified by Tashiro teaches the imaging device, wherein the photoelectric conversion layer (Sul, 210) is made of an organic material (Sul, paragraph 94).
Re claim 50: Sul as modified by Tashiro teaches the imaging device, wherein the third electrode (Sul, 228, Tashiro, 112) is configured to be applied with at least two different voltages (Sul, paragraphs 109, 110 and 120-125, Tashiro, paragraph 73).
Re claim 59: Sul teaches a method of driving an imaging device (fig. 1, 2 and 6), the method comprising: applying a first potential (2V) to a third storage electrode (228, third electrode) during a charging period (paragraphs 109 and 110); applying a second potential (0V) to a first electrode (222) during a charging period, wherein the first potential is greater than the second potential (paragraphs 109 and 110); applying a third potential (0V) to the charge storage electrode (223) during a charge transfer period (paragraphs 120-125); and applying a fourth potential (2V) to the first electrode (222) during the charge transfer period, wherein the fourth potential is greater than the third potential (paragraphs 120-125), and wherein the imaging device (fig. 1, 2 and 6) includes a plurality of pixels (110), a plurality of pixels (100), each pixel of the plurality of pixels including a first photoelectric conversion unit (210/215/222/221/223/280/240) disposed above and at a light-incident side of a substrate (270), the first photoelectric conversion unit (210/215/222/221/223/280/240) including: a first electrode (222), a photoelectric conversion layer (210) disposed above the first electrode (222); a second electrode (221) disposed above the photoelectric conversion layer (210); a third electrode (223) disposed at a same layer as the first electrode (222); an insulating material (280/240) disposed between the third electrode (223) and the photoelectric conversion layer (210) (see fig. 6, 280 of 280/240 is disposed between the photoelectric conversion layer 210 and the third electrode 223), wherein a portion of the insulating material (240 of 280/240) is disposed between the first electrode (222) and the third electrode (223) (see fig. 6), but does not specifically teach a transfer control electrode disposed between the first electrode and the third electrode, wherein the transfer control electrode is connected to a driving circuit. Tashiro teaches a transfer control electrode (111) disposed between a first electrode (150) and a third electrode (112), wherein the transfer control electrode (111) is connected to a driving circuit (fig. 2 and 12, paragraph 77 and 177-179). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include a transfer electrode and apply a desired potential with a driving circuit connected to various electrodes in order to control the potential of the electrodes at different times to move charges in a desired manner providing for more efficient charge transfer and reduction in noise for improved image formation.
Claim(s) 42, 53 and 60 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sul et al. (US 20130093911) as modified by Tashiro et al. (US 20170162616) as applied to claim 41 above, and further in view of Yamaguchi (US 20130033628).
Re claims 42, 53 and 60: Sul as modified by Tashiro teaches the first photoelectric conversion unit (Sul, 210/215/222/280/223/221) disposed above and at a light-incident side of a substrate (Sul, 270) (Sul, see fig. 6), but does not specifically teach wherein each of the plurality of pixels further comprises a second photoelectric conversion unit disposed in the substrate. Yamaguchi teaches wherein each of a plurality of pixels further comprises a second photoelectric conversion unit (29/PD1) disposed in a substrate (22) and a first photoelectric conversion unit (39) above the substrate (22) (see fig. 1). It would have been obvious to one of ordinary skill In the art at the time the invention was filed to include a second photoelectric conversion unit in the substrate similar to Yamaguchi with the substrate of Sul as modified by Tashiro in order to increase color sensitivity in a single pixel element by using a stacked photoelectric conversion units providing for improved color image formation.
Claim(s) 43 and 54 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sul et al. (US 20130093911) as modified by Tashiro et al. (US 20170162616) and Yamaguchi (US 20130033628) as applied to claim 42 above, and further in view of Yokoyama (US 20060201546).
Re claims 43 and 54: Sul as modified by Tashiro and Yamaguchi teaches the imaging device, wherein the substrate includes a third photoelectric conversion unit (Yamaguchi, 32/PD2), and wherein each of the second (Yamaguchi, 29/PD1), first (Yamaguchi, 39, Sul, 210/215/222/280/223/221) and third (Yamaguchi, 32/PD2) photoelectric conversion units are coupled to separate transfer elements (Yamaguchi, fig. 1, Tr11, Tr12, Tr13), but does not specifically teach separate signal lines. Yokoyama teaches an imaging device (fig. 1), wherein a substrate (p-Si substrate) (fig. 1) includes a second photoelectric conversion unit (B, pn) and a third photoelectric conversion unit (R, pn); a first photoelectric conversion unit (G with the transparent electrodes); and wherein each of the first, second, and third photoelectric conversion units are coupled to separate signal lines (see fig. 1, each of the photoelectric conversion units R, G and B have their own output signal lines labelled R, G and B). It would have been obvious to one of ordinary skill in the a al the time the invention was filed to include separate signal lines for each of the photoelectric conversion units in Sul as modified by Takahashi and Yamaguchi in order to reduce output signal cross talk increasing signal to noise ratio providing for higher quality output signals of the blue red and green signals from their respective photoelectric conversion units.
Claim(s) 44 and 55 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sul et al. (US 20130093911) as modified by Tashiro et al. (US 20170162616) as applied to claim 41 above, and further in view of Choo et al. (US 20130093932).
Re claims 44 and 55: Sul as modified by Tashiro teaches the insulating material (Sul, 280/240) disposed between the third electrode (Sul, 223) and the photoelectric conversion layer (Sul, 210) (Sul, see fig. 6, 280 of 280/240 is disposed between the photoelectric conversion layer 210 and the third electrode 223), wherein a portion of the insulating material (Sul, 240 of 280/240) is disposed between the first electrode (Sul, 222) and the third electrode (Sul, 223) (Sul, see fig. 6), but does not specifically teach wherein at least a part of the insulating material is disposed above the first electrode. Choo teaches wherein at least a part of an insulating material (41) is disposed above a first electrode (31a) (see fig. 10E). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to have a part of the insulating material disposed above the first electrode similar to Choo with the insulating material and first electrode of Sul as modified by Tashiro in order to ensure the charge is accumulated and/or transferred to specific regions of the photoelectric conversion element because of the location of the insulating material and based on potentials applied to electrodes providing for more efficient control of charge through the device allowing for more efficient image formation.
Claim(s) 45, 51 and 56 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sul et al. (US 20130093911) as modified by Tashiro et al. (US 20170162616) as applied to claim 41 above, and further in view of Takimoto (US 20150188065) and Choo et al. (US 20130093932).
Re claims 45 and 56: Sul as modified by Tashiro teaches comprising the photoelectric conversion layer (Sul, 210) includes a plurality of semiconductor layers (Sul, 212/211/215) provided above the first electrode (Sul, 222), wherein the insulating material (Sul, 280/240) disposed between the third electrode (Sul, 223) and the photoelectric conversion layer (Sul, 210) (Sul, see fig. 6, 280 of 280/240 is disposed between the photoelectric conversion layer 210 and the third electrode 223), wherein a portion of the insulating material (Sul, 240 of 280/240) is disposed between the first electrode (Sul, 222) and the third electrode (Sul, 223) (Sul, see fig. 6), but does not specifically further comprising an oxide semiconductor layer provided above the first electrode and wherein a part of the insulating material is disposed between the first electrode and the oxide semiconductor layer in a depth direction of the substrate. Takimoto teaches a photoelectric conversion layer (17/18) including an oxide semiconductor layer (17) provided above a first electrode (15) (paragraph 123, fig. 1). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include an oxide semiconductor layer similar to Takimoto with the photoelectric conversion layer above the first electrode of Sul as modified by Tashiro in order to block specific carriers from being readout reducing noise in the output providing for higher quality image formation. Sul as modified by Tashiro and Takimoto does not specifically teach wherein a part of the insulating material is disposed between the first electrode and the oxide semiconductor layer in a depth direction of the substrate. Choo teaches wherein a part of an insulating material (41) is disposed between a first electrode (31a) and semiconductor layer (45) in a depth direction of a substrate (see fig. 10E). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to have a part of the insulating material disposed above the first electrode similar to Choo with the insulating material and first electrode of Sul as modified by Tashiro in order to ensure the charge is accumulated and/or transferred to specific regions of the photoelectric conversion element because of the location of the insulating material and based on potentials applied to electrodes providing for more efficient control of charge through the device allowing for more efficient image formation.
Re claim 51: Sul as modified by Tashiro, Takimoto and Choo teaches the imaging device, wherein at least a part of the photoelectric conversion layer (Takimoto, 18) is disposed in an opening portion of the oxide semiconductor layer (Takimoto, 17, see fig. 28, different shape above the first electrode 15).
Claim(s) 46 and 57 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sul et al. (US 20130093911) as modified by Tashiro et al. (US 20170162616), Takimoto (US 20150188065) and Choo et al. (US 20130093932) as applied to claims 45 and 56 above, and further in view of Dairiki et al. (US 20160336363).
Re claims 46 and 57: Sul as modified by Tashiro, Takimoto and Choo teaches an oxide semiconductor layer (Takimoto, 17, paragraph 123), but does not specifically teach wherein the oxide semiconductor layer comprises indium. Dairiki teaches wherein an oxide semiconductor layer comprises indium (paragraph 79). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to use indium in the oxide semiconductor layer of Sul as modified by Tashiro, Takimoto and Choo similar to Dairiki in order to ensure the charge is accumulated and/or transferred to specific regions of the photoelectric conversion element because of the location of the insulating material and based on potentials applied to electrodes providing for more efficient control of charge through the device allowing for more efficient image formation.
Claim(s) 48 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sul et al. (US 20130093911) as modified by Tashiro et al. (US 20170162616), Takimoto (US 20150188065) and Choo et al. (US 20130093932) as applied to claim 45 above, and further in view of Hayashi et al. (US 20080035965).
Re claim 48: Sul as modified by Tashiro, Takimoto and Choo teaches the imaging device, the oxide semiconductor layer (Takimoto, 17, Sul, 215/212) of the photoelectric conversion layer (Sul, 211/215/212, see fig. 6, Takimoto, 17/18, paragraph 123), but does not specifically teach the layer includes a plurality of layers. Hayashi teaches wherein the oxide semiconductor layer includes a plurality of layers. Hayashi teaches wherein a semiconductor layer includes a plurality of layers (paragraphs 76, 77 and 84, fig. 4). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to have the semiconductor layer of Sul as modified by Tashiro, Takimoto and Choo include a plurality of layers similar to Hayashi in order to transfer or block desired charges in various regions providing for more efficient signal capture and image formation.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JENNIFER D BENNETT whose telephone number is (571)270-3419. The examiner can normally be reached 9AM-6PM EST M-F.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Georgia Epps can be reached at 571-272-2328. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JENNIFER D BENNETT/Examiner, Art Unit 2878
Prosecution Insights