DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 03/21/2024; the submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Objections
Claims 2, 3, and 6 objected to because of the following informalities: claim 2 discloses “the destination processor” but it has not been defined; Claim 6 discloses “n the third policy” looks like a typographical error; claim 6 also discloses “the source processor” without defining it. Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 8, 10-16 are rejected under 35 U.S.C. 103 as being unpatentable over US-20210409999-A1 to Chilla et al., from hereon Chilla in view of US-20200106865-A1 to Hasson et al., from hereon Hasson.
Regarding claim 1 Chilla teaches…an electronic device comprising: a plurality of processors; and a packet pre-processing circuit configured to (Fig. 2, P. 67 discloses an electronic device configured to send and receive wireless communication carrying out specific instructions of software application programs): but does not teach…determine a pre-processing policy, from among a plurality of policies, for a packet transmitted from a first processor, among plurality of processors, to a second processor, among the plurality of the processors based on packet information related to the first processor and the second processor, and perform a pre-processing operation on the packet based on the determined pre-processing policy.
Hasson teaches… determine a pre-processing policy, from among a plurality of policies, for a packet transmitted from a first processor, among plurality of processors, to a second processor, among the plurality of the processors based on packet information related to the first processor and the second processor, and perform a pre-processing operation on the packet based on the determined pre-processing policy (clm 1 discloses.. scheduling a plurality of data processors, comprising: receiving, by a network device, a packet; identifying, by the network device, characteristic information of the packet; determining, by the network device based on the characteristic information and a policy set, a first ordered set of the data processors for processing the packet, wherein the first ordered set comprises a first subset of the data processors, and wherein the first ordered set is represented by a first identifier; and sending, by the network device, the packet with the first identifier to a scheduling device for forwarding the packet).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Chilla by incorporating the teachings of Hasson because the method and device allow for various modes of that allows for execution of policies deployed on a network with M data processors to determine processing sequence determined dynamically by a policy set corresponding to a service (Hasson, Abs). The motivation is that by applying a well-known standard or protocol or machine to a system provides the system with significantly improved industrial applicability.
Regarding claim 8 Chilla and Hasson teach the electronic device of claim 1, Hasson teaches…wherein the first processor is an application processor and the second processor is a communication processor, and wherein the packet information comprises one of: application information configured to indicate an importance level of an application corresponding to the packet; session information configured to identify a session corresponding to the packet (claim 15 discloses… determine, based on the characteristic information and a policy set, a first ordered set of the data processing devices for processing the packet, wherein the first ordered set comprises a first subset of the data processing devices, and wherein the first ordered set is represented by a first identifier; and a scheduling device configured to: receive the packet with the first identifier from the identifying device; and forward, based on the first identifier, the packet to the data processing devices within the first ordered set in accordance with a first order indicated by the first identifier,); proxy transmission information configured to generate a response corresponding to the packet; first state information configured to indicate a state of the application processor; second state information configured to indicate a state of the communication processor; or network information configured to indicate a network corresponding to the packet.
Regarding claim 10 Chilla and Hasson teach the electronic device of claim 8, Hasson teaches…wherein the packet pre-processing circuit is further configured to acquire, from the application processor, first-type information that comprises at least one of the application information, the session information, the proxy transmission information, or the first state information, and acquire, from the communication processor, second-type information that comprises one of the second state information or the network information (claim 1 teaches… receiving, by a network device, a packet; identifying, by the network device, characteristic information of the packet; determining, by the network device based on the characteristic information and a policy set, a first ordered set of the data processors for processing the packet, wherein the first ordered set comprises a first subset of the data processors, and wherein the first ordered set is represented by a first identifier; and sending, by the network device, the packet with the first identifier to a scheduling device for forwarding the packet to at least a first portion of the first ordered set in accordance with a first order indicated by the first identifier. ).
Regarding claim 11 Chilla and Hasson teach the electronic device of claim 10, Chilla teaches…wherein the packet pre-processing circuit is further configured to actively update the first-type information by accessing the application processor and to passively update the second-type information depending on the communication processor (Fig. 7, P. 118 discloses the steps to determining the information with respect to the packets and updating and sending the packet to the corresponding destination).
Regarding claim 12 Chilla and Hasson teach the electronic device of claim 1, wherein the first processor is an application processor and the second processor is a communication processor, and the packet pre-processing circuit is further configured to enable bidirectional pre-processing operations for a first packet and a second packet, wherein a source processor of the first packet is the application processor and a destination processor of the first packet is the communication processor, and a source processor of the second packet is the communication processor and a destination processor of the second packet is the application processor (Fig. 12).
Regarding claim 13 Chilla and Hasson teach the electronic device of claim 1, Chilla teaches…wherein the packet pre-processing circuit is further configured to be separated from the first and the second processors (Fig. 6, item 630).
Regarding claim 14 Chilla and Hasson teach the electronic device of claim 1, Chilla teaches…wherein the packet pre-processing circuit is configured to be integrated with one of the first and the second processors (Fig. 6).
Regarding claim 15 Chilla and Hasson teach the electronic device of claim 1, Chilla teaches…wherein the plurality of processors comprise at least two of an application processor, a communication processor, a neural network processor, a digital signal processor, and a graphics processor (Fig. 6).
Regarding claim 16 Chilla teaches…a first electronic device comprising (Abs): a communication processor configured to perform data processing for communication with a second electronic device based on a network established between the first electronic device and the second electronic device (P. 33 discloses… various embodiments, the head-mounted device may be configured to perform all processing locally on the processor in the head-mounted device, offload all of the main processing to a processor in another computing device (e.g. a laptop present in the same room as the head-mounted device, etc.), or split the main processing operations between the processor in the head-mounted device and the processor in the other computing device. In some embodiments, the processor in the other computing device may be a server in “the cloud” with which the processor in the head-mounted device or in an associated wireless device communicates via a network connection (e.g., a cellular network connection to the Internet)); but does not teach…an application processor configured to transmit a first packet, which is generated based on a first application, to the communication processor; and a packet pre-processing circuit configured to: determine a first pre-processing policy for the first packet based on an importance level of the first application and a state of the communication processor, and perform a pre-processing operation on the first packet based on the determined first pre-processing policy.
Hasson teaches… an application processor configured to transmit a first packet, which is generated based on a first application, to the communication processor; and a packet pre-processing circuit configured to: determine a first pre-processing policy for the first packet based on an importance level of the first application and a state of the communication processor, and perform a pre-processing operation on the first packet based on the determined first pre-processing policy clm 1 discloses.. scheduling a plurality of data processors, comprising: receiving, by a network device, a packet; identifying, by the network device, characteristic information of the packet; determining, by the network device based on the characteristic information and a policy set, a first ordered set of the data processors for processing the packet, wherein the first ordered set comprises a first subset of the data processors, and wherein the first ordered set is represented by a first identifier; and sending, by the network device, the packet with the first identifier to a scheduling device for forwarding the packet).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Chilla by incorporating the teachings of Hasson because the method and device allow for various modes of that allows for execution of policies deployed on a network with M data processors to determine processing sequence determined dynamically by a policy set corresponding to a service (Hasson, Abs). The motivation is that by applying a well-known standard or protocol or machine to a system provides the system with significantly improved industrial applicability.
Claim(s) 9 is rejected under 35 U.S.C. 103 as being unpatentable over US-20210409999-A1 to Chilla et al., from hereon Chilla and US-20200106865-A1 to Hasson et al., from hereon Hasson in view of US-10979975-B2 to Lin et al., from hereon Lin.
Regarding claim 9 Chilla and Hasson teach the electronic device of claim 8, but does not teach…wherein the second state information comprises: radio resource control (RRC) connection information configured to indicate a connection state of RRC; and power saving mode (PSM) information configured to indicate whether the communication processor operates in a power saving mode.
Lin teaches… wherein the second state information comprises: radio resource control (RRC) connection information configured to indicate a connection state of RRC; and power saving mode (PSM) information configured to indicate whether the communication processor operates in a power saving mode (Col. 6, Lns. 5-25).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Chilla and Hasson by incorporating the teachings of Lin because the method and device allow for maintaining radio resource control (RRC) connections with UE and network devices in mobile communication transmitting layer-2 packets (Lin, Abs). The motivation is that by applying a well-known standard or protocol or machine to a system provides the system with significantly improved industrial applicability.
Claim(s) 20 is rejected under 35 U.S.C. 103 as being unpatentable over US-20210409999-A1 to Chilla et al., from hereon Chilla in view of US-20130290407-A1 to Maiya et al., from hereon Maiya.
Regarding claim 20 Chilla teaches…an electronic device comprising (abs): and a packet pre-processing circuit configured to perform a pre-processing operation on a packet that is transmitted from a first IP, among the plurality of IPs to a second IP, among the plurality of IPs based on packet information related to at least one of the first IP and the second IP, but does not teach…a plurality of intellectual properties (IPs) (note: Intellectual properties was interpreted as per the definition of the specification as a backup internet protocol address; networking devices it is known in the art that they can have backup IP addresses to allow for multi-routing, backup gateways, dual path and other mechanism to increase its robustness); wherein the pre-processing operation comprises one of a delay transmission operation, a proxy transmission operation, and a packet drop operation.
Maiya teaches… a plurality of intellectual properties (IPs) (note: Intellectual properties was interpreted as per the definition of the specification as a backup internet protocol address; networking devices it is known in the art that they can have backup IP addresses to allow for multi-routing, backup gateways, dual path and other mechanism to increase its robustness); (P.45 discloses the processing per each transaction (packet) configured to route messages to alternate IP addresses and connection ports when the primary IP address is not able to service the request); wherein the pre-processing operation comprises one of a delay transmission operation, a proxy transmission operation, and a packet drop operation (P.72 discloses the dropping of transactions, packets, services due to channel information and route availability).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Chilla by incorporating the teachings of Maiya because the method and device allow for various modes of that allows for execution of transactions in a channel and forward the transaction based on the available of the channel and its information for routing (Maiya, Abs). The motivation is that by applying a well-known standard or protocol or machine to a system provides the system with significantly improved industrial applicability.
Allowable Subject Matter
Claims 2-7, 17-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the main reason for objecting of the claims under discussion is the inclusion of “a first policy in which the pre-processing operation of the packet by the packet pre-processing circuit is bypassed and the packet is transmitted to the second processor; a second policy in which the packet is transmitted with a delay to the destination processor; a third policy in a which a response with respect to the packet is proxy-transmitted on behalf of the destination processor; and a fourth policy in which the packet is dropped”, determine whether power saving for the communication processor is required, based on the importance level of the first application satisfying a first condition and the communication processor is in a radio resource control (RRC) idle state or operates in the power saving mode, wherein the first pre-processing policy comprises one of a first policy of delay-transmitting the first packet to the first destination processor, a second policy of proxy-transmitting a response with respect to the first packet on behalf of the first destination processor, and a third policy of dropping the first packet, “the packet pre-processing circuit is further configured to determine, as the first pre-processing policy, a policy of delay-transmitting the first packet to the first destination processor based on the network, when the network relates to satellite communication”,“wherein the communication processor is configured to transmit a second packet, which is generated by performing the data processing, to the application processor as a second destination processor, wherein the packet pre-processing circuit is further configured to: determine whether power saving for the application processor is required based on the importance level of a second application corresponding to the second packet and a state of the application processor, determine a second pre-processing policy for the second packet based on a determined result, and perform a pre-processing operation on the second packet based on the determined second pre-processing policy”, as the prior art of record in stand-alone form nor in combination read into the discloses claim as supported by the specification. Furthermore, the nearest prior art such as US-11855898-B1 to Baumann, Choi, "A design of virtual machine aware flow switch in the cloud based network function virtualization system," 2017 19th International Conference on Advanced Communication Technology (ICACT), PyeongChang, Korea (South), 2017, pp. 98-101, and Lan, "A real-time network traffic analysis and QoS management platform," 2017 IEEE 9th International Conference on Communication Software and Networks (ICCSN), Guangzhou, China, 2017, pp. 266-270, as they are silent on the transmission of the packets from one processor to the next processor in the processing chain based on bypass, delay, proxy-transmission as indicated in the policy; (note: Intellectual properties was interpreted as per the definition of the specification as a backup internet protocol address; networking devices it is known in the art that they can have backup IP addresses to allow for multi-routing, backup gateways, dual path and other mechanism to increase its robustness).
Claims 3-7 are allowed as they depend from an objected (allowed) claim.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO form PTO-892:. US-11855898-B1 to Baumann, Choi, "A design of virtual machine aware flow switch in the cloud based network function virtualization system," 2017 19th International Conference on Advanced Communication Technology (ICACT), PyeongChang, Korea (South), 2017, pp. 98-101, and Lan, "A real-time network traffic analysis and QoS management platform," 2017 IEEE 9th International Conference on Communication Software and Networks (ICCSN), Guangzhou, China, 2017, pp. 266-270,
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LOUIS SAMARA whose telephone number is (408)918-7582. The examiner can normally be reached Monday - Friday 6-3 PT.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ayaz Sheikh can be reached at 571-272-3795. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/L.S./Examiner, Art Unit 2476
/AYAZ R SHEIKH/Supervisory Patent Examiner, Art Unit 2476