Prosecution Insights
Last updated: April 19, 2026
Application No. 18/613,346

SYSTEM AND METHODS FOR PHYSICAL IDENTIFICATION OF MANUFACTURED PRODUCTS

Non-Final OA §101§102§103
Filed
Mar 22, 2024
Examiner
CRAWLEY, TALIA F
Art Unit
3627
Tech Center
3600 — Transportation & Electronic Commerce
Assignee
Microchip Technology Inc.
OA Round
1 (Non-Final)
48%
Grant Probability
Moderate
1-2
OA Rounds
3y 6m
To Grant
74%
With Interview

Examiner Intelligence

Grants 48% of resolved cases
48%
Career Allow Rate
395 granted / 823 resolved
-4.0% vs TC avg
Strong +26% interview lift
Without
With
+25.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
62 currently pending
Career history
885
Total Applications
across all art units

Statute-Specific Performance

§101
27.3%
-12.7% vs TC avg
§103
41.8%
+1.8% vs TC avg
§102
18.7%
-21.3% vs TC avg
§112
5.1%
-34.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 823 resolved cases

Office Action

§101 §102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings as submitted by Applicant on 03/22/2024 has been accepted. Disposition of Claims Claims 1-13 are pending in the instant application. Claims 14-22 have been cancelled herein. No claims have been added. No claims have been amended. The rejection of the pending claims is hereby made non-final. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-13 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (an abstract idea) without significantly more. Under step 1 of the MPEP 2106 Guidelines, it must be considered whether the claims are directed to one of the four statutory classes of invention. In the instant case, claims 1-13 are directed to a system for physical identification of manufactured products, which falls within one of the four statutory categories of inventions process/apparatus). Accordingly, the claims will be further analyzed under revised step 2 of the MPEP 2106 Guidelines: Under revised step 2A (prong 1) of the MPEP 2106 Guidelines, it must be considered whether the claims are “directed to” an abstract idea by referring to the groupings of subject matter. Under the MPEP 2106 Guidelines, certain methods of organizing human activity include fundamental economic principles or practices (including hedging, insurance, mitigating risk); commercial or legal interactions (including agreements in the form of contracts; legal obligations; advertising, marketing or sales activities or behaviors; business relations); managing personal behavior or relationships or interactions between people (including social activities, teaching, and following rules or instructions). Regarding representative independent claim 1, the claim sets forth a system for physical identification of manufactured products further comprising: A tracking file wherein the one or more data elements are matched to the manufactured product, the tracking file to be updated based on one or more supply chain operations The above-recited limitations set forth an arrangement to track changes associated with a manufactured product during various operations such as shipping, manufacturing, or testing. This arrangement amounts to certain methods of organizing human activity associated with sales activities and commercial interactions involving tracking changes to a product within a manufacturing and sales process. Such concepts have been considered ineligible certain methods of organizing human activity by the Courts (See 2019 Revised Patent Subject Matter Eligibility Guidance). The revised Step 2A (prong 2) of the MPEP 2106 Guidelines, is the next step in the eligibility analyses and looks at whether the abstract idea is integrated into a practical application. This requires an additional element or combination of additional elements in the claims to apply, rely on, or use the judicial exception in a manner that imposes a meaningful limit on the judicial exception, such that the claim is more than a drafting effort designed to monopolize the exception. In this instance, the claims recite the additional elements such as: A manufactured product further comprising a semiconductor However, these elements do not amount to an improvement in the functioning of a computer or any other technology or technical field, apply the judicial exception with, or by use of, a particular machine, or apply or use the judicial exception in some other meaningful way beyond generally linking the use of the judicial exception to a particular technological environment, such that the claim as a whole is more than a drafting effort designed to monopolize the exception. In addition, the recitations above are recited at a high level of generality and also do not amount to an improvement in the functioning of a computer or any other technology or technical field, apply the judicial exception with, or by use of, a particular machine, or apply or use the judicial exception in some other meaningful way beyond generally linking the use of the judicial exception to a particular technological environment, such that the claim as a whole is more than a drafting effort designed to monopolize the exception. Dependent claims 2-15 also fail to recite elements which amount to an improvement in the functioning of a computer or any other technology or technical field, apply the judicial exception with, or by use of, a particular machine, or apply or use the judicial exception in some other meaningful way beyond generally linking the use of the judicial exception to a particular technological environment, such that the claim as a whole is more than a drafting effort designed to monopolize the exception. For example, dependent claims 2-15 are directed to the abstract idea itself and do not amount to an integration according to any one of the considerations above. Step 2B is the next step in the eligibility analyses and evaluates whether the claims recite additional elements that amount to an inventive concept (i.e., “significantly more”) than the recited judicial exception. According to Office procedure, revised Step 2A overlaps with Step 2B, and thus, many of the considerations need not be re-evaluated in Step 2B because the answer will be the same. In Step 2A, several additional elements were identified as additional limitations: A manufactured product further comprising a semiconductor These additional limitations, including the limitations in the independent claims and dependent claims, do not amount to an inventive concept because they were already analyzed under Step 2A and did not amount to a practical application of the abstract idea. For these reasons, the claims are rejected under 35 U.S.C. 101. Appropriate correction and/or clarification is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-3, 6, 8, 12, and 13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Khor et al (US 9,697,402). Regarding claim 1, the prior art discloses a system comprising: a manufactured product (see at least column 2, lines 46-47 to Khor et al) comprising a machine-readable physical identifier, the machine-readable physical identifier to encode one or more data elements related to the manufactured product (see at least column 2, lines 54-60 to Khor et al); and a tracking file wherein the one or more data elements are matched to the manufactured product (see at least column 2, lines 60-62 to Khor et al), the tracking file to be updated based on one or more supply chain operations (see at least column 2, lines 39-45 to Khor et al). Regarding claim 2, the prior art discloses the system as claimed in claim 1, the machine-readable physical identifier to encode one or more numerical values and one or more alphanumeric values (see at least column 2, lines 65-66 and column 3, lines 1-4 to Khor et al). Regarding claim 3, the prior art discloses the system as claimed in claim 1, the machine-readable physical identifier comprising a Data Matrix code (see at least column 2, lines 52-62 to Khor et al). Regarding claim 6, the prior art discloses the system as claimed in claim 1, the one or more supply chain operations comprising one or more of a manufacturing, shipping, or testing operation (see at least column 2, lines 38-67 to column 3, lines 1-34 to Khor et al). Regarding claim 8, the prior art discloses the system as claimed in claim 1, the tracking file to be updated with testing results of the manufactured product (see at least column 3, lines 39-45 to Khor et al). Regarding claim 12, the prior art discloses the system as claimed in claim 10, the tracking file comprising results of a pass/fail testing operation performed on the manufactured product by an automated test program (see at least column 2, lines 63-67 to column 3, lines 1-4 to Khor et al). Regarding claim 13, the prior art discloses the system as claimed in claim 10, the tracking file comprising numerical results of a parametric testing operation performed on the manufactured product by an automated test program (see at least column 2, lines 63-67 to column 3, lines 1-4 to Khor et al). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 4, 5, 7, 9, and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Khor et al (US 9,697,402) in view of Taylor (US 10,108,925). Regarding claim 4, the prior art discloses the system as claimed in claim 1, but does not appear to disclose the machine-readable physical identifier comprising a Quick Response (QR) code. However, Taylor discloses a chip tracking system and method with a marking database, further comprising the machine-readable physical identifier comprising a Quick Response (QR) code (see at least Figure 1 to Taylor). The examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). The examiner submits that the combination of the teaching of the system and method for integrated circuit handling and tracking, as disclosed by Khor et al and the chip tracking system and method with the marking database as taught by Taylor, in order to provide improved semiconductor inventory tracking (see at least Abstract, to Taylor) could have been readily and easily implemented, with a reasonable expectation of success. As such, the aforementioned combination is found to be obvious to try, given the state of the art at the time of filing. Regarding claim 5, the prior art discloses the system as claimed in claim 1, but does not appear to disclose the machine-readable physical identifier to be encoded using an error-correcting code. However, Taylor discloses a chip tracking system and method with a marking database, further comprising the machine-readable physical identifier to be encoded using an error-correcting code (see at least Figure 2, to Taylor). The examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). The examiner submits that the combination of the teaching of the system and method for integrated circuit handling and tracking, as disclosed by Khor et al and the chip tracking system and method with the marking database as taught by Taylor, in order to provide improved semiconductor inventory tracking (see at least Abstract, to Taylor) could have been readily and easily implemented, with a reasonable expectation of success. As such, the aforementioned combination is found to be obvious to try, given the state of the art at the time of filing. Regarding claim 7, the prior art discloses the system as claimed in claim 1, but does not appear to disclose the machine-readable physical identifier to encode manufacturing date and lot number information of the manufactured product. However, Taylor discloses a chip tracking system and method with a marking database, further comprising the machine-readable physical identifier to encode manufacturing date and lot number information of the manufactured product (see at least column 3, lines 21-48 to Taylor). The examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). The examiner submits that the combination of the teaching of the system and method for integrated circuit handling and tracking, as disclosed by Khor et al and the chip tracking system and method with the marking database as taught by Taylor, in order to provide improved semiconductor inventory tracking (see at least Abstract, to Taylor) could have been readily and easily implemented, with a reasonable expectation of success. As such, the aforementioned combination is found to be obvious to try, given the state of the art at the time of filing. Regarding claim 9, the prior art discloses the system as claimed in claim 1, but does not appear to disclose the tracking file to be updated with shipping dates and locations of the manufactured product. However, Taylor discloses a chip tracking system and method with a marking database, further comprising the tracking file to be updated with shipping dates and locations of the manufactured product (see at least column 6, lines 21-48 and column 7, lines 1-4 to Taylor). The examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). The examiner submits that the combination of the teaching of the system and method for integrated circuit handling and tracking, as disclosed by Khor et al and the chip tracking system and method with the marking database as taught by Taylor, in order to provide improved semiconductor inventory tracking (see at least Abstract, to Taylor) could have been readily and easily implemented, with a reasonable expectation of success. As such, the aforementioned combination is found to be obvious to try, given the state of the art at the time of filing. Regarding claim 10, the prior art discloses the system as claimed in claim 1, but does not appear to disclose the manufactured product comprising a semiconductor device in an encapsulated package, and the machine-readable physical identifier comprising a Data Matrix code printed on the encapsulated package. However, Taylor discloses a chip tracking system and method with a marking database, further comprising the manufactured product comprising a semiconductor device in an encapsulated package, and the machine-readable physical identifier comprising a Data Matrix code printed on the encapsulated package (see at least column 3, lines 21-48 to Khor et al). The examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). The examiner submits that the combination of the teaching of the system and method for integrated circuit handling and tracking, as disclosed by Khor et al and the chip tracking system and method with the marking database as taught by Taylor, in order to provide improved semiconductor inventory tracking (see at least Abstract, to Taylor) could have been readily and easily implemented, with a reasonable expectation of success. As such, the aforementioned combination is found to be obvious to try, given the state of the art at the time of filing. Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Khor et al (US 9,697,402) in view of Taylor (US 10,108,925) and further in view of Littlejohn (US 2017/00601201). Regarding claim 11, the prior art discloses the system as claimed in claim 10, but does not appear to disclose the machine-readable physical identifier to encode a row location and a column location of a manufactured product in a tape-and-reel package. However, Littejohn discloses a system and method for horizontal infrastructure handling for integrated circuit devices, further comprising the machine-readable physical identifier to encode a row location and a column location of a manufactured product in a tape-and-reel package (see at least paragraph [0044] and [0048] to Littlejohn). The examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). The examiner submits that the combination of the teaching of the system and method for integrated circuit handling and tracking, as disclosed by Khor et al and the chip tracking system and method with the marking database as taught by Taylor, further in view of the horizontal infrastructure handling system and method for integrated circuit devices, as disclosed by Littlejohn, in order to provide improved semiconductor inventory tracking (see at least Abstract, to Taylor) could have been readily and easily implemented, with a reasonable expectation of success. As such, the aforementioned combination is found to be obvious to try, given the state of the art at the time of filing. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The examiner has considered all references listed on the Notice of References Cited, PTO-892. The examiner has considered all references cited on the Information Disclosure Statement submitted by Applicant, PTO-1449. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TALIA F CRAWLEY whose telephone number is (571)270-5397. The examiner can normally be reached on Monday thru Thursday; 8:30 AM-4:30 PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fahd A Obeid can be reached on 571-270-3324. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TALIA F CRAWLEY/Primary Examiner, Art Unit 3627
Read full office action

Prosecution Timeline

Mar 22, 2024
Application Filed
Nov 01, 2025
Non-Final Rejection — §101, §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
48%
Grant Probability
74%
With Interview (+25.8%)
3y 6m
Median Time to Grant
Low
PTA Risk
Based on 823 resolved cases by this examiner. Grant probability derived from career allow rate.

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