DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 17 October 2025 has been entered.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 13-16 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claim 13:
It recites “a first plate of the reference capacitor is connected to a gate line for said pixel,” and also “a second reset VCI;” “wherein a conduction path of the second reset VCI is connected to the first plate of the reference capacitor.”
This combination of subject matter was not disclosed in the specification at the time the application was filed.
In applicant’s Fig. 5 the first plate of the reference capacitor is connected to a gate line for said pixel as shown:
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But in this figure there is not a second reset VCI. There is just a single reset VCI 34. So Fig. 5 does not show this combination of subject matter.
In applicant’s Fig. 6 there is a second reset VCI:
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But in this figure the first plate of the reference capacitor is not connected to a gate line. It is instead connected to transistor 30. Therefore it also does not show this combination of subject matter.
Therefore applicant is claiming a combination of subject matter that was not disclosed in the specification at the time the application was filed.
Regarding claims 14-16:
They are dependent on claim 13.
Claims 13-16 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention.
As just discussed, the claimed combination of subject matter is not described in the specification.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim13-16 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
As just discussed, the claimed combination of subject matter is not described in the specification, and therefore cannot be said to be the subject matter the inventor regards as the invention.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 17-19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US 2018/0239940).
Regarding claim 17:
Kim discloses:
A capacitive sensor comprising a plurality of pixels (paragraph 6), each pixel comprising:
a capacitive sensing electrode (Fig. 6: C2);
a reference capacitor (Fig. 6: C1);
a sense voltage-controlled impedance, VCI (Fig. 6: T1); and
a select VCI (Fig. 6: T2);
wherein a first plate of the reference capacitor is connected to a gate line for said pixel (as seen in Fig. 6: it is connected to gate line SSi), and wherein a second plate of the reference capacitor is connected to each of a control terminal of the sense VCI (this is the gate of T1) and the capacitive sensing electrode (this is C2); and
wherein the select VCI is configured to selectively connect the sense VCI to a reference signal supply to selectively permit the sense VCI to output, on a read-out line of the pixel (Fig. 6: Oj) a readout signal indicative of a proximity to the capacitive sensing electrode of a conductive object (paragraph 124),
wherein the readout signal of the sense VCI is controlled primarily by a voltage difference between the read-out line and the capacitive sensing electrode (at least true in the case where NMOS transistors are used as per paragraph 135 – see discussion below).
Regarding claim 18:
Kim discloses:
wherein the sensor is configured to activate a pixel by operating the select VCI of that pixel to connect the sense VCI of that pixel to the reference signal supply to permit said sense VCI to output a readout signal (paragraph 124).
Regarding claim 19:
Kim discloses:
wherein the sensor is configured to activate said pixel by applying a gate drive signal to the gate line for said pixel (paragraph 124).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3-12, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2018/0239940) in view of Kim et al. (US 2019/0012504; hereafter Kim ‘504).
Regarding claim 1:
Kim discloses:
A capacitive sensor comprising a plurality of pixels (paragraph 6), each pixel comprising:
a capacitive sensing electrode (Fig. 6: C2);
a reference capacitor (Fig. 6: C1);
a sense voltage-controlled impedance, VCI (Fig. 6: T1);
a select VCI (Fig. 6: T2); and
a reset VCI (Fig. 6: T3);
wherein a first plate of the reference capacitor is connected to a gate line for said pixel (as seen in Fig. 6: it is connected to gate line SSi), and wherein a second plate of the reference capacitor is connected to each of: a conduction path of the reset VCI (as seen in Fig. 6 – this is T3), a control terminal of the sense VCI (as seen in Fig. 6 – this is T1), and the capacitive sensing electrode (as seen in Fig. 6: this is C2).
wherein the select VCI is configured to selectively connect the sense VCI to a reference signal supply (Fig. 6: it connects it to reference voltage line Pj).
wherein the reset VCI is configured to selectively connect the control terminal of the sense VCI to a reset voltage provider (as seen in Fig. 6; paragraph 72).
Kim does not disclose:
“wherein the reset voltage provider is different than the reference signal supply.”
Kim ‘504 discloses:
wherein the reset voltage provider is different to the reference signal supply (seen in, e.g., Fig. 7: the reset voltage provider is VL1)
It would have been obvious to one of ordinary skill in the art at the time the application was filed to include in Kim the elements taught by Kim ‘504.
The rationale is as follows:
Kim and Kim ‘504 are directed to the same field of art.
Kim ‘504 discloses that the initialization voltage can be set to control different threshold voltages of the sense transistor (paragraphs 89-90). This is a known improvement that one of ordinary skill in the art could have included with predictable results.
Regarding claim 3:
Kim in view of Taghibakhsh discloses:
wherein the select VCI is configured to selectively connect the sense VCI to the reference signal supply to selectively permit the sense VCI to output a readout signal indicative of a proximity to the capacitive sensing electrode of a conductive object (e.g., Kim paragraph 17).
Regarding claim 4:
Kim in view of Kim ‘504 discloses:
wherein a control terminal of the select VCI is connected to the gate line for said pixel (as seen in Kim Fig. 6: the gate of T2 is connected to the gate line).
Regarding claim 5:
Kim in view of Kim ‘504discloses:
wherein the sensor is configured to activate a pixel by operating the select VCI of that pixel to connect the sense VCI of that pixel to the reference signal supply to permit said sense VCI to output a readout signal (Kim paragraph 124).
Regarding claim 6:
Kim in view of Kim ‘504 discloses:
wherein the select VCI is arranged to inhibit a sense VCI outputting a readout signal when said pixel is not activated (follows from Kim paragraph 124).
Regarding claim 7:
Kim in view of Kim ‘504 discloses:
wherein a conduction path of the select VCI is connected between the reference signal supply and a conduction path of the sense VCI (shown in Kim Fig. 6).
Regarding claim 8:
Kim in view of Kim ‘504 discloses:
wherein the pixel is arranged so that an impedance of the sense VCI is controlled based on a capacitance from the capacitive sensing electrode, and wherein the select VCI is configured to selectively connect the sense VCI to a reference signal supply to permit the sense VCI to output a readout signal indicative of said capacitance (follows from Kim paragraphs 140-142)
Regarding claim 9:
Kim in view of Kim ‘504 discloses:
wherein the sensor is configured to reset the reference capacitor prior to a subsequent activation of the pixel (paragraph 128: “initialized”).
Regarding claim 10:
Kim in view of Kim ‘504 discloses:
wherein the sensor is configured to activate a sensor pixel by applying a gate drive signal to the gate line for that pixel (Kim paragraph 124).
Regarding claim 11:
Kim in view of Kim ‘504 discloses:
wherein activating the pixel comprises applying the gate drive signal to the first plate of the reference capacitor and the select VCI (follows from Kim Fig. 6 and, e.g., paragraphs 138-139).
Regarding claim 12:
Kim in view of Kim ‘504 discloses:
wherein the sensor is configured to apply the gate drive signal to the select VCI to cause the select VCI to connect the sense VCI to the reference signal supply to permit the sense VCI to output a readout signal indicative of a proximity to the capacitive sensing electrode of a conductive object (Kim paragraphs 138-139 and, e.g., paragraph 17).
Regarding claims 20:
All elements positively recited have already been identified with respect to earlier rejections. No further elaboration is necessary.
Claim 21:
Kim, etc., discloses:
wherein the sense VCI is configured to output, on a read-out line of the pixel, a readout signal indicative of a proximity to the capacitive sensing electrode of a conductive object (this is just the finger as per, e.g., paragraph 53), and wherein the readout signal of the sense VCI is controlled primarily by a voltage difference between the read-out line and the capacitive sensing electrode (as discussed earlier, true at the very least in the case of NMOS transistors).
Response to Arguments
Applicant's arguments filed 17 October 2025 have been fully considered but they are not persuasive.
Both applicant’s arguments and the declaration filed 17 October 2025 (referred to by applicant as the “Derckx Delcaration”) have been reviewed.
Applicant first argument (stating page 7) argues with the rejection of claims 17, etc., as anticipated by Kim.
The argument here is laid out in detail the Derckx Declaration – in particular beginning in paragraph 14. Summed up, it is that Kim Fig. 6 shows PMOS transistors. Because they are PMOS transistors applicant makes assumptions about the flow of current, and therefore argues the current Io is controlled by the voltage difference between the node N1 and the node N2, and not by the difference between the output line and the node N2.
But Kim discloses that instead of PMOS transistors, NMOS transistors could be used (paragraph 135). If they are NMOS transistors the current flow would be reversed and the claimed relationship would be true. Otherwise the circuit would not have to be changed in the least and it would in fact be almost identical to applicant’s Fig. 5 (with the exception of the power supplied to the reset transistor, which is not claimed here).
Therefore although the Derckx Declaration might be correct in that the circuit shown in Fig. 6 might not function in the claimed way, applicant has not taken into account the possible variations disclosed by Kim. In the declaration it is argued there is “no reason” to modify Kim in this way (paragraph 20), but Kim explicitly discloses this. No modification is required. All that is required here is relying on the variant disclosed by Kim.
Applicant’s next argument (starting page 9) argues that the combination of Kim in view of Taghibakhsh is improper. This is essentially based on the same set of reasoning: that Kim uses PMOS transistors and therefore the negative voltage disclosed by Taghibakhsh would prevent the circuit from working.
There are two problems with this argument. The first is that as just discussed above, Kim discloses that NMOS transistors could be used instead. In that case the voltages taught by Taghibakhsh might be appropriate. So this combination is still suggested by the prior art as a whole.
But secondly, what is taken from Taghibakhsh here is just that it is useful to have a controllable reset voltage. The exact voltages disclosed by Taghibakhsh do not have to be relied upon – one of ordinary skill in the art is certainly capable of taking the teaching of an independently controllable voltage and choosing the appropriate voltage to apply to the circuit of Kim. One of ordinary skill would not simply blindly take Taghibakhsh’s exact values – they would take the circuit of Kim into account.
Nonetheless, in order to show clearly that Taghibakhsh’s negative voltage discussion does not have to be relied upon, Kim ‘504 is now relied upon for this element. The teaching of Kim ‘504 should address the concerns that applicant had with Taghibakhsh.
Applicant next (starting the bottom of page 11) argues that the new limitations of claim 13 render it allowable. It is true that Kim does not disclose a second reset VCI. However, as noted above, the total combination of subject matter in this claim is not disclosed in applicant’s specification either. Note it cannot even be argued that the first plate of the reference capacitor is connected to the gate line through the transistor 30 because although the gate line is used to control the transistor, the plate is actually connected to the reference signal supply.
There may be prior art that shows a second reset VCI, but since the metes and bounds of the claim cannot at this time be understood, no art has been applied to this claim at this point.
Therefore applicant’s arguments are not persuasive.
Conclusion
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/CHRISTOPHER R LAMB/Primary Examiner, Art Unit 2622