DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is in response to the preliminary amendment filed on 6/21/2024. Claims 1-20 are pending and have been considered below.
Note: independent claims 1 and 11, evaluated for subject matter eligibility under judicial exception [abstract idea]. The step/limitation of ‘determining a second mask’ [mental process], combined with ‘performing random access when the first mask matches the second mask’, integrates the judicial exception into practical application [see specification paragraphs 6-8 (resolve a problem that security is low when a tag is triggered to perform random access in a communication network …performing random access when a first mask matches the second mask … masks and storage locations can be implicitly indicated by using a mask identifier, thereby avoiding exposure of information stored at a storage location in the terminal device, and improving network security of the terminal device.) and throughout]; therefore no 35 USC 101 rejection is given to claims 1 and 11 in this office communication.
Claim construction/interpretation: Claim 1 [method claim] recites the following limitation;
“performing random access when the first mask matches the second mask”
This is contingent/conditional limitation(s). The contingent/conditional limitations are not positively recited in the claim(s) and are thus only executed [or performed or implemented], when the condition is true/met.
[See, (MPEP 2111.04) II. CONTINGENT LIMITATIONS
The broadest reasonable interpretation of a method (or process) claim having contingent limitations requires only those steps that must be performed and does not include steps that are not required to be performed because the condition(s) precedent are not met.]
In present claim 1 for instance first the step of performing random access, is only performed when the first mask matches the second mask; otherwise, this step is not performed, and the prior art is not required to teach this element when the condition is not met.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wang et al. (CN 106886734; see attached English translation).
Regarding claim 1:
Wang discloses a communication method (see abstract; figures), wherein the method is applied to a terminal device, and the method comprises:
receiving first signaling, wherein the first signaling indicates a first storage location and a first mask, the first signaling carries a first mask identifier, and the first mask identifier identifies at least one of the first storage location or the first mask ([note: optional language requires one option]; see Wang, passage 16, partially reproduced herein with emphasis {the command includes the counting electronic label information, including a starting address and length data…} [here the command is equivalent to signaling, address is storage location]; figures; passage 41 {…starting address, length and data … start pointer Pointer is set to 8 0, Length is 8 ' h60, representing 96 bits, the comparison data MASK is…} [here address is location, pointer is identifier, and the mask]);
determining, based on the first signaling, a second mask stored at the first storage location (passage 42-43 {receiving the calling command … start address and length, reading the content of the internal memory} [here reading content of memory is stored second mask]); and
performing random access when the first mask matches the second mask ([Note: this contingent limitation is not positively recited and thus not required for anticipation]; and see throughout the disclosure).
Regarding claim 11:
Wang discloses an apparatus (see abstract; figures), comprising:
at least one processor (figure 1-2; passage 35 [processor 10]); and a memory (passage 35 [memory 11]) coupled to the at least one processor and having program instructions stored thereon which, when executed by the at least one processor, cause the apparatus to perform steps of:
receiving first signaling, wherein the first signaling indicates a first storage location and a first mask, the first signaling carries a first mask identifier, and the first mask identifier identifies at least one of the first storage location or the first mask ([note: optional language requires one option]; see Wang, passage 16 {the command includes the counting electronic label information, including a starting address and length data…} [here the command is equivalent to signaling, address is storage location]; figures; passage 41 {…starting address, length and data … start pointer Pointer is set to 8 0, Length is 8 ' h60, representing 96 bits, the comparison data MASK is…} [here address is location, pointer is identifier, and the mask]);
determining, based on the first signaling, a second mask stored at the first storage location (passage 42-43 {receiving the calling command … start address and length, reading the content of the internal memory} [here reading content of memory is stored second mask]); and
performing random access when the first mask matches the second mask (passage 44 {data and read the content of the memory is received, judges whether a content matching}; passage 54; and see throughout the disclosure).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 7, 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nakano (US 2015/0363130) in view of Wang et al. (CN 106886734).
Regarding claim 7:
Nakano discloses a communication method, wherein the method is applied to a read/write device (abstract; figures), and the method comprises:
receiving first signaling from a core network device (figure 1,5 [reader/writer receive signaling from host as core device]; para 37; para 61 {reader/writer 3 receives commands from the host device … }), wherein the first signaling indicates a first storage location (para 61 {command includes, for example, identification information .. and address information of the flash memory 82 that indicates a writing range}; figs 5-12); and
sending the first signaling to at least one terminal device (para 67{… command transmitted from the reader/writer 3 to the RF tag…}; fig 5-8; and see throughout disclosure).
Nakano discloses all of the subject matter as described above, except for specifically teaching that wherein the first signaling indicates a first storage location and a first mask, the first signaling carries a first mask identifier, and the first mask identifier identifies at least one of the first storage location or the first mask.
However, Wang in the same field of endeavor discloses a system and method for RFID read write process where the first signaling indicates a first storage location and a first mask, the first signaling carries a first mask identifier, and the first mask identifier identifies at least one of the first storage location or the first mask (passage 16 {the command includes the counting electronic label information, including a starting address and length data…} [here the command is equivalent to signaling, address is storage location]; figures; passage 41 {…starting address, length and data … start pointer Pointer is set to 8 0, Length is 8 ' h60, representing 96 bits, the comparison data MASK is…} [here address is location, pointer is identifier, and the mask]; passage 42-44; passage 54; and see throughout the disclosure).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to use teachings of Wang in Nakano in order to provide tag environment communication and anti-collision processing, comprising a electronic tag for fast checking and read-write device, and fast counting out each electronic tag and fast method of performing read-write operation (KSR: Combining Prior Art Elements According to Known Methods to Yield Predictable Results).
Regarding claim 17:
Nakano discloses an apparatus (abstract; see figures), comprising:
at least one processor (fig 1; fig 2 [control unit 31]); and a memory (fig 2 [storage 36]) coupled to the at least one processor and having program instructions stored thereon which (para 41-43,111), when executed by the at least one processor, cause the apparatus to perform steps of:
receiving first signaling from a core network device (figure 1,5 [reader/writer receive signaling from host as core device]; para 37; para 61 {reader/writer 3 receives commands from the host device … }), wherein the first signaling indicates a first storage location (para 61 {command includes, for example, identification information .. and address information of the flash memory 82 that indicates a writing range}; figs 5-12); and
sending the first signaling to at least one terminal device (para 67{… command transmitted from the reader/writer 3 to the RF tag…}; fig 5-8; and see throughout disclosure).
Nakano discloses all of the subject matter as described above, except for specifically teaching that wherein the first signaling indicates a first storage location and a first mask, the first signaling carries a first mask identifier, and the first mask identifier identifies at least one of the first storage location or the first mask.
However, Wang in the same field of endeavor discloses a system and method for RFID read write process where the first signaling indicates a first storage location and a first mask, the first signaling carries a first mask identifier, and the first mask identifier identifies at least one of the first storage location or the first mask (passage 16 {the command includes the counting electronic label information, including a starting address and length data…} [here the command is equivalent to signaling, address is storage location]; figures; passage 41 {…starting address, length and data … start pointer Pointer is set to 8 0, Length is 8 ' h60, representing 96 bits, the comparison data MASK is…} [here address is location, pointer is identifier, and the mask]; passage 42-44; passage 54; and see throughout the disclosure).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to use teachings of Wang in Nakano in order to provide tag environment communication and anti-collision processing, comprising a electronic tag for fast checking and read-write device, and fast counting out each electronic tag and fast method of performing read-write operation (KSR: Combining Prior Art Elements According to Known Methods to Yield Predictable Results).
Claim(s) 4,14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (CN 106886734) in view of Brewster et al. (US 2024/0305431).
Regarding claims 4, 14:
Wang discloses all of the subject matter as described above, except for specifically teaching that wherein a correspondence between the first mask identifier and the first storage location is preset.
However, Brewster in the same field of endeavor discloses a system and method for RFID tags wherein a correspondence between the first mask identifier and the first storage location is preset (para 80 {Select command, have those certain attributes, and have data that correspond to the specified mask value, mask pointer, and mask length}; figures 3-6, 8-11; para 112 [memory location is preset]; and see throughout the disclosure).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to use teachings of Brewster in Wang in order to provide comparing and participating in inventory round based on matching the mask value (KSR: Combining Prior Art Elements According to Known Methods to Yield Predictable Results).
Claim(s) 9,19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nakano (US 2015/0363130) in view of Wang et al. (CN 106886734) as above, and further in view of Brewster et al. (US 2024/0305431).
Regarding claims 9,19:
Wang discloses all of the subject matter as described above, except for specifically teaching that wherein the first mask identifier indicates at least two of the following: start address information of the first storage location, a length of the first storage location, or end address information of the first storage location.
However, Brewster in the same field of endeavor discloses a system and method for RFID tags wherein the first mask identifier indicates at least two of the following: start address information of the first storage location, a length of the first storage location, or end address information of the first storage location (para 78 {Pointer specifies a starting bit address for the Mask comparison. Length specifies the length of Mask}; and see throughout the disclosure).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to use teachings of Brewster in Wang in order to provide comparing and participating in inventory round based on matching the mask value (KSR: Combining Prior Art Elements According to Known Methods to Yield Predictable Results).
Allowable Subject Matter
Claims 2,3,5,6,8,10,12,13,15,16,18,20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Diorio et al. (US 11,062,190) discloses a system and method for RFID tags with public and private inventory states.
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/HIRDEPAL SINGH/Primary Examiner, Art Unit 2631