DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Golat (US 2019/0363690) in view of Yoo (US 2019/0363680).
Regarding claims 1, 7 and 14, Golat discloses an amplifier/radio-frequency module that meets the core structural limitations of the claims:
Golat teaches a low noise amplifier integrated circuit (LNAIC) 201 implemented within a Front-End Module (FEM) 200, featuring an LNA 218 configured to amplify a signal (Fig. 2; §0038, §0046).
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Fig. 2 of Golat reproduced for ease of reference.
The LNA 218 includes an input field-effect transistor (FET) 402 having a gate coupled to an input node 219, and an output FET 404 having a drain coupled to an output node 227 (Fig. 4; §0050).
Golat also teaches an impedance circuit, identified as a switchable tank circuit 217, coupled to the gate of the input FET 402 via the input node 219 (Fig. 2, Fig. 4; §0038, §0043, §0050).
The switchable tank circuit 217, in Golat (Fig. 2) includes an inductor 212, and a switching-capacitive arm formed by a capacitor switch 214 and a capacitor 216 coupled in series (Fig. 2; §0014, §0038). The series combination of the capacitor switches 214 and the capacitor 216 is coupled in parallel to the inductor 212 (Fig. 2; §0014, §0043).
Further The switchable tank circuit 217 (Golat, Fig. 2) is configured to operate by opening or closing the capacitor switch 214 based on whether the LNA is in an active gain state or a bypass state (Fig. 2; §0038, §0045-§0046).
Golat, however, does not explicitly disclose the gain circuit operating across a "plurality of gain modes" (i.e., multiple discrete levels of active amplification beyond a simple active/bypass state). Furthermore, Golat lacks the explicit disclosure of a "power amplifier" integrated within the same module alongside the LNA and controller as specifically recited in Claim 14.
Yoo, in the same field of endeavor (variable gain amplifiers and RF communication transceivers), discloses the missing limitations:
Yoo teaches a variable gain amplifying circuit 200 configured to operate in a "plurality of gain modes" (e.g., first gain mode GM1, second gain mode GM2, third gain mode GM3) determined by a control circuit 500 utilizing control signals (Fig. 1, Fig. 9, Fig. 10; §0053, §0067, §0110).
Yoo explicitly establishes that such amplifying circuits are implemented as "an amplifier (power amplifier or low noise amplifier)" within wireless communication systems (§0003).
It would have been obvious to a person having ordinary skill in the art to modify the RF front-end module and LNA circuit of Golat to incorporate the variable gain logic and architecture of Yoo. Specifically, a practitioner would configure Golat's bias control module 414 (Fig. 4) and LNA 218 (Fig. 2) to operate across the plurality of discrete active gain modes taught by Yoo's control circuit 500 and variable gain amplifying circuit 200 (Fig. 1). In doing so, Golat's switched-LC tank circuit 217 (Fig. 2) at the gate node would be maintained to dynamically tune the input impedance corresponding to the newly integrated gain modes. Additionally, providing a power amplifier within the RF module alongside the LNA, as instructed by Yoo (§0003), would be a standard integration for an RF transceiver front-end.
The motivation to implement a plurality of distinct gain modes within the amplifying architecture is explicitly provided by Yoo: to "achieve greater or maximum performance at an appropriate signal level while receiving a signal, from a very low signal to a large signal, from an antenna" (§0004). Furthermore, combining Yoo's multi-gain operation with Golat's parallel switched-LC gate network would predictably allow the resulting amplifier to satisfy strict noise figure and linearization specifications over a wide dynamic range. Adjusting the amplification modes while utilizing the parallel LC elements minimizes phase discontinuity and signal distortion, which are the known benefits of tuning impedance matching states to variable amplification levels (Yoo; §0141-§0142).
Claims 2-6, 8-13 and 15-20 are rejected under 35 U.S.C. 103 as being unpatentable over Golat (US 2019/0363690) in view of Yoo (US 2019/0363680) and further in view of Javor (US 2004/0251984 A1).
Regarding claims 2, 9, and 17, Golat teaches the switching-capacitive arm includes a capacitor 216 and a capacitor switch 214 coupled in series (Golat, Fig. 2; §0042) and per claims 3 and 10, Golat teaches the switch is implemented as a transistor, specifically a field-effect transistor (FET) or MOSFET (Golat, §0062, §0078) and per claims 4 and 18, Golat teaches a second switching-capacitive arm (comprising switch 258 and capacitor 260) coupled in parallel to the inductor 212 (Golat, Fig. 3; §0049) and per claims 5, 6, 12, and 19, Golat teaches the variable-gain amplifier is implemented within a low noise amplifier (LNA 218), wherein the gain circuit includes an input FET 402 having a gate coupled to an input node 219 and a drain coupled to an output node 227. The impedance circuit (tank 217) is coupled to the gate of the transistor (Golat, Fig. 4; §0037-§0038, §0050). Again, per claims 8, 15, and 16, Golat teaches a controller configured to place the switching-capacitive arm in a closed state when operating in a bypass mode (a first gain mode with less gain) and in an open state when operating in an active gain mode (a second gain mode with more gain) (Golat, §0043, §0045-§0046).
Regarding claim 13, Golat teaches a degeneration circuit including at least one degeneration inductor 406 coupled to a source of the input FET 402 (Golat, Fig. 4; §0050).
However, regarding all the claims, Golat does not explicitly teach the gain circuit operating across a "plurality of gain modes" beyond a binary active/bypass state. Specifically, per claim 11, Golat does not explicitly teach the switch being a mechanical switch. Also, per claim 20, Golat does not explicitly teach the module including a power amplifier that features the identical gate-coupled transistor and parallel-LC impedance circuit.
In the same field of endeavor, Yoo teaches a variable gain amplifying circuit 200 operating in a "plurality of gain modes" (G1-G4) (Yoo, Fig. 1, Fig. 9; §0053, §0110). Yoo explicitly teaches that this variable-gain amplification architecture is applicable to either a "low noise amplifier" or a "power amplifier" within the RF front-end (Yoo, §0003). Also, regarding claim 11, Javor, in the same field of endeavor (RF impedance matching), teaches implementing switches within a switched-capacitor impedance circuit as micro-electromechanical systems (MEMS) switches, which are mechanical switches (Javor, §0011, §0013).
It would have been obvious to a person of ordinary skill in the art to modify the LNA and front-end module of Golat to incorporate the "plurality of gain modes" logic of Yoo to dictate the states of the switching-capacitive arm. While regarding claim 20, it would have been obvious to duplicate or apply Golat's input impedance tank circuit to a Power Amplifier within the same module, as explicitly suggested by Yoo's teaching that such tunable-gain architectures are equivalently deployed on power amplifiers and regarding claim 11, it would have been obvious to substitute the transistor-based capacitor switch of Golat with a mechanical MEMS switch, as taught by Javor.
The motivation to integrate multiple gain modes and apply the tunable impedance architecture to a power amplifier is provided by Yoo: to achieve maximum performance and linearity across a wide dynamic range of signal levels from the antenna, minimizing phase distortion and signal degradation when switching amplification levels (Yoo, §0003-§0004, §0141-§0142) and per claim 11, the motivation to utilize a mechanical MEMS switch in the impedance network is provided by Javor: MEMS switches provide "relatively low resistance" compared to standard semiconductor transistors, which significantly reduces insertion loss and improves the overall efficiency of the RF impedance matching circuit (Javor, §0013).
Claim 11 is rejected over Golat and Yoo, further in view of Javor (US 2004/0251984).
Conclusion
The prior art, Lie et al. (US 6,396,347 B1), Lin et al. (US 7,560,990 B2), Lin et al. (US 2016/0013767 A1), Floyd (US 2005/0068099 A1), Wallis (US 2018/0138872 A1), Imbornone et al. (US 6,342,813 B1) made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAFIZUR RAHMAN whose telephone number is (571)270-0659. The examiner can normally be reached M-F: 10-6.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Han can be reached on (571) 272-2078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/HAFIZUR RAHMAN/Primary Examiner, Art Unit 2843.
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