CTNF 18/614,651 CTNF 79300 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1-4, 9-12 and 15-20 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Sato et al (11,456.262 B2) . Regarding claim 1, Sato et al discloses an apparatus (Figure 8), comprising: a packaged electronic device (Figure 8, reference 804) having a first terminal (Figure 8, lowermost part of reference 804 connected to reference 802); a coil (Figure 8, reference 810) having a second terminal (Figure 8, references 822 and 806) that is spaced apart from the first terminal (Figure 8, lowermost part of reference 804 connected to reference 802); and a magnetic structure (Figure 8, reference 834) that encloses portions of the packaged electronic device (Figure 8, reference 804) and the coil (Figure 8, reference 810) and exposes respective portions of the first and second terminals (Figure 8, area above reference 802 connected to references 804 and 806). Regarding claim 2, Sato et al discloses wherein the packaged electronic device (Figure 8) includes a semiconductor die (Figure 8, reference 804) electrically connected to the first terminal (Figure 8, uppermost part of reference 802), and a non-magnetic structure (Figure 8, reference 834) that encloses the semiconductor die (Figure 8, reference 804) and exposes the portion of the first terminal (Figure 8, uppermost part of reference 802). Regarding claim 3, Sato et al discloses wherein the semiconductor die includes a transistor (Figure 8, reference 804) with a transistor terminal that is electrically connected to the first terminal (Figure 8, reference 802; lead frame). Regarding claim 4, Sato et al discloses wherein the coil (Figure 8, reference 810) is spaced apart from the packaged electronic device (Figure 8). Regarding claim 9, Sato et al discloses wherein the packaged electronic device (Figure 8, reference 804) has one of a flat no-lead and a small outline transistor package shape (Figure 8). Regarding claim 10, Sato et al discloses a system (Figure 8, reference 800), comprising: a circuit board (Figure 8, reference 802) having a conductive trace (column 5, lines 18-25); an apparatus (Figure 8, reference 804) attached to the circuit board (Figure 8, reference 802) and comprising: a packaged electronic device (Figure 8, reference 804) having a first terminal electrically connected to the conductive trace (column 5, lines 18-25); a coil (Figure 8, reference 810) having a second terminal (Figure 8, references 822 and 806) that is spaced apart from the first terminal (Figure 8, are directly below reference 804 and directly above reference 802) and electrically connected to the conductive trace (column 5, lines 18-25); and a magnetic structure (Figure 8, reference 834) that encloses portions of the packaged electronic device (Figure 8, reference 804) and the coil (Figure 8, reference 810) and exposes respective portions of the first and second terminals (Figure 8, uppermost part of reference 802). Regarding claim 11, Sato et al discloses wherein the packaged electronic device (Figure 8) includes a semiconductor die (Figure 8, reference 804) electrically connected to the first terminal (Figure 8, uppermost part of reference 802), and a non-magnetic structure (Figure 8, reference 834) that encloses the semiconductor die (Figure 8, reference 804) and exposes the portion of the first terminal (Figure 8, uppermost part of reference 802). Regarding claim 12, Sato et al discloses wherein the coil (Figure 8, reference 810) is spaced apart from the packaged electronic device (Figure 8). Regarding claim 15, Sato et al discloses wherein the packaged electronic device (Figure 8, reference 804) has one of a flat no-lead and a small outline transistor package shape (Figure 8). Regarding claim 16, Sato et al discloses a method of manufacturing an electronic apparatus (Figure 8), the method comprising: attaching a first terminal of a packaged electronic device (Figure 8, reference 804) to a carrier (Figure 8, reference 802); attaching a second terminal (Figure 8, references 806 and 822) of a coil (Figure 8, reference 810) to the carrier (Figure 8, reference 802); performing a molding process using a molding compound to form a molded structure (Figure 8, reference 834) that encloses portions of the packaged electronic device (Figure 8, reference 804) and the coil (Figure 8, reference 810); and removing the carrier (Figure 8, reference 834) to expose portions of the first and second terminals (Figure 8, uppermost part of reference 802 which is interconnected to reference 804 and 806). Regarding claim 17, Sato et al discloses wherein the molding compound is a magnetic molding compound (Figure 8, reference 834). Regarding claim 18, Sato et al discloses wherein the carrier is a tape (Figure 8, reference 802). Regarding claim 19, Sato et al discloses wherein the carrier is a lead frame or a substrate (Figure 8, reference 802). Regarding claim 20, Sato et al discloses wherein removing the carrier includes performing a grinding process to remove the lead frame or substrate to expose the respective portions of the first and second terminals (Figure 8) . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim s 5-8, 13 and 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. 13-03-01 AIA The following is a statement of reasons for the indication of allowable subject matter: The prior art does not disclose nor fairly suggest an apparatus and system comprising; wherein: the apparatus has opposite first and second sides, opposite third and fourth sides, and opposite fifth and sixth sides; the third and fourth sides are spaced apart from one another along a first direction; the fifth and sixth sides are spaced apart from one another along a second direction that is orthogonal to the first direction; the first and second sides are spaced apart from one another along a third direction that is orthogonal to the first and second directions; the magnetic structure exposes the respective portions of the first and second terminals along the first side of the apparatus; the coil is spaced apart from the packaged electronic device along the third direction; and the coil is spaced apart from the second side of the apparatus along the third direction (claims 5 and 13) further incorporated into the independent claims 1 and 10 and in the context of their recited apparatuses, along with their depending claims . Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MONICA D HARRISON whose telephone number is (571)272-1959. The examiner can normally be reached M-F 7-4:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at 571-270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MONICA D HARRISON/Primary Examiner, Art Unit 2815 mdh April 28, 2026 Application/Control Number: 18/614,651 Page 2 Art Unit: 2815 Application/Control Number: 18/614,651 Page 3 Art Unit: 2815 Application/Control Number: 18/614,651 Page 4 Art Unit: 2815 Application/Control Number: 18/614,651 Page 5 Art Unit: 2815 Application/Control Number: 18/614,651 Page 6 Art Unit: 2815 Application/Control Number: 18/614,651 Page 7 Art Unit: 2815 Application/Control Number: 18/614,651 Page 8 Art Unit: 2815
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