Prosecution Insights
Last updated: April 18, 2026
Application No. 18/614,860

PROGRESSIVE VOLTAGE CHANGE IN A SINGLE-WIRE BUS CIRCUIT

Non-Final OA §103
Filed
Mar 25, 2024
Examiner
HASSAN, AURANGZEB
Art Unit
2184
Tech Center
2100 — Computer Architecture & Software
Assignee
Qorvo US Inc.
OA Round
3 (Non-Final)
80%
Grant Probability
Favorable
3-4
OA Rounds
2y 12m
To Grant
97%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
611 granted / 763 resolved
+25.1% vs TC avg
Strong +17% interview lift
Without
With
+17.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 12m
Avg Prosecution
19 currently pending
Career history
782
Total Applications
across all art units

Statute-Specific Performance

§101
2.2%
-37.8% vs TC avg
§103
52.4%
+12.4% vs TC avg
§102
32.8%
-7.2% vs TC avg
§112
5.7%
-34.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 763 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 2. A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 3/13/26 has been entered. Claim Rejections - 35 USC § 103 3. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 4. Claims 1, 5, 9, 13, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Ngo et al. (US Publication Number 2022/0166644, hereinafter “Ngo”) in view of Mayer et al. (US Publication Number 2022/0350522, hereinafter “Mayer”) further in view of Ma (US Publication Number 2017/0040986). 5. As per claims 1, 9, 13, Ngo teaches a single-wire bus circuit, method, and device comprising: a plurality of slave circuits (plurality of slaves, 66/68, figure 2, paragraph 47) each coupled to a single-wire bus (62, figure 2, paragraph 47) consisting of one wire and configured to: draw a bus current over the single-wire bus during a fast-charge period wherein a bus voltage of the single-wire bus is held at a higher bus voltage level (drawing higher current for fast charge state, paragraph 34); and stop drawing the bus current in response to detecting that the bus voltage of the single-wire bus is pulled down to a lower bus voltage level (paragraphs 45 and 65 - 67, low-voltage interval 56, figure 4a); and a master circuit (master circuit 64 with master controller 78, figures 2 and 3) coupled to the single-wire bus and configured to increase during a plurality of clock cycles (clock running in slave circuits, paragraph 42) to thereby pull the bus voltage of the single-wire bus from the higher bus voltage level down to the lower bus voltage level of the plurality of clock cycles (bus voltage handling, paragraphs 42 – 46). Ngo does not appear to explicitly disclose incrementally increase drive strength during each of multiple consecutive ones of a plurality of clock cycles in a transition period a transition period to thereby pull the bus voltage from the higher bus voltage down to the lower voltage level progressively in multiple consecutive ones of the plurality of clock cycles. However, Mayer discloses pull the bus voltage from the higher bus voltage down to the lower voltage level progressively in multiple consecutive ones of the plurality of clock cycles (paragraphs 41 – 43, progressive strength of the pull-down driver for voltage level handling and voltage swings, figure 2). Ngo and Mayer are analogous art because they are from the same field of endeavor of device voltage transition management. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Ngo and Mayer before him or her, to modify the voltage handling of Ngo to include the voltage swings of Mayer because to better fine tune the voltage. One of ordinary skill would be motivated to make such modification in order to enhance voltage handling for the system, paragraphs 11 and 13 Therefore, it would have been obvious to combine Mayer with Ngo to obtain the invention as specified in the instant claims. Ngo/Mayer does not appear to explicitly incrementally increase drive strength during each of multiple consecutive ones of a plurality of clock cycles in a transition period. However, Ma incrementally increase drive strength during each of multiple consecutive ones of a plurality of clock cycles in a transition period (paragraph 32, increasing drive strength for clock edge transition period). Ngo/Mayer and Ma are analogous art because they are from the same field of endeavor of device clock management. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Ngo/Mayer and Ma before him or her, to modify the voltage handling of Ngo/Ma to include the drive strength timing of Ma because it would allow to better manage the period. One of ordinary skill would be motivated to make such modification in order to enhance clock/voltage handling for the system, paragraphs 17 and 18. Therefore, it would have been obvious to combine Ma with Ngo/Mayer to obtain the invention as specified in the instant claims. 6. Ngo modified by the teachings of Mayer/Ma as seen in claim 1 above, as per claims 5 and 17, Ngo teaches a single-wire bus circuit and device , wherein the master circuit is further configured to progressively increase the drive strength by progressively reducing a pulldown resistance of the master circuit (paragraphs 58 – 60, adjusting resistor with respect to slave/master). Allowable Subject Matter 7. Claims 2 – 4, 6 – 8, 10 – 12, 14 – 16, and 18 – 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Response to Arguments 8. Applicant’s arguments with respect to claims 1 – 20 have been considered but are moot because the new ground of rejection in light of Ma does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. As an alternative to the allowable subject matter, the Examiner suggests making modifications to the claims to distinguish the claimed invention as compared to the related art figures 1 and 2. Elements seen in paragraphs 48, 51, and 53 of the instant application would be seen to better elaborate the intended functionality and enhance compact prosecution. Conclusion 9. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Wang teaches consecutive clock cycle drive strength adjustment. Any inquiry concerning this communication or earlier communications from the examiner should be directed to AURANGZEB HASSAN whose telephone number is (571)272-8625. The examiner can normally be reached 7 AM to 3 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Henry Tsai can be reached at 571-272-4176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. AH /STEVEN G SNYDER/Primary Examiner, Art Unit 2184
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Prosecution Timeline

Mar 25, 2024
Application Filed
Jun 13, 2025
Non-Final Rejection — §103
Aug 20, 2025
Response Filed
Dec 12, 2025
Final Rejection — §103
Feb 04, 2026
Response after Non-Final Action
Feb 20, 2026
Request for Continued Examination
Mar 04, 2026
Response after Non-Final Action
Apr 02, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
80%
Grant Probability
97%
With Interview (+17.3%)
2y 12m
Median Time to Grant
High
PTA Risk
Based on 763 resolved cases by this examiner. Grant probability derived from career allow rate.

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