Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 13-14 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Makishima et al., US20050156636 (hereinafter referred to as Makishima).
In regards to claim 13, Makishima teaches a dynamic tracking (level shifting; [Abstract]) bias circuit (output circuit; [Title]), comprising: a level shifter (level shifting output circuit 103 except for I3; [Fig. 3]), generating a first supply voltage (output voltage Vout; [Fig. 3]) according to a main power voltage (voltage VB; [Fig. 3]) and a second supply voltage (input voltage Vin; [Fig. 3]); and an output driver (inverter I3; [Fig. 3]), providing a driving capability (inherent to an inverter) according to the first supply voltage (the first supply voltage is understood as the input and out of the inverter I3); wherein the first supply voltage is substantially equal to the main power voltage minus the second supply voltage (output resistor R5 can be set to a relatively small voltage & monitoring the power source VBS can be employed as the input signal Vin; [0064]) (Examiner’s Note: The voltage across resistor R5 is the output voltage Vout.).
In regards to claim 14, Makishima teaches wherein the level shifter of the dynamic tracking bias circuit comprises: a first transistor (transistor Q14; [Fig. 3]), wherein the first transistor has a control terminal (see annotated figure below; [Fig. 3]) coupled to a first node (see annotated figure below; [Fig. 3]), a first terminal coupled to the second supply voltage (see annotated figure below; [Fig. 3]), and a second terminal coupled to the first node (see annotated figure below; [Fig. 3]); and a first resistor (resistor R5; [Fig. 3]), wherein the first resistor has a first terminal coupled to the first node (see annotated figure below; [Fig. 3]), and a second terminal coupled to a ground voltage (see annotated figure below; [Fig. 3]).
[AltContent: textbox (1st Supply)][AltContent: textbox (Supply Node)][AltContent: textbox (2nd Supply)][AltContent: textbox (1st Node)][AltContent: textbox (2nd Q)][AltContent: textbox (1st Q)][AltContent: textbox (1st Res)][AltContent: textbox (Main Voltage)][AltContent: textbox (GND Voltage)][AltContent: textbox (2nd Node)]
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Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al., US20220231686 (hereinafter referred to as Lee) and in view of Wu et al., US20070052445 (hereinafter referred to as Wu).
In regards to claim 1, Lee teaches an interface device (interface circuit; [Title]), comprising: a dynamic tracking bias circuit (driver bias controller 510; [0124]), providing a first supply voltage (VNB/N1; [Fig. 6 & 7]), wherein the first supply voltage is determined (generates & based on; [0124])according to a main power voltage (first power voltage V1; [Fig. 6]) and a second supply voltage (second power voltage V2; [Fig. 6]); a pre-driver (pre-driver 530; [Fig. 6]); a post-driver (pull-up-pull-down driver 560; [Fig. 6]), driven by the pre-driver (implicit; [Fig. 6]); and an I/O (Input/Output) pad (pad; [Fig. 6]), driven by the post-driver (implicit; [Fig. 6]); wherein the pre-driver and the post-driver are supplied by the main power voltage, the first supply voltage, and the second supply voltage (V1 supplies the post-driver through the PG<1> signal. VPB & VNB supplies gate voltage to the post-driver. Finally, V2 supplies voltage to both the pre-driver and the post-driver.).
Lee does not teach the interface device comprising an ESD (Electrostatic Discharge) clamp circuit, limiting the second supply voltage.
Wu teaches the interface device comprising an ESD (Electrostatic Discharge) clamp circuit (clamping circuit 234; [Fig. 2]), limiting the second supply voltage (implicit by clamping) (Examiner’s Note: Wu teaches adding the ESD clamp to the output of the current mirror which is Lee’s level shifter 520 and contains at least one current mirror.).
Therefore, it would have been obvious before the effective filing date to have modified Lee in order to incorporate the interface device comprising an ESD (Electrostatic Discharge) clamp circuit, limiting the second supply voltage as taught by Wu. The motivation for doing so would be to protect a node that interfaces outside of the package.
In regards to claim 2, Lee teaches wherein the main power voltage and the second supply voltage are from (receive; [0025]) an external PMIC (Power Management Integrated Circuit) (interface voltage; [0024]).
In regards to claim 3, Lee teaches wherein the first supply voltage is not limited by any ESD clamp circuit (The ESD clamp circuit is tied to the output of a circuit that does not generate the first supply voltage.).
In regards to claim 4, Lee teaches wherein the first supply voltage is substantially equal to the main power voltage minus the second supply voltage (VNB/N1 is taught to have a voltage between V1 and V2 and the voltage of the main power voltage minus the second supply voltage will always be in that range; [0125]).
In regards to claim 5, Lee teaches wherein the dynamic tracking bias circuit comprises: a level shifter (pad-state detector 2; [Fig. 7]), generating the first supply voltage (output of bias control circuit 650; [Fig. 12]) according to the main power voltage and the second supply voltage (implicit with V1 & V2 in Fig. 12); and an output driver (N-driver Bias control circuit 650; [Fig. 6-7 & 11-12]), providing a driving capability according to the first supply voltage (implicit of a bias controller & the output is VNB; [Fig. 12]).
Allowable Subject Matter
Claim 6 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The closest prior arts would be Lee et al., US20220231686 and Makishima et al., US20050156636. Claims 7-12 would be allowed due to dependence on claim 6.
Claim 15 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The closest prior art would be Makishima et al., US20050156636. Claims 16-20 would be allowed due to dependence on claim 16.
Conclusion
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SAMANTHA LYNETTE FAUBERT
Examiner
Art Unit 2836
/CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838