DETAILED ACTION
Claims 1-20 are currently pending.
Claims 4, 6-10 and 14-19 are withdrawn from consideration.
The previous objection to the title of the invention is withdrawn due to Applicant’s amendment.
Response to Arguments
Applicant's arguments filed 9/10/26 have been fully considered but they are not persuasive.
The Applicant argues on page 9 of the response in essence that: Although a person may draw a rough conceptual sketch of two rectangles, that is not the claimed operation. Amended claim 1 requires, among other things, rotating the first image to obtain a fourth image and performing pixel padding on the fourth image to obtain the third image, where the pixel padding is performed from a first target position of the fourth image to obtain the third image, so that the third image and the second image are included in a first stitched image having the claimed pixel dimensions. These are pixel-level digital image transformations that generate and send a digital stitched image. Such operations cannot practically be performed in the human mind and are therefore not mental processes under MPEP § 2106.04(a)(2).
The involvement of a generic computer components does not provide additional elements that are sufficient to amount to significantly more than the judicial exception because the recitations to hardware involve no more than a generic computer performing generic computer functions that are well understood, routine and conventional activities previously known in the industry. Generating and sending images are generic computer functions that are well understood, routine and conventional activities previously known in the industry. That is, other than reciting “by a processor,” nothing in the claim precludes the steps from practically being performed in the human mind. See MPEP 2106.05(d)).
The Applicant argues on pages 9 and 10 of the response in essence that: Even if the claims were considered to recite an abstract idea, the claims are patent-eligible because they integrate the alleged idea into a practical application by improving digital image transmission technology. The Specification identifies a specific technical problem in multi-screen display systems: due to limitations on pins and interfaces of the SoC and the serializer, multiple images cannot be distinguished at the interface layer, so the SoC stitches the images into a regular large image. Because the serializer and deserializer cannot prune padded pixels, padded pixels are transmitted as valid pixels, and excessive padded pixels over occupy transmission bandwidth, resulting in low image transmission efficiency (Specification at [0005]).
Optimally placing two images to reduce their combined size does not constitute a patentable improvement in computer technology. Reducing storage is not an improvement to the computer system that is implementing the abstract idea. Furthermore, merely automating a manual process using generic computers does not constitute a patentable improvement in computer technology. Credit Acceptance Corp. v. Westlake Services, __ F.3d __, 2017 WL 2485469, case no. 2016-2001 (Fed. Cir. June 9, 2017).
The Applicant argues on pages 11 and 12 of the response in essence that: Ino describes synthesizing link images in one frame by rotating a first one of the link images and arranging it relative to a second one of the link images. Ino further identifies "UA" in FIG. 4 as "an unused region, in which no link image is disposed, in one frame." Thus, Ino at most discloses an unused region in a mixed frame; Ino does not disclose performing pixel padding on the rotated image itself from a first target position of the fourth image to obtain a third image.
Ino discloses arranging link images C1 and C2 so that additional pixels are added to C2 in the frame (FIG. 4 shows that the horizontal dimension of the frame is the horizontal dimension of C1 and the vertical dimension of C2). Because additional pixels are added to the frame, the UA area in FIG. 4 is pixel padding.
The Applicant argues on pages 12 and 13 of the response in essence that: In mapping Ino to the claims, however, the Office Action appears to rely on the vertical dimension of C2 in FIG. 4 to satisfy the requirement that the first image has M row pixels and N column pixels with M>N, while also relying on a horizontal dimension of the overall frame to satisfy the requirement that the first stitched image has N+P row pixels. The Office Action therefore has not shown, using a consistent dimensional mapping, that Ino discloses a first image having row and column pixel quantities M and N, a second image having row and column pixel quantities P and Q, and a first stitched image having row and column pixel quantities N+P and Q, as claimed. For at least this additional reason, Ino also has not been shown to anticipate amended independent Claim 1.
Ino discloses that each image has a number of pixels in respective horizontal and vertical directions (paragraph 33). Fig. 4 shows that the horizontal dimension of the frame is the horizontal dimension of C1 and the vertical dimension of C2 and that the vertical dimension of the frame is the vertical dimension of C1. The dimensions of the stitched image of Ino are equivalent as shown by comparing Fig. 4 of Ino to Fig. 5 of Applicant’s disclosure.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3, 11-13 and 20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Ino US Publication 2022/0083305 (hereafter “Ino”).
Referring to claims 1 and 11, Ino discloses an apparatus for image processing, wherein the apparatus comprises:
at least one processor (paragraph 37, The integrated ECU 10 includes a microcomputer, as a main component, having, for example, a processor, a memory); and
one or more memories coupled to the at least one processor and storing programming instructions for execution by the at least one processor to cause the apparatus to:
obtain a first stitched image based on a first image and a second image (paragraph 39The mixed image storage 110 stores an image (hereinafter, referred to as a “mixed image”) in which images (hereinafter, referred to as “link images”) for the respective display units are synthesized in one frame); and
send the first stitched image, wherein:
a quantity of row pixels of the first image is M, a quantity of column pixels of the first image is N, M>N, and both M and N are positive integers (paragraph 44, FIG. 4 shows C2 as having a greater vertical dimension than horizontal);
a quantity of row pixels of the second image is P, a quantity of column pixels of the second image is Q, Q>M, and both P and Q are positive integers (paragraph 44, FIG. 4 shows that the horizontal dimension of C1 is greater than the vertical dimension of C2); and
a quantity of row pixels of the first stitched image is N+P (FIG. 4 shows that the horizontal dimension of the frame is the horizontal dimension of C1 and the vertical dimension of C2), a quantity of column pixels of the first stitched image is Q (FIG. 4 shows the vertical dimension of the frame is the vertical dimension of C1), the first stitched image comprises the second image and a third image, the third image is an image obtained through first preprocessing of the first image, and the first preprocessing comprises rotating the first image to obtain a forth image, and performing pixel padding on the fourth image to obtain the third image, wherein the pixel padding is performed from a first target position of the fourth image (paragraph 44, In one example, it may be configured that the respective link images for the CID 20 and the meter MID 30 are synthesized in one frame by rotating a first one of the link images having the long side with a smaller number of pixels such that the long side of the first one of the link images is laid along a short side of a second one of the link images having the long side with a larger number of pixels. In a specific example, as illustrated in FIG. 4, the link images are synthesized with each other while the link image for the meter MID 30 is clockwise rotated 90 degrees such that the long side of the link image for the meter MID 30 is laid along the short side of the link image for the CID 20)
Referring to claims 2 and 12, Ino discloses wherein the programming instructions, when executed by the at least one processor, cause the apparatus to:
stitch the third image and the second image, to obtain the first stitched image (paragraph 44, In one example, it may be configured that the respective link images for the CID 20 and the meter MID 30 are synthesized in one frame by rotating a first one of the link images having the long side with a smaller number of pixels such that the long side of the first one of the link images is laid along a short side of a second one of the link images having the long side with a larger number of pixels. In a specific example, as illustrated in FIG. 4, the link images are synthesized with each other while the link image for the meter MID 30 is clockwise rotated 90 degrees such that the long side of the link image for the meter MID 30 is laid along the short side of the link image for the CID 20).
Referring to claims 3 and 13, Ino discloses wherein the first target position comprises at least one of a top position, a bottom position or a middle position (paragraph 44, UA in FIG. 4 indicates an unused region, in which no link image is disposed, in one frame [shown at the bottom of C2])
Referring to claim 20, Ino discloses wherein the first target position comprises a bottom position (paragraph 44, UA in FIG. 4 indicates an unused region, in which no link image is disposed, in one frame).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Ino US Publication 2022/0083305 as applied to claim 1 above, and further in view of Applicant admitted prior art.
Referring to claim 5, Ino discloses the apparatus according to claim 1, but does not disclose expressly wherein the apparatus comprises a system on a chip (SoC).
The Applicant’s admitted prior art discloses wherein the apparatus comprises a system on a chip (SoC) (paragraph 4, The CDC includes a system on a chip (system on a chip, SoC).
Before the effective filing date of the claimed invention, it would have obvious to a person of ordinary skill in the art to use a system on a chip. The motivation for doing so would have been to incorporate a widely available integrated circuit that standardizes the processor in order to reduce cost and improve efficiency. Therefore, it would have been obvious to combine Applicant’s admitted prior art with Ino to obtain the invention as specified in claim 5.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETER K HUNTSINGER whose telephone number is (571)272-7435. The examiner can normally be reached Monday - Friday 8:30 - 5:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Benny Q Tieu can be reached at 571-272-7490. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PETER K HUNTSINGER/Primary Examiner, Art Unit 2682
