Prosecution Insights
Last updated: July 17, 2026
Application No. 18/615,196

OPTICAL MODULES AND ASSOCIATED METHODS OF CONSTRUCTING OPTICAL MODULES

Non-Final OA §103
Filed
Mar 25, 2024
Examiner
YEUNG LOPEZ, FEIFEI
Art Unit
Tech Center
Assignee
STMicroelectronics N.V.
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
1m
Est. Remaining
78%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
869 granted / 1071 resolved
+21.1% vs TC avg
Minimal -3% lift
Without
With
+-2.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
35 currently pending
Career history
1116
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
84.9%
+44.9% vs TC avg
§102
8.2%
-31.8% vs TC avg
§112
4.7%
-35.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1071 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Okushiba (PG Pub 20150115139 A1) and Jeon et al (PG Pub 2021/0195736 A1). Regarding claim 1, Okushiba teaches an assembly of a plurality of optical modules, the assembly comprising: a base layer (2, figs. 1a and 1b) comprising one circuit board substrate (wiring substrate, paragraph [0017]) having a plurality of optical components mounted (3a and 3b, paragraph [0015]) thereon, each of the plurality of optical components corresponding to a respective one of the plurality of optical modules (figs. 1a and 1b); a cover layer (7) substantially parallel to the base layer and having a plurality of apertures (7a and 7b) defined therein, each of the plurality of apertures corresponding to a respective one of the plurality of optical modules and aligned with a respective one of the plurality of optical components; and a wall layer (4) coupled to the base layer and to the cover layer and forming a plurality of external walls for each of the plurality of optical modules; wherein the base layer, the cover layer, and the wall layer together define a plurality of chambers, each of the plurality of chambers corresponding to a respective one of the plurality of optical modules. Okushiba does not teach the base comprising a laminated substrate or cover layer comprising one circuit board laminated substrate. In the same field of endeavor, Jeon teaches a base (411, figs. 4 and 9) comprising a laminated substrate (PCB, paragraph [0058]) and a cover layer comprising one circuit board laminated substrate (fig. 9C), for the benefit of reducing the size of the module (paragraph [0068]). Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to make the base to comprise a laminated substrate and the cover layer to comprise one circuit board laminated substrate for the benefit of reducing the size of the assembly. Regarding claim 2, Jeon teaches the assembly of claim 1, wherein the wall layer comprises at least one circuit board laminated substrate (laminated layers with circuit 413, figs. 4 and 9C, paragraph [0067]). Regarding claim 3, Jeon teaches the assembly of claim 2, wherein the wall layer comprises a plurality of sub-layers, each of the plurality of sub-layers comprising one circuit board laminated substrate (fig. 9C, paragraphs [0067][0070][0085]). Regarding claim 4, Okushiba teaches the assembly of claim 3, wherein one (5, figs. 1a and 1b) or more of the plurality of sub-layers form one or more interior walls for each of the plurality of optical modules to divide each chamber of the plurality of optical modules into two or more sub-chambers. Regarding claim 5, Okushiba teaches the assembly of claim 4, wherein at least one of the one or more interior walls for each of the plurality of optical modules does not (fig. 1b) span from the base layer to the cover layer. Regarding claim 6, Okushiba teaches the assembly of claim 4, wherein the wall layer and/or at least one of the one or more interior walls for each of the plurality of optical modules form one or more mounting surfaces for a lens (6a and 6b, figs. 1a and 1b) and/or a filter in each of the plurality of optical modules. Regarding claim 7, Jeon teaches the assembly of claim 2, wherein a plurality of conductive vias (413, fig. 4) are formed in the wall layer to conductively connect the base layer and the cover layer (paragraph [0067]). Regarding claim 8, Jeon does not explicitly teach at least one of the plurality of conductive vias forms a portion of an electric circuit for detecting displacement of the cover layer and/or displacement of a lens in each of the plurality of optical modules. Jeon teaches the plurality of conductive vias (413, fig. 4) electrically connect elements on substrate (411) to those on cover (430, paragraph [0067]). Thus, any one and/or all of the conductive vias 413 can function as a portion of an electric circuit (that runs from 411 to 430 through 413) for detecting displacement of the cover layer and/or displacement of a lens in each of the plurality of optical modules if/when the cover 430 is not placed properly on walls 412, there would be no electrical connection between the substrate and the cover due to misalignment between the contact points on cover 430 and 413. Regarding claim 9, Jeon teaches the assembly of claim 1, wherein the wall layer comprises a unitary wall layer (figs. 4 and 9C) formed on or affixed to the base layer and/or the cover layer. Claim(s) 11-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Okushiba (PG Pub 20150115139 A1), Jeon et al (PG Pub 2021/0195736 A1), and Barlow (PG Pub 2014/0041214 A1). Regarding claim 11, Okushiba in view of Jeon teaches (see claim 1) a method of constructing a plurality of optical modules, the method comprising: constructing an assembly of a plurality of optical modules by coupling a base layer and a cover layer to a wall layer; wherein the base layer comprises one circuit board laminated substrate having a plurality of optical components mounted thereon, each of the plurality of optical components corresponding to a respective one of the plurality of optical modules; wherein the cover layer is substantially parallel to the base layer and comprises one circuit board laminated substrate having a plurality of apertures defined therein, each of the plurality of apertures corresponding to a respective one of the plurality of optical modules and aligned with a respective one of the plurality of optical components; wherein the wall layer forms a plurality of external walls for each of the plurality of optical modules; and wherein the base layer, the cover layer, and the wall layer together define a plurality of chambers, each of the plurality of chambers corresponding to a respective one of the plurality of optical modules. Okushiba does not teach singulating the assembly into separate optical modules. In the same field of endeavor, Barlow teaches singulating the assembly into separate optical modules (fig. 7), for the known benefit of achieving mass production to reduce cost and/or of optimizing the size of individual module according to its intended use. Regarding claim 12, Jeon teaches (see claim 2) the method of claim 11, wherein the wall layer comprises at least one circuit board laminated substrate. Regarding claim 13, Jeon teaches (see claim 3) the method of claim 12, wherein the wall layer comprises a plurality of sub-layers, each of the plurality of sub-layers comprising one circuit board laminated substrate. Regarding claim 14, Okushiba teaches (see claim 3) the method of claim 13, wherein one or more of the plurality of sub-layers form one or more interior walls for each of the plurality of optical modules to divide each chamber of the plurality of optical modules into two or more sub-chambers. Regarding claim 15, Okushiba teaches (fig. 1b) the method of claim 14, wherein at least one of the one or more interior walls for each of the plurality of optical modules does not span from the base layer to the cover layer. Regarding claim 16, Okushiba teaches (fig. 1b) the method of claim 14, wherein the wall layer and/or at least one of the one or more interior walls for each of the plurality of optical modules form one or more mounting surfaces for a lens and/or a filter in each of the plurality of optical modules. Regarding claim 17, Jeon teaches (see claim 7) the method of claim 12, wherein a plurality of conductive vias are formed in the wall layer to conductively connect the base layer and the cover layer. Regarding claim 18, Okushiba in view of Jeon teaches (see claim 8) the method of claim 17, wherein at least one of the plurality of conductive vias forms a portion of an electric circuit for detecting displacement of the cover layer and/or displacement of a lens in each of the plurality of optical modules. Regarding claim 19, Jeon teaches (see claim 9) the method of claim 11, further comprising forming the wall layer as a unitary structure directly on the base layer or the cover layer. Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Okushiba (PG Pub 20150115139 A1) and Jeon et al (PG Pub 2021/0195736 A1) as applied to claim 1 above, and further in view of Tsai et al (PG Pub 2022/0293813 A1. Regarding claim 10, the previous combination remains as applied in claim 1. Okushiba teaches a plurality of lenses and wherein each of the plurality of lenses is aligned with a respective one of the plurality of apertures (6a and 6b, paragraph [0064]). The previous combination does not teach the plurality of lenses are affixed to an underside of the cover layer; and wherein at least a portion of an innermost sub-layer of the cover layer is removed to define an air vent from each chamber of each of the plurality of optical modules to a respective one of the plurality of apertures. In the same field of endeavor, Tsai teaches a plurality of optical elements (80, 70, fig. 6A) are affixed to an underside of the cover layer (301’); wherein each of the plurality of optical elements is aligned with a respective one of the plurality of apertures (35/34); and wherein at least a portion of an innermost sub-layer of the cover layer is removed (37/36, fig. 6B, paragraph [0056]) to define an air vent from each chamber of each of the plurality of optical modules to a respective one of the plurality of apertures (paragraph [0056]), for the benefit of preventing damage to the assembly due to high pressure (paragraph [0056]). Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to affix the plurality of lenses to an underside of the cover layer; and wherein at least a portion of an innermost sub-layer of the cover layer was removed to define an air vent from each chamber of each of the plurality of optical modules to a respective one of the plurality of apertures, for the benefit of preventing damage to the assembly due to high pressure. Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Okushiba (PG Pub 20150115139 A1), Jeon et al (PG Pub 2021/0195736 A1), and Barlow (PG Pub 2014/0041214 A1) as applied to claim 1 above, and further in view of Tsai et al (PG Pub 2022/0293813 A1. Regarding claim 20, the previous combination remains as applied in claim 11. Okushiba teaches a plurality of lenses and wherein each of the plurality of lenses is aligned with a respective one of the plurality of apertures (6a and 6b, paragraph [0064]). The previous combination does not teach the plurality of lenses are affixed to an underside of the cover layer; and wherein at least a portion of an innermost sub-layer of the cover layer is removed to define an air vent from each chamber of each of the plurality of optical modules to a respective one of the plurality of apertures. In the same field of endeavor, Tsai teaches a plurality of optical elements (80, 70, fig. 6A) are affixed to an underside of the cover layer (301’); wherein each of the plurality of optical elements is aligned with a respective one of the plurality of apertures (35/34); and wherein at least a portion of an innermost sub-layer of the cover layer is removed (37/36, fig. 6B, paragraph [0056]) to define an air vent from each chamber of each of the plurality of optical modules to a respective one of the plurality of apertures (paragraph [0056]), for the benefit of preventing damage to the assembly due to high pressure (paragraph [0056]). Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to affix the plurality of lenses to an underside of the cover layer; and wherein at least a portion of an innermost sub-layer of the cover layer was removed to define an air vent from each chamber of each of the plurality of optical modules to a respective one of the plurality of apertures, for the benefit of preventing damage to the assembly due to high pressure. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FEIFEI YEUNG LOPEZ whose telephone number is (571)270-1882. The examiner can normally be reached M-F: 8am to 4pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 571 270 7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FEIFEI YEUNG LOPEZ/Primary Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Mar 25, 2024
Application Filed
Jun 09, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12684898
LIGHT-EMITTING ELEMENT AND LIGHT-EMITTING DIODE
4y 4m to grant Granted Jul 14, 2026
Patent 12684931
DISPLAY PANEL AND DISPLAY DEVICE
3y 9m to grant Granted Jul 14, 2026
Patent 12684923
TRANSFER SUBSTRATE USED FOR MANUFACTURING DISPLAY DEVICE, DISPLAY DEVICE, AND METHOD FOR MANUFACTURING DISPLAY DEVICE
3y 5m to grant Granted Jul 14, 2026
Patent 12684930
DISPLAY DEVICE
3y 7m to grant Granted Jul 14, 2026
Patent 12680663
ELECTRONIC DEVICE
3y 3m to grant Granted Jul 14, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
78%
With Interview (-2.9%)
2y 4m (~1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1071 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month