DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-15 have been submitted for examination and are pending further prosecution by the United States Patent & Trademark Office.
Allowable Subject Matter
With respect to independent claim 1, the prior art of record does not teach or suggest, either solely or in combination, the limitations "obtaining a test result of the application based on the running performance information of the application and a performance test model established for the computing chip, wherein the performance test model comprises a performance test line of each data access path." when considered in combination with the other limitations of claim 1.
With respect to independent claim 7, the prior art of record does not teach or suggest, either solely or in combination, the limitations "establishing a performance test model based on the peak bandwidth of each data access path and the peak value of the computing capability of the computing unit, wherein the performance test model comprises a performance test line of each data access path." when considered in combination with the other limitations of claim 7.
With respect to independent claim 10, the prior art of record does not teach or suggest, either solely or in combination, the limitations "obtain a test result of the application based on the running performance information of the application and a performance test model established for the computing chip, wherein the performance test model comprises a performance test line of each data access path." when considered in combination with the other limitations of claim 10.
Note, however, that claims 1-5, 7 and 9-14 are rejected under 35 U.S.C. 101 as being directed to an abstract idea.
Claims 6, 8 and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-5 and 10-14 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Claim 1 recites an application performance testing method. Under a broadest reasonable interpretation, claim 1 would fall under the category of mental processes as the claim features limitations performable as mental steps, with the assistance of pen & paper, but without additional elements that integrate the abstract idea into a practical application or amount to significantly more than the abstract idea. An analysis of claim 1 according to the 2019 Revised Patent Subject Matter Eligibility test follows:
Step 1: Is the claim directed to a process, machine, manufacture or composition of matter?
Yes, claim 1 is directed to a method and, therefore, a process.
Step 2A Prong 1: Does the claim recite an Abstract Idea, Law of Nature, or Natural Phenomenon?
Yes, claim 1 recites an abstract idea as the following limitations are performable as mental processes with the assistance of pen & paper: obtaining running status data of an application running on a computing chip and a memory access volume of each data access path of the computing chip in a running process of the application, wherein the computing chip comprises a plurality of memory units, and the data access path represents an access path between the memory units; - an engineer can manually obtain running status data of an application running on a computing chip and a memory access volume of each data access path of the computing chip by inspecting product datasheets, architecture manuals and optimization guides for the running status data and memory access volume metrics or, the engineer can manually calculate the running status data and memory access volume metrics by applying related parameters, as found in these guides, to particular formulae to arrive at the running status data and memory access volume metrics; determining running performance information of the application based on the running status data and the memory access volume of each data access path;- - the engineer can manually determine running performance information of the application by applying the obtained running status data and memory access volume metrics to a particular formula; obtaining a test result of the application based on the running performance information of the application and a performance test model established for the computing chip, wherein the performance test model comprises a performance test line of each data access path. - the engineer can manually obtain a test result of the application based on the running performance information of the application and a performance test model, comprising a performance test line of each data access path, by inspecting product datasheets, architecture manuals and optimization guides for a corresponding test result of the application and comparing the test result to an upper bound performance reflected by a performance test model for the chip.
Step 2A Prong 2: Does the Claim Recite Additional Elements That Integrate The Judicial Exception Into A Practical Application?
Claim 1 recites the additional element of a testing device for performing the method. However, as recited, the additional element simply amounts to using a generic computer as a tool to perform the abstract idea and, therefore, does not integrate the abstract idea into a practical application.
Step 2B: Does the Claim Recite Additional Elements That Amount To Significantly More Than The Judicial Exception?
Claim 1 recites the additional element of a testing device for performing the method. However, as recited, the additional element simply amounts to using a generic computer as a tool to perform the abstract idea and, therefore, does not amount to significantly more than the abstract idea.
Claim 2 is also directed to the abstract idea as the engineer can manually obtain a running time of the application, a computing amount of a computing unit, running performance information of the application, a computing capability parameter, operating intensity and sub-path performance information metrics by inspecting product datasheets, architecture manuals and optimization guides for this information or deriving this information from related parameters found in these guides. Since claim 2 lacks one or more additional elements that integrate the abstract idea into a practical application, or amount to significantly more than the abstract idea, the claim is ineligible.
Claim 3 is also directed to the abstract idea as the engineer can manually obtain set performance information of each data path set and an overall operation intensity of each data path set based on a sum of memory access volumes of data access paths in each data path set and the computing amount by inspecting product datasheets, architecture manuals and optimization guides for this information or deriving this information from related parameters found in these guides. Since claim 3 lacks one or more additional elements that integrate the abstract idea into a practical application, or amount to significantly more than the abstract idea, the claim is ineligible.
Claim 4 is also directed to the abstract idea as the engineer can manually perform the steps of determining a comparison result between the running performance information of the application and the performance test line of each data access path in the performance test model, and using the comparison result as the test result of the application. Since claim 4 lacks one or more additional elements that integrate the abstract idea into a practical application, or amount to significantly more than the abstract idea, the claim is ineligible.
Claim 5 is also directed to the abstract idea as the engineer can manually perform the steps of determining a comparison result between the running performance information of the application and the performance test line of each data access path in the performance test model; and determining, based on the comparison result, an analysis result indicating to optimize the application; and using the analysis result as the test result of the application. Since claim 5 lacks one or more additional elements that integrate the abstract idea into a practical application, or amount to significantly more than the abstract idea, the claim is ineligible.
Claim 10 is rejected for the same reasons given for analogous claim 1. While claim 10 recites the further additional elements of a computing device, a memory storing executable instructions, and a processor for performing the method of claim 1, the additional elements simply amount to using a generic computer as a tool to perform the abstract idea and, therefore, do not integrate the abstract idea into a practical application or amount to significantly more than the abstract idea.
Claim 11 is also directed to the abstract idea as the engineer can manually obtain set performance information of each data path set, a computing capability parameter, operating intensity and sub-path performance information metrics by inspecting product datasheets, architecture manuals and optimization guides for this information or deriving this information from related parameters found in these guides. Since claim 11 lacks one or more additional elements that integrate the abstract idea into a practical application, or amount to significantly more than the abstract idea, the claim is ineligible.
Claim 12 is also directed to the abstract idea as the engineer can manually obtain set performance information of each data path set and an overall operation intensity metrics by inspecting product datasheets, architecture manuals and optimization guides for this information or deriving this information from related parameters found in these guides. Since claim 12 lacks one or more additional elements that integrate the abstract idea into a practical application, or amount to significantly more than the abstract idea, the claim is ineligible.
Claim 13 is also directed to the abstract idea as the engineer can manually perform the steps of determining a comparison result between the running performance information of the application and the performance test line of each data access path in the performance test model; and using the comparison result as the test result of the application. Since claim 13 lacks one or more additional elements that integrate the abstract idea into a practical application, or amount to significantly more than the abstract idea, the claim is ineligible.
Claim 14 is also directed to the abstract idea as the engineer can manually perform the steps of determining a comparison result between the running performance information of the application and the performance test line of each data access path in the performance test model; determining, based on the comparison result, an analysis result indicating to optimize the application; and using the analysis result as the test result of the application. Since claim 14 lacks one or more additional elements that integrate the abstract idea into a practical application, or amount to significantly more than the abstract idea, the claim is ineligible.
Claims 7 and 9 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Claim 7 recites a method for establishing a performance test model. Under a broadest reasonable interpretation, claim 7 would fall under the category of mental processes as the claim features limitations performable as mental steps, with the assistance of pen & paper, but without additional elements that integrate the abstract idea into a practical application or amount to significantly more than the abstract idea. An analysis of claim 7 according to the 2019 Revised Patent Subject Matter Eligibility test follows:
Step 1: Is the claim directed to a process, machine, manufacture or composition of matter?
Yes, claim 7 is directed to a method and, therefore, a process.
Step 2A Prong 1: Does the claim recite an Abstract Idea, Law of Nature, or Natural Phenomenon?
Yes, claim 7 recites an abstract idea as the following limitations are performable as mental processes with the assistance of pen & paper: determining a peak value of a computing capability of a computing unit of a computing chip based on a plurality of pieces of obtained first test data with different data volumes; - an engineer can manually obtain the peak value of a computing capability of a computing unit of a computing chip by inspecting product datasheets, architecture manuals and optimization guides for the peak value metric or, the engineer can manually calculate the peak value by applying component parameters, as found in these guides, to a particular formula to arrive at the peak value; determining, for each data access path of the computing chip, a peak bandwidth of each data access path based on a plurality of pieces of obtained second test data with different data volumes, wherein the computing chip comprises a plurality of memory units, and each data access path represents an access path between the memory units; - the engineer can manually obtain the peak bandwidth of each data access path of a computing chip, where each data access path represents an access path between memory units of the chip, by inspecting product datasheets, architecture manuals and optimization guides for the peak bandwidth or, the engineer can manually calculate the peak bandwidth by applying component parameters, as found in these guides, to a particular formula to arrive at the peak bandwidth; establishing a performance test model based on the peak bandwidth of each data access path and the peak value of the computing capability of the computing unit, wherein the performance test model comprises a performance test line of each data access path. - the engineer can manually establish a performance test model comprising a performance test line of each data access path, by incorporating the obtained peak value and peak bandwidth into a given formula representing the performance test model.
Step 2A Prong 2: Does the Claim Recite Additional Elements That Integrate The Judicial Exception Into A Practical Application?
Claim 7 recites the additional element of a computing device for performing the method. However, as recited, the additional element simply amounts to using a computer as a tool to perform the abstract idea and, therefore, does not integrate the abstract idea into a practical application.
Step 2B: Does the Claim Recite Additional Elements That Amount To Significantly More Than The Judicial Exception?
Claim 7 recites the additional element of a computing device for performing the method. However, as recited, the additional element simply amounts to using a computer as a tool to perform the abstract idea and, therefore, does not amount to significantly more than the abstract idea.
Claim 9 recites the additional element of wherein the computing chip comprises a central processing unit (CPU) chip, a tensor processing unit (TPU) chip, a neural network processing unit (NPU) chip, a graphics processing unit (GPU) chip, or an artificial intelligence (Al) chip. However, performing the method of claim 7 for the specific chips recited in claim 9 merely links use of the judicial exception to a particular technological environment or field of use. Thus, the additional element does not integrate the abstract idea into a practical application or amount to significantly more than the abstract idea.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 20160239212 A1 discloses systems and methods for modeling memory access behavior and memory traffic timing behavior. The NPL document "Cache-aware Roofline model: Upgrading the loft" analyzes the original Roofline model and proposes an approach for providing a more insightful performance modeling of modern architectures by introducing cache-awareness.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GEOFFREY R ST LEGER whose telephone number is (571)270-7720. The examiner can normally be reached M-F (IFP) ~9:00-5:00 pm.
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/GEOFFREY R ST LEGER/Primary Examiner, Art Unit 2192