DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 7/17/2026 has been entered.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Dykstra (US 18305139).
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With respect to claim 1, fig. 2 of Dykstra (US 18305139) discloses a high frequency module comprising: a first capacitor (235) including a first end connected to a first signal line (through to 205); a second capacitor (240) including a first end connected to a second signal line (through to 210); a first switch (217) provided between a second end of the first capacitor and a reference potential (VDD or GND); the first switch (217) being connected to the second end (between 235 and 217) of the first capacitor (235) at a first connection point (node between 235 and 217) ; a second switch (218) provided between a second end of the second capacitor and the reference potential (VDD or GND), the second switch (218) being connected to the second end (between 240 and 218) of the second capacitor (240) at a second connection point (node between 240 and 218); an inspection terminal (between 218 and 219) configured to allow inspection of both the first switch and the second switch; and a resistor (between VDD, 217 and 218) connected between the first connection point (node between 235 and 217) and the second connection point (node between 240 and 218), wherein the resistor includes; a first end directly connected to the second connection point (node between 240 and 218) ; and a second end directly connected to the first connection point (node between 235 and 217). ( Note: the resistance between 217 and 218 can be considered a single resistor).
Response to Arguments
Applicant's arguments filed 1/23/2026 have been fully considered but they are not persuasive.
With respect to applicant’s argument that neither transistor provided between the second end of a ca capacitor and a reference potential as claimed, the Examiner disagrees. VDD or ground would be the reference potential. VDD being connected to the switch through the resistor and gnd being connected to the resistor via the current source. The switch in the occupying space between the connection point at the node between 217 and 235. The resistor (the resistance between 217 and 218) would read on being connected directly at the first and second connection points.
Applicant’s arguments with regard to Ito are persuasive.
Allowable Subject Matter
Claims 10 and 12-20 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
With respect to claim 10, the prior art of record fails to suggest or disclose a first switch provided between a second end of the first capacitor at a first connection point; a second switch provide between a second end of the second capacitor and the reference potential, the second switch being connected to the second end of the second capacitor at a second connection point, …. The first resistor and the second resistor are connected in series between the first connection point and the second connection point, a first end of the series combination of the first resistor and the second resistor being directly connected to the first connection point and a second connection point and a second end of the series combination being directly connected to the second connection point: the first resistor includes: a first end connected between the second capacitor and the second switch and a second end connected between the first capacitor and the first switch.
Here, Dykstra would not necessarily have the two capacitors in series whereas Ito does not have the exact configuration as with respect to the connection points per claim 10.
Claims 12-20 are allowed based on their dependence on claim 10.
Claims 3-9 and 21-22 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
With respect to claim 3, Dyskestra fails to suggest or disclose the current limit resistor is connected between the inspection terminal and an inspection system.
Claim 4 is allowable based on its dependence on claim 3.
Claim 5, fails to disclose the frequency module of claim 1, further comprising an amplifier circuit as disclosed.
Claim 6 is allowable based on its dependence on claim 5.
Claim 7, is allowable based on claim 6.
Claim 8 is allowable based on its dependence on claim 7.
Claim 9 is fails to disclose the frequency modul3 of claim 1, wherein the first signal line is a power source supply voltage of an amplifier circuit, and the second signal line is a high frequency signal transmission line. (Here, no amplifier circuit is present).
Claim 21, is allowable based on its dependence on claim 5.
Claim 22, fails to disclose a third capacitor, a third switch a third resistor wherein the inspection terminal is configured to allow inspection of the first switch, the second switch and the third switch as disclosed.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHAREEM E ALMO whose telephone number is (571)272-5524. The examiner can normally be reached M-F (8:00am-4:00pm).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah Youssef can be reached at M-F (8:00am-4:00pm). The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KHAREEM E ALMO/Examiner, Art Unit 2849
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