Prosecution Insights
Last updated: April 19, 2026
Application No. 18/616,848

TRACKER MODULE AND COMMUNICATION DEVICE

Non-Final OA §102§103
Filed
Mar 26, 2024
Examiner
ANDERSON, MATTHEW D
Art Unit
2646
Tech Center
2600 — Communications
Assignee
Murata Manufacturing Co. Ltd.
OA Round
1 (Non-Final)
47%
Grant Probability
Moderate
1-2
OA Rounds
2y 9m
To Grant
49%
With Interview

Examiner Intelligence

Grants 47% of resolved cases
47%
Career Allow Rate
7 granted / 15 resolved
-15.3% vs TC avg
Minimal +2% lift
Without
With
+2.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
4 currently pending
Career history
19
Total Applications
across all art units

Statute-Specific Performance

§101
4.6%
-35.4% vs TC avg
§103
50.0%
+10.0% vs TC avg
§102
34.1%
-5.9% vs TC avg
§112
4.6%
-35.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 15 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-7 and 17-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lu et al. ("Design Considerations of Distributed and Centralized Switched-Capacitor Converters for Power Supply On-Chip", IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS), as discussed below: 1. A tracker module comprising (fig. 6, Section II. FULLY INTEGRATED VOLTAGE REGULATORS: "multilevel converters found a very suitable application in envelope tracking for the RF power amplifier supply modulation [37], [38], [43]",): a module substrate (Section I. INTRODUCTION: "lumped supply module ... Fig. 2 shows the separated on-chip voltage domains being powered up by different low-dropout (LDO) regulators with or without cascading an on-chip de-de converter, as the prestage";); an integrated circuit disposed on the module substrate (fig. 4, 12, 14); and a capacitor disposed on the module substrate and included in a switched-capacitor circuit that is configured to generate a plurality of discrete voltages based on an input voltage (figure 3c), wherein the integrated circuit includes a switch included in the switched-capacitor circuit and a switch included in an output switch circuit (fig. 3c, 3d, Section II: "As shown in Fig. 3(d), resonant SC converter can also be considered as a hybrid converter",) that is configured to selectively output at least one of the plurality of discrete voltages based on an envelope voltage (fig. 6, Section Ill. B. Multiphase Operation: "By changing the supply voltage VDDC of the ring oscillator, the oscillation frequency can be effectively and linearly controlled [26]. The error amplifier (EA) compares VOUT with VREF and drives the source follower (MN1 l with small output impedance that in turns drives the ring oscillator with fast transient response"), and wherein the integrated circuit is disposed adjacent to the capacitor on the module substrate (figures 14 and 15). 2. The tracker module according to claim 1, wherein the capacitor is a capacitor of a plurality of capacitors included in the switched-capacitor circuit that has a highest potential is applied thereto (fig. 3b; the upper capacitor is connected to the high DC bus potential). 3. The tracker module according to claim 1, wherein: the switched-capacitor circuit includes two capacitors including the capacitor; in a plan view of the module substrate, an outer periphery of the integrated circuit has a rectangular shape; a first capacitor of the two capacitors is disposed adjacent to a first side of the outer periphery of the integrated circuit; and a second capacitor of the two capacitors is disposed adjacent to a second side of the outer periphery of the integrated circuit, the second side being a side different than the first side (fig. 4, 5, the flying capacitors are mounted along the periphery of the rectangular IC, with Vin and Ground pads at the corners, and with DC bus capacitors in the "Pads of the Load" arranged between the flying capacitors in the "Pwr cells".). 4. The tracker module according to claim 1, wherein: the switched-capacitor circuit includes a plurality of capacitors including the capacitor; the plurality of capacitors include: a pair of flying capacitors that are configured to be complementarily charged and discharged, and a smoothing capacitor that is configured to smooth a voltage of the pair of flying capacitors; in a plan view of the module substrate, an outer periphery of the integrated circuit has a rectangular shape; and each of the pair of flying capacitors and the smoothing capacitor is adjacent to a first side of the outer periphery of the integrated circuit (fig. 4, 5, the flying capacitors are mounted along the periphery of the rectangular IC, with Vin and Ground pads at the corners, and with DC bus capacitors in the "Pads of the Load" arranged between the flying capacitors in the "Pwr cells".). 5. The tracker module according to claim 4, wherein, in the plan view of the module substrate, the smoothing capacitor is disposed between the pair of flying capacitors (fig. 4, 5, the flying capacitors are mounted along the periphery of the rectangular IC, with Vin and Ground pads at the corners, and with DC bus capacitors in the "Pads of the Load" arranged between the flying capacitors in the "Pwr cells".). 6. The tracker module according to claim 1, further comprising: a capacitor included in a pre-regulator circuit that is configured to convert the input voltage into a first voltage and to output the first voltage to the switched-capacitor circuit, wherein the integrated circuit includes a switch included in the pre-regulator circuit, and the integrated circuit is disposed adjacent to the capacitor of the pre-regulator circuit (fig. 1, 2;, comprise DC/DC pre-regulators and filters). 7. The tracker module according to claim 1, further comprising: a circuit component included in a filter circuit, wherein at least one of the plurality of discrete voltages is input into the filter circuit, and wherein the integrated circuit is disposed adjacent to the circuit component (fig. 1, 2;, comprise DC/DC pre-regulators and filters). 17. A tracker module comprising (fig. 6, Section II. FULLY INTEGRATED VOLTAGE REGULATORS: "multilevel converters found a very suitable application in envelope tracking for the RF power amplifier supply modulation [37], [38], [43]",): a module substrate (Section I. INTRODUCTION: "lumped supply module ... Fig. 2 shows the separated on-chip voltage domains being powered up by different low-dropout (LDO) regulators with or without cascading an on-chip de-de converter, as the prestage";); a switched-capacitor circuit that includes a switch and a capacitor and that is configured to generate a plurality of discrete voltages based on an input voltage (figure 3c); an output switch circuit that includes a switch and an input terminal connected to a control circuit and that is configured to selectively output at least one of the plurality of discrete voltages (fig. 6, Section Ill. B. Multiphase Operation: "By changing the supply voltage VDDC of the ring oscillator, the oscillation frequency can be effectively and linearly controlled [26]. The error amplifier (EA) compares VOUT with VREF and drives the source follower (MN1 l with small output impedance that in turns drives the ring oscillator with fast transient response", ); and an integrated circuit that includes the switch of the switched-capacitor circuit and the switch of the output switch circuit (fig. 3c, 3d, Section II: "As shown in Fig. 3(d), resonant SC converter can also be considered as a hybrid converter",), wherein the capacitor and the integrated circuit are disposed on the module substrate and adjacent to each other (figures 14-15). 18. The tracker module according to claim 17, wherein the capacitor is a capacitor of a plurality of capacitors included in the switched-capacitor circuit that has a highest potential is applied thereto (figure 3b). 19. The tracker module according to claim 17, wherein: the switched-capacitor circuit includes a plurality of capacitors including the capacitor, the plurality of capacitors include: a pair of flying capacitors that are configured to be complementarily charged and discharged, and a smoothing capacitor that is configured to smooth a voltage of the pair of flying capacitors, in a plan view of the module substrate, an outer periphery of the integrated circuit has a rectangular shape, and each of the pair of flying capacitors and the smoothing capacitor is disposed adjacent to a first side of the outer periphery of the integrated circuit (figures 4-5). 20. The tracker module according to claim 19, wherein, in the plan view of the module substrate, the smoothing capacitor is disposed between the pair of flying capacitors (figures 4-5). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Lu et al. and Perreault et al. (WO 2021/007299). While Lu et al. does teach the tracker module with switched capacitor circuitry, as discussed above, they do not specifically disclose a communication device comprising: a signal processing circuit configured to process a radio-frequency signal; a power amplifier circuit configured to transfer the radio-frequency signal between the signal processing circuit and an antenna; and the tracker module according to claim 1 that is configured to supply a power supply voltage to the power amplifier circuit. Perrault et al. teaches these specific RF power amplifiers in figures 1A and 1B. It would have been obvious to one skilled in the art at the time of filing modify the signal processing circuitry of Lu to include the RF power amplifiers in the signal processing circuitry of Perreault in order to dynamically adjust the supply voltages. Allowable Subject Matter Claims 8-15 are allowed. The following is an examiner’s statement of reasons for allowance: the prior art does not teach or disclose the specific circuitry design of various switches, terminals, and electrodes as recited in independent claim 8. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW D ANDERSON whose telephone number is (571)272-4177. The examiner can normally be reached M-F 8a-4p. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MATTHEW D. ANDERSON/Supervisory Patent Examiner, Art Unit 2646
Read full office action

Prosecution Timeline

Mar 26, 2024
Application Filed
Feb 11, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
47%
Grant Probability
49%
With Interview (+2.2%)
2y 9m
Median Time to Grant
Low
PTA Risk
Based on 15 resolved cases by this examiner. Grant probability derived from career allow rate.

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