DETAILED ACTION
This office action is in response to the application filed on 03/26/2024.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 03/26/2024 has been considered by the examiner.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claim 8. Therefore, the “ramp signal” must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. (Examiner’s Note: The ramp signal, its characteristics and function is not shown )
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
Claims 11 and 24 is objected to because of the following informalities: Claims 11 and 24 “A DC-DC power converter” should be “The DC-DC power converter”. Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 and 11-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Taghizadeh-Kaschani US 2004/0012376 (Herein TK) in view of Mednik US 2022/0200453.
Regarding Claim 1, TK teaches (Figures 1-4) a control circuit (1, 5, 35 and 19) comprising: a voltage control loop (with 1) configured to produce a control voltage (23) based on an output voltage of a DC-DC converter (buck) and a reference voltage (2); and a current control loop (with 35 and 19) configured to produce a control current (7) based on the control voltage (with 23), and to adjust the control current (7) based on a signal proportional to an input voltage (at 35 with 37) of the DC-DC converter, and to produce, based on the adjusted control current (sent to 5) and an inductor current (inductor current) in an inductor (15) of the DC-DC converter, a drive signal (from 5) to drive one or more power transistors (12) of the DC-DC converter. (For Example: Par. 38-44)
TK does not teach provide an adjusted control current that is inversely proportional to the input voltage.
Mednik teaches (Figure 3) to provide an adjusted control current (from 118) that is inversely proportional to the input voltage (AxB/Cm C is the input signal). (For Example: Par. 38-44)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of TK to include to provide an adjusted control current that is inversely proportional to the input voltage, as taught by Mednik so that the supply line transients do not propagate to the power supply output.
Regarding Claim 11, TK teaches (Figures 1-4) the DC-DC power converter (buck) comprising: the control circuit of claim 1; an input voltage terminal (13) to receive the input voltage; an output voltage terminal (output terminal) to provide the output voltage; the one or more power transistors (15); and the inductor (15), wherein the inductor is coupled between the input voltage terminal and the output voltage terminal (Fig. 2). (For Example: Par. 38-44)
Regarding Claim 12, TK teaches (Figures 1-4) wherein the DC-DC power converter is one of a boost converter or a buck-boost converter (Claim 15).
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Taghizadeh-Kaschani US 2004/0012376 (Herein TK) in view of Mednik US 2022/0200453 and further in view of Yang US 2010033136.
Regarding Claim 10, TK teaches (Figures 1-4) wherein the voltage control loop.
TK does not teach a transconductance amplifier having a first input terminal to receive the output voltage, a second input terminal to receive the reference voltage, and an output terminal to provide the control voltage; and a resistive-capacitive filter coupled in series between the output terminal of the transconductance amplifier and a reference voltage terminal.
Yang teaches (Figure 5) a transconductance amplifier (59) having a first input terminal to receive the output voltage (Vfb), a second input terminal to receive the reference voltage (Vref), and an output terminal to provide the control voltage (106); and a resistive-capacitive filter (60) coupled in series between the output terminal of the transconductance amplifier and a reference voltage terminal(68). (For Example: Par. 37)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of TK to include to provide an adjusted control current that is inversely proportional to the input voltage, as taught by Yang to improve transient operation of the system while providing a more stable output.
Claim(s) 20-21 and 24-25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Taghizadeh-Kaschani US 2004/0012376 (Herein TK) in view of Halberstadt US 2022/0271652.
Regarding Claim 20, TK teaches (Figures 1-4) a control circuit (1, 5, 35 and 19), comprising: a voltage control loop circuit (1) having a first input terminal to receive an output voltage of a DC-DC power converter (4), a second input terminal to receive a reference voltage (2), and an output terminal (23); a first transconductance amplifier circuit (36) having a first voltage terminal coupled to the output terminal of the voltage control loop circuit (23), a second voltage terminal coupled to a first reference voltage terminal (37), and a current terminal; a second transconductance amplifier circuit (33) configured to monitor an inductor current in the DC-DC power converter (sent to the input of 33) and having an output terminal.
TK does not teach a current control circuit having a first terminal coupled to the current terminal of the first transconductance amplifier circuit and a second terminal coupled to the output terminal of the second transconductance amplifier circuit, wherein the current control circuit is configured to modify a control current produced by the first transconductance amplifier circuit based on a signal proportional to an input voltage of the DC-DC power converter so as to produce a drive signal that modifies the inductor current in response to changes in the input voltage.
Halberstadt teaches (Figures 1 and 3) a current control circuit (248-250 and 242) having a first terminal coupled to the current terminal of the first transconductance amplifier circuit (244, par. 50) and a second terminal coupled to the output terminal of the second transconductance amplifier circuit (246, par. 53), wherein the current control circuit is configured to modify a control current (from 244) produced by the first transconductance amplifier circuit based on a signal proportional to an input voltage of the DC-DC power converter (with 362 output signal) so as to produce a drive signal (from 104) that modifies the inductor current (current of 114) in response to changes in the input voltage (with the circuitry of fig. 3). (For Example: Par. 46-57)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of TK to include a current control circuit having a first terminal coupled to the current terminal of the first transconductance amplifier circuit and a second terminal coupled to the output terminal of the second transconductance amplifier circuit, wherein the current control circuit is configured to modify a control current produced by the first transconductance amplifier circuit based on a signal proportional to an input voltage of the DC-DC power converter so as to produce a drive signal that modifies the inductor current in response to changes in the input voltage, as taught by Halberstadt to improve the quality of the sensed signal and improve efficiency of the system.
Regarding Claim 21, TK teaches (Figures 1-4) the apparatus.
TK does not teach wherein the current control circuit is configured to modify the control current produced by the first transconductance amplifier circuit based on the signal proportional to the input voltage of the DC-DC power converter so as to produce the drive signal that modifies the inductor current in response to changes in the input voltage without perturbing the output voltage.
Halberstadt teaches (Figures 1 and 3) wherein the current control circuit (242 and 248-250) is configured to modify the control current (from 244) produced by the first transconductance amplifier circuit (244) based on the signal proportional to the input voltage of the DC-DC power converter (with 362) so as to produce the drive signal (from 104) that modifies the inductor current (114) in response to changes in the input voltage without perturbing the output voltage (the output voltage is not even sensed). (For Example: Par. 46-57)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of TK to include wherein the current control circuit is configured to modify the control current produced by the first transconductance amplifier circuit based on the signal proportional to the input voltage of the DC-DC power converter so as to produce the drive signal that modifies the inductor current in response to changes in the input voltage without perturbing the output voltage, as taught by Halberstadt to improve the quality of the sensed signal and improve efficiency of the system.
Regarding Claim 24-25, TK teaches (Figures 1-4) the DC-DC power converter (Fig. 2) comprising the control circuit of claim 1; and wherein the DC-DC power converter is one of a boost converter (Claim 15) or a buck-boost converter.
Allowable Subject Matter
Claim 2-9 and 22-23 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 13-19 are allowed.
Reasons for Indicating Allowable Subject Matter
The following is an examiner’s statement of reasons for indicating Allowable Subject Matter:
Claim 2; prior art of record fails to disclose either by itself or in combination: “…wherein the reference voltage is a first reference voltage, and the current control loop comprises: a first transconductance amplifier coupled to the voltage control loop and configured to produce, at a current terminal, the control current based on the control voltage and a second reference voltage; a second transconductance amplifier configured to produce, at a sense terminal, a sense current based on the inductor current; and a current control circuit coupled to the first and second transconductance amplifiers and configured to adjust the control current to produce the adjusted control current”.
Claim 22; prior art of record fails to disclose either by itself or in combination: “…wherein the current control circuit comprises: a first transistor coupled between a voltage supply terminal and the first terminal; a first current source coupled between the voltage supply terminal and a first control terminal of the first transistor; a second transistor coupled between the voltage supply terminal and a second current source; a third current source coupled between the voltage supply terminal and a second control terminal of the second transistor, the third current source configured to produce a current proportional to the input voltage; a third transistor coupled between the first current source and a reference terminal and having a third control terminal coupled to the first terminal; and a fourth transistor coupled between the third current source and the reference terminal and having a fourth control terminal coupled to the first terminal.”
These features taken alone or in combination are neither disclosed nor suggested by the prior art of record.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GUSTAVO A ROSARIO-BENITEZ whose telephone number is (571)270-7888. The examiner can normally be reached M-F 9AM-5PM.
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/GUSTAVO A ROSARIO-BENITEZ/Primary Examiner, Art Unit 2838