DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-5, 8, 11, and 16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yu et al. (US pub 20140167254).
With respect to claim 1, Yu et al. teach a semiconductor package comprising (see figs. 1-9, particularly figs. 1 and 4 and associated text):
a printed circuit board 200A comprising a first pad portion (lower or bottom portion of 208A), the first pad portion surrounded by a passivation layer 206;
a semiconductor chip 10 that is mounted on the printed circuit board and comprises a second pad portion 28A, the second pad portion surrounded by an insulating layer 18;
a coupling part 302 that is between the first pad portion and the second pad portion; and
a spacer (upper or top portion of 208A) that is between the coupling part and the first pad portion, wherein the first pad portion and the second pad portion are electrically coupled to each other through the coupling part and the spacer, and
wherein the coupling part and the second pad portion are directly connected to teach other.
With respect to claim 2, Yu et al. teach the first pad portion and the spacer comprise the same conductive material. See figs. 1 and 4 and associated text.
With respect to claim 3, Yu et al. teach the first pad portion and the spacer comprise portions of a same layer. See figs. 1 and 4 and associated text.
With respect to claim 4, Yu et al. teach the spacer protrudes from the first pad portion toward the semiconductor chip. See figs. 1 and 4 and associated text.
With respect to claim 5, Yu et al. teach the semiconductor chip extends in a first direction (into page) and a second direction (lateral) different from the first direction, the coupling part and the spacer are included among a plurality of coupling parts (see fig. 1) and a plurality of spacers, respectively, that are arranged along a direction parallel with the first direction, and the plurality of coupling parts and the plurality of spacers are provided at a central region of the semiconductor chip in the second direction. See figs. 1 and 4 and associated text.
With respect to claim 8, Yu et al. teach the semiconductor chip extends in a first direction (into the page) and a second direction (lateral) different from the first direction, the coupling part and the spacer are included among a plurality of coupling parts and a plurality of spacers (see fig. 1), respectively, that are arranged along a direction parallel with the first direction, and the plurality of coupling parts and the plurality of spacers are adjacent to an edge of the semiconductor chip in the second direction. See figs. 1 and 4 and associated text.
With respect to claim 11, Yu et al. teach the printed circuit board further comprises the first pad portion is exposed by the passivation layer, and the spacer protrudes away from a surface of the passivation layer toward the semiconductor chip. See figs. 1 and 4 and associated text.
With respect to claim 16, Yu et al. teach the printed circuit board further comprises the first pad portion is exposed by the passivation layer, and the spacer protrudes away from a surface of the passivation layer toward the semiconductor chip. See figs. 1 and 4 and associated text.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 6, 7, 9, 10, 12, 13, 14, 15, 17, 18, and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US pub 20140167254).
With respect to claims 6, 7, 9, 10, 12, 14, 15, and 19-20, Yu et al. fail to teach the ranges for the spacer thicknesses and coupling part thicknesses.
However, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal values or ranges for the spacer thicknesses and coupling part thicknesses through routine experimentation and optimization to obtain optimal or desired device performance because there is no evidence indicating that claimed ranges critical or produce any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP 2144.05.
With respect to claims 12 and 17, Yu et al. fail to teach the ranges for the first pad portion thicknesses and the passivation layer thicknesses.
However, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal values or ranges for the first pad portion thicknesses and the passivation layer thicknesses through routine experimentation and optimization to obtain optimal or desired device performance because there is no evidence indicating that claimed ranges critical or produce any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP 2144.05.
With respect to claims 13 and 18, Yu et al. fail to teach the passivation layer includes a resin.
However, the use of dielectric or resin as passivation material is well-known in semiconductor art.
Response to Arguments
Applicant's arguments filed 8/7/26 have been fully considered but they are not persuasive. See the above rejections, further, in response to the applicant’s argument in the first full paragraph on page 7 of the amendment dated 8/7/26, it is submitted there is no structural difference between a pad structure and a bump structure, they’re just a piece of connector.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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LONG . PHAM
Examiner
Art Unit 2823
/LONG PHAM/Primary Examiner, Art Unit 2897
