DETAILED ACTION
The instant action is in response to application 27 March 2024.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the discharge time determination must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Figures 7 and 11 are objected to for lacking descriptive text labels, as well as not labelling the Y-axis.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph.
As to claim 1, applicant claims “determine a discharge time of the capacitor in response to a timing signal that is generated in response to a voltage from the analog soft start circuit.” The language requires some revision. Generally speaking, soft start circuits imply that the system starts in an unpowered state, meaning that the output capacitor should be at (or nearly) discharged. Even assuming that the claimed capacitor somehow retained its charge it is unclear why a soft-start would not charge rather than discharge the capacitor. It is unclear how one could measure the discharge time of a capacitor when applicant appears to be charging the capacitor during the soft start Though the reset signal would discharge the soft start-capacitor, the soft-start capacitor is not claimed in the independent claim. It does not appear to be readily clocked, especially since all of the logic appears to be asynchronous even if it corresponds to digital logic. There is no clock or oscillator shown, merely a 1-shot timer that appears to fire when the soft start has occurred and the system is UV flag is active. As such, it is unclear if applicant is using a timeout/blanking system to prevent an accidental recharge or if applicant is actually measuring the output capacitor discharge time or if applicant is simply sending an asynchronous discharge signal to the output capacitor. As such, it is unclear which portion of the specification seeks protection. For the purposes of examination, it will be assumed applicant is referring to generating an asynchronous discharge signal controlling a pull down circuit, which is suggested by Figures 1 and 11.
As to claim 13 and 17, these are similar to claim 1 above and have similar issues.
Claims 2-12, 14-15, 18-20 depend directly or indirectly from a rejected claim and are, therefore, also rejected under 35 USC 112(b) , or 35 U.S.C. 112 (pre-AIA ) second paragraph for the reasons set above.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
For method claims, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device will inherently perform the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed. Cir. 1986). Therefore the previous rejections based on the apparatus will not be repeated. (The claims have been condensed.)
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 7, 8, 13, 17 (as best understood) are rejected under 35 U.S.C. 103 as being unpatentable over Hosono (US 5828206) in view of Singh (US 20220085812).
As to claim 1, Hosono discloses a device comprising: a charge circuit; a discharge circuit; an undervoltage detection circuit (Col. 3, lines 34-40“This input voltage detector 7 stops supplying current to the two constant current sources S1 and S2, when a voltage of the voltage supply E1 connected to the input terminal 1 drops below a predetermined value, a condition causing the control transistor Q1 to stop operating. Here, the two constant current sources S1 and S2 may be of current mirror circuit.”), wherein the charge circuit and the discharge circuit are couplable to a capacitor, and wherein the charge circuit includes an analog soft start circuit; and control logic (op amp 4)
Hosono does not disclose control logic configured to determine a discharge time of the capacitor in response to a timing signal that is generated in response to a voltage from the analog soft start circuit
Sing teaches control logic configured to determine a discharge time of the capacitor (Fig. 3 has transistor 328 discharging the output capacitor based on logic)
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It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device above to use the discharge logic as disclosed in Sing to provide redundant overvoltage protection on the output.
As to the limitation, a timing signal that is generated in response to a voltage from the analog soft start circuit this is taught by the combination. Note that the timing circuit of Hashimoto uses two reference voltages to calculate the discharge time of the capacitor. In the system of Hosono, the time the signal crosses the lower threshold would be controlled by the analog signal since the UV detection would disable the discharge and op amp circuit.
As to claim 7, Hosono in view of Singh teaches wherein the device is integrated into a power management integrated circuit (PMIC) (Singh describes PCBs in ¶83).
As to claim 8, Hosono in view of Singh makes obvious wherein the device is a power management integrated circuit (PMIC), and the PMIC (Singh describes PCBs in ¶83) includes a pin for connection to the capacitor. Though not explicitly taught external capaciors are old and well known and therefore not patentable (See MPEP 2144.03 and US 6140924 Fig. 3; US 6184747 Col. 4, lines 39-45; US 20010014004 ¶23). The expected advantage would be to easily replace the capacitor.
As to claim 13, Hosono teaches a power management system comprising: a capacitor;
Singh teaches a PMIC (¶83) and control logic configured to determine a discharge time of the capacitor (see claim 1 above).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device above to use the discharge logic as disclosed in Sing to provide redundant overvoltage protection on the output.
Though not explicitly taught external capacitors are old and well known and therefore not patentable (See MPEP 2144.03 and US 6140924 Fig. 3; US 6184747 Col. 4, lines 39-45; US 20010014004 ¶23). The expected advantage would be to easily replace the capacitor.
As to claim 17, this is a method claim corresponding to apparatus claim 1 above and is regarded as obvious MPEP 2112.02.
Claims 2-6, 9-12, 14-16, 18-20 (as best understood) are rejected under 35 U.S.C. 103 as being unpatentable over Hosono (US 5828206) in view of Singh (US 20220085812) and Lotfi (US 20060038238 ).
As to claim 2, Hosono in view of Singh teaches wherein the control logic includes a comparator.
They do not explicitly teach wherein the control logic includes an analog timer circuit configured to generate the timing signal, the analog timer circuit including a comparator and a reset switch.
Lotfi teaches wherein the control logic includes an analog timer circuit configured to generate the timing signal, the analog timer circuit including a comparator and a reset switch (Fig. 2, QSS, 275).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device above to use reset timing as disclosed in Lotfi to prevent false positives.
As to claim 3, Hosono in view of Singh and Lotfi teaches wherein the comparator is coupled to a soft start capacitor of the analog soft start (See Fig. 2).
As to claim 4, Hosono in view of Singh and Lotfi teaches wherein the comparator of the analog timer circuit is also coupled to a reference voltage (Fig. 2, 0.8V).
As to claim 5, Hosono in view of Singh and Lotfi teaches wherein the discharge time is a function of the reference voltage and a capacitance of the soft start capacitor (V=time based integral of current and the capacitance).
As to claim 6, Hosono in view of Singh and Lotfi teaches wherein the reset switch is configured to discharge the voltage from the analog soft start circuit in response to a timer reset signal (Qss discharges cap voltage).
As to claim 9, Hosono in view of Singh wherein the control logic includes combination logic
They do not explicitly teach latches.
Lotfi teaches latches (¶55 describes how it latches the capacitor discharge switch).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device above to use latches as disclosed in Lotfi to discharge the output when the converter is not functioning properly.
As to claim 10, Hosono in view of Singh and Lotfi teaches wherein the control logic includes an AND (280) gate configured to receive the timing signal and an undervoltage detection signal.
As to claim 11, Hosono in view of Singh and Lotfi teaches wherein timing control logic includes an AND gate configured to receive the timing signal from the analog timer circuit and the undervoltage detection signal from the undervoltage detection circuit (280).
As to claim 12, Hosono in view of Singh and Lotfi teaches wherein the control logic further includes a latch configured to generate an undervoltage fault signal in response to the output of the AND gate (¶55).
As to claims 14-16, these are similar to apparatus claims 2-5 above, just dependent on claim 13 rather than claim 1, and are regarded as obvious for similar reasons.
Claims 18-20 are method claims corresponding to the apparatus claims 2, 11, and 12 above and are obvious MPEP 2112.02.
Conclusion
Examiner has cited particular column, paragraph, and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETER M NOVAK whose telephone number is (571)270-1375. The examiner can normally be reached on 9AM-5PM,Monday through Thursday, EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu Tran can be reached on 571-270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PETER M NOVAK/ Primary Examiner, Art Unit 2839