Prosecution Insights
Last updated: October 27, 2026
Application No. 18/618,180

DOHERTY AMPLIFIER CIRCUIT

Final Rejection §102§103
Filed
Mar 27, 2024
Priority
Mar 31, 2023 — JP 2023-058640
Examiner
RAHMAN, HAFIZUR
Art Unit
2843
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Murata Manufacturing Co., Ltd.
OA Round
2 (Final)
93%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 93% — above average
93%
Career Allowance Rate
713 granted / 764 resolved
+25.3% vs TC avg
Moderate +9% lift
Without
With
+8.6%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
25 currently pending
Career history
803
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
44.7%
+4.7% vs TC avg
§102
35.9%
-4.1% vs TC avg
§112
13.3%
-26.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 764 resolved cases

Office Action

§102 §103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Double Patenting The double patenting rejection has not been overcome by the amendment made to the claims as argued by the applicant. So, an obvious double patenting rejection is in effect. The applicant is requested to file a timely terminal disclaimer to overcome the rejection or amend the claims further that could differentiate the conflicting claims to be patentably distinct. Please see below the comparison between the conflicting claim of the current invention (18/618,180) against the copending application (18/441,291). Copending Application (18/618,180) Claims Application 18/441,291 Claims (Attached File) Comparison & Alignment Notes Claim 1 (Currently amended) A Doherty amplifier circuit comprising: a carrier amplifier configured to amplify a high frequency signal. a peak amplifier configured to amplify the high frequency signal. a control circuit configured to detect a drive level of the carrier amplifier with a sensitivity or a threshold value set with reference to a detection result of an input signal to the carrier amplifier and to control the peak amplifier based on the detected drive level. Claim 1 A Doherty amplifier circuit comprising: a carrier amplifier configured to amplify a first input high frequency signal; a peak amplifier configured to amplify a second input high frequency signal; a first bias circuit configured to apply a first bias to the carrier amplifier; a second bias circuit configured to apply a second bias to the peak amplifier; and a control circuit configured to control the second bias circuit on the basis of an input high frequency signal and a signal indicating a drive level of the carrier amplifier. Both independent claims define a Doherty amplifier with a carrier amplifier, peak amplifier, and a control circuit that monitors both the input signal and the drive level of the carrier amplifier to control peak amplifier bias/operation. Claim 1 of the current application is broader version of claim 1 pf the copending application and therefore encompasses all limitations of claim 1 of the copending application. Response to Arguments Applicant's arguments filed on 09/08/2026 have been fully considered but they are not persuasive. In the Remarks, the applicant traversed the rejection under 35 U.S.C. § 102(a)(1) over Lehtola, arguing that Lehtola fails to teach or render obvious: "a control circuit configured to detect a drive level of the carrier amplifier with a sensitivity or a threshold value set with reference to a detection result of an input signal to the carrier amplifier". Specifically, the applicant contends that Lehtola's disclosed detection resolution ("tens of mV") is merely an order of magnitude and represents a "fixed, predetermined, and arbitrary value" because Lehtola's circuit components (transistor 38, resistors 41 and 43, and capacitor 44) are static and non-variable. The applicant asserts that because these components are not variable, Lehtola cannot have a sensitivity or threshold set with reference to an input signal to the carrier amplifier. The applicant's distinction between a "fixed, predetermined, and arbitrary value" and the amended claim language is unconvincing and legally/technically unfounded for the following reasons: Direct Electrical Coupling to the Input Signal: As explicitly disclosed in Lehtola (e.g., Fig. 1, Fig. 2A, Fig. 4, and paragraphs [0005], [0081], [0103]), the saturation detector (3, 23, 103) includes an input directly and electrically connected to the input terminal (RFIN) of the power amplifier / carrier amplification stage. The detection transistor (8, 38, 108) receives the input voltage / input signal directly, allowing the saturation detector to monitor the input signal in real time. Threshold Set with Reference to Carrier Saturation Physics: Lehtola teaches that the saturation detector is calibrated to detect small changes in base voltage (e.g., tens of mV) that occur precisely when the gain transistor (7, 37, 107) enters compression and saturation. As explained in paragraphs [0087] and [0103], when saturation occurs, the collector-emitter voltage reaches the knee voltage, causing the DC beta parameter (b = IC/IB) to degrade, base current IB to rapidly decrease, and the base voltage to drop below normal VBE. Real-Time Dynamic Relationship: Therefore, both Lehtola and the current invention operate on the exact same physical principle: monitoring the input signal / input power level into the carrier amplifier in real time and establishing a detection threshold referenced to the saturation level (compression characteristics) of the carrier amplifier. The threshold is not "arbitrary"; it is precisely calibrated to the specific base-emitter voltage transition and current degradation points dictated by the gain transistor's saturation curve. Irrelevance of Fixed vs. Variable Components: The applicant's assertion that Lehtola's threshold is arbitrary simply because its circuit components (e.g., resistors and capacitors) are static ignores standard circuit design principles. A fixed circuit topology designed with specific component values to trigger at a predetermined voltage drop (e.g., tens of mV) corresponds directly to a preset threshold value established with reference to the input signal's drive level. The claim language ("a sensitivity or a threshold value set with reference to a detection result of an input signal") is drafted in functional terms and is fully satisfied by Lehtola's configuration, wherein the detection threshold is structurally and functionally tied to the input voltage driving the carrier amplifier into saturation. Because Lehtola explicitly teaches a saturation detector electrically connected to the input of the carrier amplifier to monitor input voltage changes and detect saturation with precise sensitivity (tens of mV) referenced to the operational state of the carrier amplifier, the amended limitation of Claim 1 is fully anticipated by Lehtola. Accordingly, withdrawal of the 35 U.S.C. § 102 rejection of Claim 1 (and its dependent claims) is respectfully traversed, and maintaining the rejection is warranted. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 4 and 5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lehtola (US 2021/0036661 A1). PNG media_image1.png 578 505 media_image1.png Greyscale Fig. 4 of Lehtola reproduced for ease of reference. Regarding Claim 1, Lehtola discloses a Doherty power amplifier circuit (power amplifier system 110). Lehtola also discloses a carrier amplifier configured to amplify a high frequency signal (carrier amplification stage 101 receives and amplifies the RF input signal). Lehtola also discloses a peak amplifier configured to amplify the high frequency signal (peaking amplification stage 102). Finally, Lehtola discloses a control circuit (saturation detector 103) configured to detect a drive level of the carrier amplifier based on an input of the carrier amplifier (the saturation detector 103 includes an input electrically connected to the input of the carrier amplification stage 101 to monitor for saturation (threshold as recited in the claim currently amended), which directly corresponds to the drive level/compression state of the amplifier). Furthermore, Lehtola teaches that the control circuit controls the peak amplifier based on the detected drive level (the saturation detector 103 outputs a saturation detection signal SAT_DETECT which is provided to the peaking amplification stage 102 to turn it on or adjust its bias level in response to the saturation/drive level of the carrier stage). Please note that the amended portion of the claim is adequately addressed in the response to the argument section. Regarding Claim 4: Lehtola discloses a Doherty amplifier circuit where the control circuit (saturation detector 103) is configured to detect the input signal of the carrier amplifier. Lehtola explicitly states that the input of the saturation detector 103 is "electrically connected to the input of the carrier amplification stage 101" to monitor the RF input signal voltage. Furthermore, Lehtola discloses that this monitored input voltage is used to detect the saturation state (which is the drive level) of the carrier amplifier, noting that the base voltage decreases below VBE as the amplifier enters saturation. Therefore, Lehtola fully anticipates detecting the drive level based on the detected input signal. Regarding Claim 5: Lehtola discloses that the control circuit has a defined sensitivity or threshold value for detecting this drive level based on the input signal. Specifically, Lehtola teaches that the saturation detector is specifically calibrated to "detect for very small changes in base voltage, for instance, tens of mV". This sharp sensitivity threshold triggers the saturation detection signal (SAT_DETECT) to switch between a high and low voltage state to activate the peaking stage. Thus, the limitation is anticipated. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 2 and 3 are rejected under 35 U.S.C. 103 as being unpatentable over Lehtola in view of Marr (US 2022/0158346 A1). Regarding claims 2 and 3, Lehtola teaches a Doherty amplifier circuit comprising a carrier amplifier and a peak amplifier, along with a control circuit (saturation detector 103) configured to detect the drive level (saturation) of the carrier amplifier and control the peak amplifier based on that detected drive level. Lehtola, however, does not disclose detecting the drive level of the carrier amplifier based on a supply current of an amplifying transistor in the carrier amplifier. Instead, Lehtola detects saturation by monitoring the base voltage and utilizing thermal coupling between a gain transistor and a detection transistor. PNG media_image2.png 495 693 media_image2.png Greyscale Fig. 8B of Marr reproduced for ease of reference. Marr, in a similar field of endeavor, discloses an advanced power management system for RF field effect transistor (FET) amplifiers that actively monitors the operational state and drive level of an amplifier by directly sensing the supply current (drain current) of the amplifying transistor. Per Claim 2, Marr teaches a sensing system 821 (Fig. 8B) configured to sense current values (e.g., drain supply current) of individual amplifiers, stating that the "sensed current value can be analyzed… to determine an operational or a physical characteristic", §0330, of the amplifier and adjust the bias accordingly. Per Claim 3, Marr explicitly teaches that the control circuit evaluates the supply current using a threshold value to determine the amplifier's state. Marr discloses defining an "upper current threshold value and lower current threshold value", §0357, Fig. 12, to determine if the measured supply current dictates that the operating state has deviated and requires a bias adjustment. PNG media_image3.png 244 523 media_image3.png Greyscale Fig. 12 of Marr reproduced for ease of reference. It would have been obvious to a person of ordinary skill in the art at the time of the invention to modify the drive-level detection mechanism of Lehtola to incorporate the supply current (drain current) sensing mechanism taught by Marr. Specifically, instead of relying on the complex thermal coupling and base-voltage monitoring of Lehtola, the control circuit would be configured to measure the drain supply current of the carrier amplifier and compare it against predefined current thresholds (as taught by Marr) to determine when the carrier amplifier is reaching its saturation drive level. The motivation to implement this modification is to provide a more direct, accurate, and layout-independent electrical measurement of the carrier amplifier's drive level. As Lehtola's thermal coupling requires strict spatial constraints (e.g., fabricating transistors within 20 µm of each other or within half a substrate thickness), a person of ordinary skill in the art would be highly motivated to adopt Marr's supply current sensing technique. Measuring the drain supply current eliminates restrictive thermal layout requirements while providing a highly reliable, instantaneous threshold metric to determine the amplifier's operational state and saturation limits. Claim 6 is rejected under 35 U.S.C. 103 as unpatentable over Lehtola in view of Hayakawa (US20110199156) considered the Common Knowledge in the art. Regarding claim 6, Lehtola teaches a power amplification system incorporating carrier and peak amplifiers managed by a control scheme that evaluates input parameters and saturation states to adjust amplifier operation. Lehtola's primary focus centers on supply voltage adjustment via thermal/saturation detectors, which may not explicitly detail a distinct control circuit computing drive level strictly from both an input and an output of the carrier amplifier simultaneously in a feedforward-feedback hybrid manner. Hayakawa teaches utilizing a control circuit that evaluates drive levels referencing both input signal characteristics and feedback/detection results from the carrier amplifier circuit to regulate subsequent stages. Modifying Lehtola's control architecture to incorporate dual input and output signal sensing (as taught by Hayakawa) involves substituting or augmenting single-ended sensing with established dual-point sensing techniques well-known in RF amplifier design. A person of ordinary skill in the art would be motivated to make this modification to accurately track gain compression and phase distortion across varying load mismatches (VSWR), thereby optimizing efficiency and maintaining strict compliance with spectral mask requirements. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAFIZUR RAHMAN whose telephone number is (571)270-0659. The examiner can normally be reached M-F: 10-6. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Han can be reached on (571) 272-2078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HAFIZUR RAHMAN/Primary Examiner, Art Unit 2843.
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Prosecution Timeline

Mar 27, 2024
Application Filed
Jun 09, 2026
Non-Final Rejection mailed — §102, §103
Sep 08, 2026
Response Filed
Sep 29, 2026
Final Rejection mailed — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
93%
Grant Probability
99%
With Interview (+8.6%)
2y 1m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 764 resolved cases by this examiner. Grant probability derived from career allowance rate.

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