DETAILED ACTION
1. This action is in response to the application filed on 3/27/24.
Notice of Pre-AIA or AIA Status
2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
4. Claims 1-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Khajehoddin et al. (US 20140078780).
Regarding claim 1: Khajehoddin et al. disclose (i.e. figures 19 and 24) a state feed-back controller (i.e. controller of figures 19 and 24) for controlling a first physical value and a second physical value (i.e. value of IL and VO) in a voltage mode (i.e. mode operation of figure 19) or in a current mode, the state feed-back controller comprising:
a first gain stage (i.e. k2) with a first gain parameter (i.e. parameter of k2), the first gain stage having an input and an output (i.e. input and output of k2);
a second gain stage (i.e. k1) with a second gain parameter (i.e. parameter of k1), the second gain stage having an Input and an output (i.e. input and output of k1);
a reference input (i.e. input for Vo ref) to receive a reference value (i.e. Vo ref);
a feed-back loop (i.e. loop includes adder for Vo and Vo ref, Res) having an input and an output (i.e. input and output of adder), the input of the feed-back loop receiving a difference (i.e. by adder) of an input value at the input (i.e. input Vo) of the second gain stage (i.e. k2) and the reference value (i.e. Vo ref); and
a combiner (i.e. combiner for k1, k2, Res) for combining an output value at the output of the first gain stage (i.e. k1), an output value at the output of the second gain stage (i.e. k2) and an output value (i.e. output of combiner for k1, k2, Res) at the output of the feed-back loop (i.e. loop includes adder for Vo and Vo ref, Res),
wherein, when the state feed-back controller is configured to be operative in the current mode, the first physical value is a current value received at the input of the second gain stage, the second physical value is a voltage value received at the input of the first gain stage, and the reference value is a reference current value, and wherein an absolute value of the first gain parameter is smaller than an absolute value of the second gain parameter; or
wherein, when the state feed-back controller (i.e. controller of figures 19 and 24) is configured to be operative in the voltage mode (i.e. mode operation of figure 19), the first physical value is a current value (i.e. value of IL) received at the input of the first gain stage (i.e. k1), the second physical value is a voltage value (i.e. value of Vo) received at the input of the second gain stage (i.e. k2), the reference value (i.e. Vo ref) is a reference voltage value (i.e. value of Vo ref) and wherein an absolute value of the second gain parameter is smaller than an absolute value of the first gain parameter (i.e. ¶ 103).
Regarding claim 2: (i.e. figures 19 and 24) wherein, when the state feed-back controller is configured to be operative in the current mode, the first gain parameter is set to zero or within a range around zero; or wherein, when the state feed-back controller (i.e. controller of figures 19 and 24) is configured to be operative in the voltage mode (i.e. mode operation of figure 19), the second gain parameter is set to zero or within a range around zero (i.e. ¶ 103).
Regarding claims 3-4: (i.e. figures 19 and 24) further comprising: a second feed-back loop (i.e. loop includes Z-1, Kd) configured to feed back an output value of the combiner to the combiner (i.e. combiner for k1, k2, Res), the second feed-back loop comprising a delay stage (i.e. delay stage of Z1 and/or Kd) for delaying the output value of the combiner (i.e. combiner for k1, k2, Res) and a third gain stage (i.e. Kd) with a third gain parameter (i.e. parameter of Kd) for applying the third gain parameter to the delayed output (i.e. from Z1) value of the combiner (i.e. ¶ 97-103).
Regarding claims 5-6: (i.e. figures 19 and 24) wherein the second feed-back loop is configured according to a design criterion, wherein, when the state feed-back controller is operative in the current mode, the second gain parameter and the third gain parameter are adjusted based on the design criterion of the second feed-back loop; or wherein, when the state feed-back controller (i.e. loop includes Z-1, Kd) is operative in the voltage mode (i.e. mode operation of figure 19), the first gain parameter (i.e. k2) and the third gain parameter (i.e. Kd) are adjusted (i.e. adjusted Ui and/or PWM signal) based on the design criterion (i.e. criterion of Z1, Kd) of the second feed-back loop (i.e. loop includes Z-1, Kd).
Regarding claims 7-8: (i.e. figures 19 and 24) further comprising: a control output for providing an output value of the combiner (i.e. combiner for k1, k2, Res) as a control signal (i.e. signal of Wi) of the state feed-back controller (i.e. controller of figures 19 and 24).
Regarding claims 9-10: (i.e. figures 19 and 24) wherein, when the state feed-back controller is operative in the current mode, the feed-back loop is configured to track the first physical value to the reference value based on a feed-back filter or wherein, when the state feed-back controller (i.e. controller of figures 19 and 24) is operative in the voltage mode (i.e. mode operation of figure 19), the feed-back loop (i.e. loop includes adder for Vo and Vo ref, Res) is configured to track the second physical value to the reference value (i.e. value of Vo) based on the feed-back filter (i.e. LC).
Regarding claim 11: (i.e. figures 19 and 24) wherein the feed-back loop comprises a resonant controller (i.e. RES) in a time-discrete domain (i.e. domain of RES), wherein the resonant controller (i.e. RES) is a passive system within a specified frequency range around a resonant frequency (i.e. range of RES) of the resonant controller (i.e. ¶ 116-117).
Regarding claim 12: (i.e. figures 19 and 24) wherein the resonant frequency of the resonant controller (i.e. RES) corresponds to a reference frequency or a harmonic of the reference frequency (i.e. ¶ 97-101 and 116-117).
Regarding claims 13-14: (i.e. figures 19 and 24) wherein the resonant controller is configured to have two poles for a damping (i.e. provided and function of the resonance controller) (i.e. ¶ 29, 49-53, 64-68).
Regarding claim 15: Khajehoddin et al. disclose a power converter (i.e. figures 19 and 24) comprising:
an input for receiving a direct current, DC, voltage (i.e. VDC); and at least one output for providing an alternating current, AC, voltage at a reference frequency (i.e. output of the power converter of figure 18), wherein the at least one output is connected to an LC filter network, the LC filter network comprising an inductor (L) and a capacitor (C) (i.e. LC),
wherein the power converter is controlled by a state feed-back controller (i.e. controller of figures 19 and 24) for controlling a first physical value and a second physical value (i.e. value of IL and VO) in a voltage mode (i.e. mode operation of figure 19) or in a current mode, the state feed-back controller comprising:
a first gain stage (i.e. k2) with a first gain parameter (i.e. parameter of k2), the first gain stage having an input and an output (i.e. input and output of k2);
a second gain stage (i.e. k1) with a second gain parameter (i.e. parameter of k1), the second gain stage having an Input and an output (i.e. input and output of k1);
a reference input (i.e. input for Vo ref) to receive a reference value (i.e. Vo ref);
a feed-back loop (i.e. loop includes adder for Vo and Vo ref, Res) having an input and an output (i.e. input and output of adder), the input of the feed-back loop receiving a difference (i.e. by adder) of an input value at the input (i.e. input Vo) of the second gain stage (i.e. k2) and the reference value (i.e. Vo ref); and
a combiner (i.e. combiner for k1, k2, Res) for combining an output value at the output of the first gain stage (i.e. k1), an output value at the output of the second gain stage (i.e. k2) and an output value (i.e. output of combiner for k1, k2, Res) at the output of the feed-back loop (i.e. loop includes adder for Vo and Vo ref, Res),
wherein, when the state feed-back controller is configured to be operative in the current mode, the first physical value is a current value received at the input of the second gain stage, the second physical value is a voltage value received at the input of the first gain stage, and the reference value is a reference current value, and wherein an absolute value of the first gain parameter is smaller than an absolute value of the second gain parameter; or
wherein, when the state feed-back controller (i.e. controller of figures 19 and 24) is configured to be operative in the voltage mode (i.e. mode operation of figure 19), the first physical value is a current value (i.e. value of IL) received at the input of the first gain stage (i.e. k1), the second physical value is a voltage value (i.e. value of Vo) received at the input of the second gain stage (i.e. k2), the reference value (i.e. Vo ref) is a reference voltage value (i.e. value of Vo ref) and wherein an absolute value of the second gain parameter is smaller than an absolute value of the first gain parameter (i.e. ¶ 103).
Regarding claim 16: (i.e. figures 19 and 24) wherein the first physical value is a current value (i.e. value of IL) at the inductor (L) of the LC filter network (i.e. LC) and the second physical value is a voltage value (i.e. value of Vo) at the capacitor (C) of the LC filter network (i.e. LC).
Regarding claim 17: (i.e. figures 19 and 24) wherein the power converter is controlled by the state feed-back controller based on a state-space model (i.e. mode of figure 19), the state space model comprising: the current value at the inductor (L) of the LC filter network (i.e. LC), the voltage value (i.e. value of Vo) at the capacitor (C) of the LC filter network, an inductance value (i.e. value of IL) of the inductor (L) of the LC filter network (i.e. LC), and a capacitance value (i.e. value of C) of the capacitor (C) of the LC filter network (i.e. LC).
Regarding claims 18-19: (i.e. figures 19 and 24) wherein the power converter controlled by the state feed-back controller forms with the LC filter network (i.e. LC) a passive system having an output impedance (i.e. impedance of LC) which phase-angle lies within a predefined range (i.e. provided by LC).
Regarding claim 20: (i.e. figures 19 and 24) wherein the passive system is configured to damp oscillations generated externally or internally by the power converter and/or the LC filter network (i.e. function of LC network having the passive system) (i.e. ¶ 97-101 and 116-117).
5. Claims 1-2, 7-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Khajehoddin et al. (US 20140204633).
Regarding claims 1 and 15: Khajehoddin et al. disclose a power converter (i.e. figures 1 and 6D) comprising: an input for receiving a direct current, DC, voltage (i.e. VDC); and at least one output for providing an alternating current, AC, voltage at a reference frequency (i.e. Vgrid and frequency of output), wherein the at least one output is connected to an LC filter network, the LC filter network comprising an inductor (L) and a capacitor (C) (i.e. L1, C1), wherein the power converter is controlled by a state feed-back controller (i.e. controller of figure 6);the state feed-back controller for controlling a first physical value and a second physical value (i.e. value of voltage and current) in a voltage mode or in a current mode (i.e. function of figure 6D), the state feed-back controller comprising:
a first gain stage (i.e. K3) with a first gain parameter (i.e. parameter of K3), the first gain stage (i.e. K3) having an input and an output;
a second gain stage (i.e. K1) with a second gain parameter (i.e. parameter of K1), the second gain stage (i.e. K1) having an input and an output;
a reference input (i.e. input of adder) to receive a reference value (i.e. value of I*grid);
a feed-back loop (i.e. loop of 100, 140) having an input and an output, the input of the feed-back loop receiving a difference (i.e. by adder) of an input value at the input of the second gain stage (i.e. K3) and the reference value (i.e. I*grid);
a combiner (i.e. combiner for 100, 140, k1-3) for combining an output value at the output of the first gain stage (i.e. K3), an output value at the output of the second gain stage (i.e. K1) and an output value at the output of the feed-back loop (i.e. loop of 100, 140), wherein,
when the state feed-back controller is configured to be operative in the current mode (i.e. function of figure 6D), the first physical value is a current value (i.e. value of Igrid) received at the input of the second gain stage (i.e. K1), the second physical value is a voltage value (i.e. value of Vgrid) received at the input of the first gain stage (i.e. K3), and the reference value is a reference current value (i.e. current value of I*grid), and wherein an absolute value of the first gain parameter (i.e. parameter of K1) is smaller than an absolute value of the second gain parameter (i.e. parameter of K3) (i.e. ¶ 78); or
wherein, when the state feed-back controller is configured to be operative in the voltage mode, the first physical value is a current value received at the input of the first gain stage, the second physical value is a voltage value received at the input of the second gain stage, the reference value is a reference voltage value and wherein an absolute value of the second gain parameter is smaller than an absolute value of the first gain parameter.
Regarding claim 2: (i.e. figure 6D) wherein, when the state feed-back controller is configured to be operative in the current mode (i.e. function of figure 6D), the first gain parameter (i.e. parameter of K3) is set to zero or within a range around zero; or wherein, when the state feed-back controller is configured to be operative in the voltage mode, the second gain parameter is set to zero or within a range around zero.
Regarding claim 7: (i.e. figure 6D) further comprising: a control output for providing an output value of the combiner (i.e. combiner for 100, 140, k1-3) as a control signal of the state feed-back controller (i.e. ¶ 68, 82).
Regarding claim 8: (i.e. figure 6D) further comprising: a control output for providing an output value of the combiner (i.e. combiner for 100, 140, k1-3) as a control signal of the state feed-back controller (i.e. controller of figure 6).
Regarding claims 9-10: (i.e. figure 6D) wherein, when the state feed-back controller is operative in the current mode, the feed-back loop (i.e. loop of 100 and converter) is configured to track the first physical value (i.e. value of Vgrid) to the reference value based on a feed-back filter (i.e. L1, C1) or wherein, when the state feed-back controller is operative in the voltage mode, the feed-back loop is configured to track the second physical value to the reference value based on the feed-back filter.
Regarding claim 11: (i.e. figure 6D) wherein the feed-back loop comprises a resonant controller (i.e. 100) in a time-discrete domain (i.e. from 100), wherein the resonant controller (i.e. 100) is a passive system within a specified frequency range around a resonant frequency (i.e. resonant frequency of 100) of the resonant controller (i.e. ¶ 80-97).
Regarding claim 12: (i.e. figure 6D) wherein the resonant frequency of the resonant controller (i.e. 100) corresponds to a reference frequency or a harmonic of the reference frequency (i.e. ¶ 80-97).
Regarding claims 13-14: (i.e. figure 6D) wherein the resonant controller is configured to have two poles (i.e. poles of 100) for a damping (i.e. ¶ 80-97).
Regarding claim 16: (i.e. figures 1 and 6D) wherein the first physical value is a current value at the inductor (L) (i.e. igrid) of the LC filter network (i.e. L1, C1) and the second physical value is a voltage value (i.e. VC) at the capacitor (C) of the LC filter network.
Regarding claim 17: (i.e. figures 1 and 6D) wherein the power converter is controlled by the state feed-back controller based on a state-space model (i.e. model of figure 6D), the state space model comprising: the current value at the inductor (L) (i.e. igrid) of the LC filter network (i.e. L1, C1), the voltage value at the capacitor (C) of the LC filter network, an inductance value of the inductor (L) (i.e. L1) of the LC filter network, and a capacitance value of the capacitor (C) (i.e. C1) of the LC filter network (i.e. L1, C1) (i.e. ¶ 80-97).
Regarding claims 18-19: (i.e. figures 1 and 6D) wherein the power converter controlled by the state feed-back controller forms with the LC filter network (i.e. L1, C1) a passive system (i.e. system provide by L1, C1) having an output impedance (i.e. impedance of L1, C1) which phase-angle lies within a predefined range (i.e. phase angle of L1, C1) (i.e. ¶ 80-97).
Regarding claim 20: (i.e. figures 1 and 6D) wherein the passive system (i.e. system provide by L1, C1) is configured to damp oscillations generated externally or internally by the power converter and/or the LC filter network (i.e. L1, C1).
Conclusion
6. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NGUYEN TRAN whose telephone number is (571)270-1269. The examiner can normally be reached Flex: M-F 8-7.
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/Nguyen Tran/Primary Examiner, Art Unit 2838