DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 08/13/2026 has been entered.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
In re to claims 16-30, method claims 16-30 are rejected based on the following case law, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device inherently performs the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed Cir. 1986). Therefore, the previous rejections based on the apparatus will not be repeated.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 10-11, 14, 16, 25-26 and 29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tanaka US 5504667 in view of Wang US 2016/0301387.
Regarding Claims 1 and 16, Tanaka teaches (Figures 1and 8) a power conversion system (Fig. 1): a rectifier circuit (cnv) and a load conversion circuit (inv), an output port of the rectifier circuit forms a DC bus (at P), and an input port of the load conversion circuit is connected to the DC bus (at P); a power conversion module (Vsi) is connected to the DC bus, wherein an input port of the power conversion module is connected in parallel (with TR) with the output port of the rectifier circuit (from cnv) and the input port of the load conversion module (inv), wherein the power conversion module includes a controller (see fig. 8, controller), a damping circuit (s1-s4 and d1-d4) and a first capacitor (Cf), wherein the damping circuit comprises a first inductor (Lf), a first switch (S1), a second switch (S2), and a second capacitor (Ca), and the first switch and the second switch are connected in series to form a first bridge arm (between s1-s2); and the second capacitor (Ca) is connected in parallel to the first bridge arm (see fig. 8), the controller comprises: a capacitor voltage control unit (c2,Ga, Pll and ML3), obtaining a first reference value (Ia*) according to an input voltage of the power conversion module (Vsm sent to FCR and IF used by PLL), a voltage of the second capacitor (Va), and a voltage reference value of the second capacitor (Va*); a damping current generation unit (fcr), obtaining a second reference value (If*) according to the input voltage (Vsm) of the power conversion module (at fig. 1) and a current signal (see fig. 1, Id1 and Id2 are input to FCR) related to an input current of the power conversion module; and an inductor current control unit (Ad2, C1, Gf and pwmc), outputting a driving signal (gf) according to a current flowing through the first inductor (If) and a current reference value (If’*) of the first inductor to control the first switch and the second switch (S1-s2), in order to stabilize the input voltage (with active compensation) of the power conversion module (at fig. 1), wherein the current reference value of the first inductor is obtained according to the first reference value and the second reference value (from ad2 producing If’*). (For Example: Col 5-6 and 12)
Tanaka does not teach the damping circuit and the first capacitor are connected in series to form the input port of the power conversion module; the first inductor is connected between an intermediate node of the first bridge arm and the first capacitor.
Wang teaches (Figures 2) the damping circuit (Sw) and the first capacitor (C1) are connected in series to form the input port of the power conversion module (at b1); the first inductor (L1) is connected between an intermediate node of the first bridge arm and the first capacitor (t1-t2 and c1).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Tanaka to include the damping circuit and the first capacitor are connected in series to form the input port of the power conversion module, the first inductor is connected between an intermediate node of the first bridge arm and the first capacitor, as taught by Wang to provide an active filtering system intended to be connected to a DC power supply bus, which is particularly compact, low in cost and generates limited losses.
Regarding Claims 10 and 25, Tanaka teaches (Figures 1and 8) wherein the power conversion module (fig. 8) further comprises a second adder (ad2), and the current reference value of the first inductor (If’*) is obtained by adding the first current reference value and the second current reference value through the second adder (see fig. 8). (For Example: Col 5-6 and 12)
Regarding Claims 11 and 26, Tanaka teaches (Figures 1and 8) a rectification circuit (cnv) and a load conversion circuit (Inv), and the input port of the power conversion module is connected in parallel to the output port of the rectification circuit and the input port of the load conversion circuit (see fig. 1); the sum of the input current of the power conversion module and the output current of the rectification circuit is the input current of the load conversion circuit (at P), and the load conversion circuit is a DC-AC conversion circuit (Inv) or a DC-DC conversion circuit. (For Example: Col 5-6 and 12)
Regarding Claims 14 and 29, Tanaka teaches (Figures 1and 8) a load conversion circuit (INV), wherein the input port of the power conversion module (fig. 8) is connected in parallel to the input port of the load conversion circuit (see Fig. 1), and the current signal related to the input current of the power conversion module is the input current of the load conversion circuit (If or Id, fig. 1) or the output current of the load conversion circuit. (For Example: Col 5-6 and 12)
Claim(s) 2-3, 5, 12, 17-18, 20 and 27 are rejected under 35 U.S.C. 103 as being unpatentable over Tanaka in view of Wang and further in view of Mohan US 5548165.
Regarding Claims 2 and 17, Tanaka teaches (Figures 1and 8) wherein the capacitor voltage control unit (c2,Ga,Pll and Ml3) comprises a phase-locked loop (Pll), and the phase-locked loop are used to track at least part of AC harmonic components of the input voltage (Vsm) of the power conversion module (fig. 1), and obtaining the first current reference value (Ia*) according to the at least part of the AC harmonic components, the voltage of the second capacitor (Va) and the voltage reference value of the second capacitor (Va*). (For Example: Col 5-6 and 12)
Tanaka does not teach a first filter.
Mohan teaches (Figures 1-3) a first filter (102). (For Example: Col. 5)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Tanak to include a first filter, as taught by Mohan to draw a current substantially in phase with the voltage across it in order to provide damping.
Regarding Claims 3 and 18, Tanaka teaches (Figures 1and 8), wherein the capacitor voltage control unit (C2,Ga, Pll and Ml3) further comprises a first subtracter (c2), a first regulator (Ga), and a first multiplier (ml3), and the first subtractor performs a subtraction operation on the voltage of the second capacitor and the voltage reference value of the second capacitor (at c2) to output a first error signal which is regulated by the first regulator (Ga) and multiplied (at Ml3) by a per-unit value of the at least part of AC harmonic components (with PLL) by the first multiplier to obtain the first current reference value (Ia*). (For Example: Col 5-6 and 12)
Regarding Claims 5 and 20, Tanaka teaches (Figures 1and 8)
a single-phase rectification circuit (cnv), and an input port of the single-phase rectification circuit is connected to a single-phase AC power source (sup); an input port of the power conversion module is connected to an output port of the single-phase rectification circuit (at P).
Tanaka does not teach a 12th harmonic component.
Mohan teaches (Figures 1-3) a 12th harmonic component (Col. 4 lines 5-30).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Tanaka to include a 12th harmonic component, as taught by Mohan to draw a current substantially in phase with the voltage across it in order to provide damping.
Regarding Claims 12 and 27, Tanaka teaches (Figures 1and 8) the system.
Tanaka does not teach wherein the damping circuit is equivalent to a resistor after being regulated by the capacitor voltage control unit, the damping current generation unit, and the inductor current control unit.
Mohan teaches (Figures 1-3) wherein the damping circuit (with 24) is equivalent to a resistor (Col. 6 lines 15-40) after being regulated by the capacitor voltage control unit (at 112), the damping current generation unit (at 51), and the inductor current control unit (at 92 and 121). (For Example: Col. 5)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Tanaka to include wherein the damping circuit is equivalent to a resistor after being regulated by the capacitor voltage control unit, the damping current generation unit, and the inductor current control unit. as taught by Mohan to draw a current substantially in phase with the voltage across it in order to provide damping.
Claim(s) 4 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Tanaka in view of Wang and Mohan and further in view of Rozman US2020/0044558.
Regarding Claims 4 and 19, Tanaka teaches (Figures 1and 8) the apparatus.
Tanaka does not teach wherein the power conversion system further comprises a three-phase rectification circuit, and an input port of the power conversion module is connected to an output port of the three-phase rectification circuit; an input port of the three-phase rectification circuit is connected to a three-phase AC power source, and the at least part of AC harmonic components tracked by the phase-locked loop comprise a 6th harmonic component, and/or 12th harmonic component, and/or 18th harmonic component of the output voltage of the three-phase rectification circuit.
Mohan teaches (Figures 1-4) wherein the power conversion system (100) further comprises a three-phase rectification circuit (110), and an input port of the power conversion module (120) is connected to an output port of the three-phase rectification circuit (110); an input port of the three-phase rectification circuit is connected to a three-phase AC power source (101), and the at least part of AC harmonic components tracked by the phase-locked loop (see fig. 4, PLL) comprise a 6th harmonic component, and/or 12th harmonic component, and/or 18th harmonic component of the output voltage of the three-phase rectification circuit (par. 48).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Tanaka to include wherein the power conversion system further comprises a three-phase rectification circuit, and an input port of the power conversion module is connected to an output port of the three-phase rectification circuit; an input port of the three-phase rectification circuit is connected to a three-phase AC power source, and the at least part of AC harmonic components tracked by the phase-locked loop comprise a 6th harmonic component, and/or 12th harmonic component, and/or 18th harmonic component of the output voltage of the three-phase rectification circuit, as taught by Rozman to achieve low harmonic distortion with moderate switching frequency and reduced EMI emissions.
Claim(s) 9 and 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tanaka and Wang and further in view of Chapman US 20120087159.
Regarding Claims 9 and 24, Tanaka teaches (Figures 1and 8) wherein the inductor current control unit (Ad2, c1, Gf and PWMC) comprises a second subtractor (c1), a second regulator (Gf), and; the second subtractor (c1) performs a subtraction operation on the current flowing through the first inductor and the current reference value of the first inductor (inputs to c1) to output a second error signal (from c1) and the second error signal is regulated by the second regulator (Gf). (For Example: Col 5-6 and 12)
Tanaka does not teach a first adder; and added to a duty cycle feedforward value by the first adder to obtain the driving signal.
Chapman teaches (Figure 10b) a first adder (at 236); and added to a duty cycle feedforward value (from 337) by the first adder to obtain the driving signal (d). (For Example: Par. 86 and 98)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Tanaka to include a first adder; and added to a duty cycle feedforward value by the first adder to obtain the driving signal, as taught by Chapman for ripple attenuation and to adaptively alter the calculation to improve the effectiveness.
Allowable Subject Matter
Claims 6-8, 13, 15, 21-23, 28 and 30 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Reasons for Indicating Allowable Subject Matter
The following is an examiner’s statement of reasons for indicating Allowable Subject Matter:
Claims 6 and 21; prior art of record fails to disclose either by itself or in combination: “…wherein: the damping current generation unit comprises a second filter and a second multiplier; the second filter performs high pass filtering on the input voltage of the power conversion module to obtain a first voltage value, and the second multiplier performs a multiplication operation on the first voltage value and a first admittance parameter to obtain the second current reference value; or the damping current generation unit comprises a second filter and a first divider; the second filter performs high pass filtering on the input voltage of the power conversion module to obtain a first voltage value, and the first divider performs a division operation on the first voltage value and a first resistance parameter to obtain the second current reference value.”
Claims 13 and 28; prior art of record fails to disclose either by itself or in combination: “…wherein the power conversion system further comprises an AC power source, an input inductor, a rectification circuit, and a bus capacitor, and the input inductor is connected between the AC power source and the input port of the rectification circuit; the bus capacitor and the power conversion module are sequentially connected in parallel to the output port of the rectification circuit, and the step of obtaining a second current reference value according to the input voltage of the power conversion module and the current signal related to the input current of the power conversion module comprises: obtaining a ripple component of the input voltage of the power conversion module; obtaining a resistance parameter based on the input voltage of the power conversion module and the current signal related to the input current of the power conversion module; obtaining the second current reference value based on a first coefficient, the resistance parameter and the ripple component of the input voltage, wherein the first coefficient is adaptively adjusted according to the input inductance.”
These features taken alone or in combination are neither disclosed nor suggested by the prior art of record.
Response to Arguments
Applicant’s arguments with respect to the claim(s)have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GUSTAVO A ROSARIO-BENITEZ whose telephone number is (571)270-7888. The examiner can normally be reached M-F 9AM-5PM.
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/GUSTAVO A ROSARIO-BENITEZ/Primary Examiner, Art Unit 2838
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