DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-10 and 12-19 are rejected under 35 U.S.C. 102(a)(1) and 35 U.S.C. 102(a)(2) as being anticipated by U.S. Patent Pub. 2016/0224146 (“Malevsky”).
Claim 1
Malevsky discloses an integrated circuit comprising: a current source, arranged to provide a reference current (paragraph [0029], MP1- MP3); a diode device (diode device 201); a switch circuit, coupled between the current source and the diode device (switch 202), wherein the switch circuit is arranged to enable the diode device to provide a first diode with a first size for receiving the reference current during a first interval (paragraph [0028], D1), and is further arranged to enable the diode device to provide a second diode with a second size for receiving the reference current during a second interval, wherein the first size is different from the second size (paragraph [0028], D2), and each of the first diode and the second diode is biased by the same current source (paragraph [0028]); an analog-to-digital converter (ADC 103), arranged to convert a first voltage across the first diode into a first diode voltage value, and convert a second voltage across the second diode into a second diode voltage value (paragraph [0025]); and a processing circuit, arranged to perform an arithmetic operation upon the first diode voltage value and the second diode voltage value to generate a digital bandgap value (paragraph [0024]).
Claim 2
Malevsky discloses the integrated circuit of claim 1, wherein the arithmetic operation performed by the processing circuit comprises: calculating a diode voltage difference value between the first diode voltage value and the second diode voltage value; and calculating the digital bandgap value according to the diode voltage difference value and a diode voltage value, wherein the diode voltage value is selected from the first diode voltage value and the second diode voltage value (paragraph [0024]).
Claim 3
Malevsky discloses the integrated circuit of claim 2, wherein the digital bandgap value is set by a sum of the diode voltage value and a product of a constant and the diode voltage difference value (paragraph [0031]).
Claim 4
Malevsky discloses the integrated circuit of claim 2, wherein the processing circuit is further arranged to perform another arithmetic operation upon the diode voltage difference value and the digital bandgap value to generate a temperature value (paragraph [0037]).
Claim 5
Malevsky discloses the integrated circuit of claim 4, wherein the temperature value is set by using the digital bandgap value as a denominator to divide the diode voltage difference value (paragraph [0049]).
Claim 6
Malevsky discloses the integrated circuit of claim 1, wherein the diode device comprises: a first diode component; and a second diode component; wherein during the first interval, the switch circuit connects the first diode component to the current source, and disconnects the second diode component from the current source; and during the second interval, the switch circuit disconnects the first diode component from the current source, and connects the second diode component to the current source (Fig. 2, paragraphs [0026-0028]).
Claim 7
Malevsky discloses the integrated circuit of claim 1, wherein the diode device comprises: a first diode component; and a second diode component; wherein during the first interval, the switch circuit connects the first diode component to the current source, and disconnects the second diode component from the current source; and during the second interval, the switch circuit connects the first diode component to the current source, and connects the second diode component to the current source (Fig. 2, paragraphs [0026-0028]).
Claim 8
Malevsky discloses a signal processing method comprising: during a first interval, enabling a diode device to provide a first diode with a first size for receiving a reference current from a current source (paragraph [0028], D1), and performing analog-to-digital conversion upon a first voltage across the first diode to generate a first diode voltage value (ADC 103); during a second interval, enabling the diode device to provide a second diode with a second size for receiving the reference current from the current source (paragraph [0028], D2), and performing analog-to-digital conversion upon a second voltage across the second diode to generate a second diode voltage value (ADC 103), wherein the first size is different from the second size, and each of the first diode and the second diode is biased by the same current source (paragraph [0028]); and performing an arithmetic operation upon the first diode voltage value and the second diode voltage value to generate a digital bandgap value (paragraph [0024]).
Claim 9
Malevsky discloses the signal processing method of claim 8, wherein the arithmetic operation comprises: calculating a diode voltage difference value between the first diode voltage value and the second diode voltage value; and calculating the digital bandgap value according to the diode voltage difference value and a diode voltage value, wherein the diode voltage value is selected from the first diode voltage value and the second diode voltage value (paragraph [0024]).
Claim 10
Malevsky discloses the signal processing method of claim 9, wherein the digital bandgap value is set by a sum of the diode voltage value and a product of a constant and the diode voltage difference value (paragraph [0031]).
Claim 12
Malevsky discloses the signal processing method of claim 9, further comprising: performing another arithmetic operation upon the diode voltage difference value and the digital bandgap value to generate a temperature value (paragraph [0037]).
Claim 13
Malevsky discloses the signal processing method of claim 12, wherein the temperature value is set by using the digital bandgap value as a denominator to divide the diode voltage difference value (paragraph [0049]).
Claim 14
Malevsky discloses the signal processing method of claim 8, wherein enabling the diode device to provide the first diode with the first size for receiving the reference current from the current source comprises: connecting a first diode component of the diode device to the current source; and disconnecting a second diode component of the diode device from the current source; and enabling the diode device to provide the second diode with the second size for receiving the reference current from the current source comprises: disconnecting the first diode component from the current source; and connecting the second diode component to the current source (Fig. 2, paragraphs [0026-0028]).
Claim 15
Malevsky discloses the signal processing method of claim 8, wherein enabling the diode device to provide the first diode with the first size for receiving the reference current from the current source comprises: connecting a first diode component of the diode device to the current source; and disconnecting a second diode component of the diode device from the current source; and enabling the diode device to provide the second diode with the second size for receiving the reference current from the current source comprises: connecting the first diode component to the current source; and connecting the second diode component to the current source (Fig. 2, paragraphs [0026-0028]).
Claim 16
Malevsky discloses an integrated circuit comprising: a current source, arranged to provide a reference current (paragraph [0029], MP1- MP3); a diode device (diode device 201); a switch circuit, coupled between the current source and the diode device (switch 202), wherein the switch circuit is arranged to enable the diode device to provide a first diode with a first size for receiving the reference current during a first interval (paragraph [0028], D1), and is further arranged to enable the diode device to provide a second diode with a second size for receiving the reference current during a second interval, wherein the first size is different from the second size (paragraph [0028], D2), and each of the first diode and the second diode is biased by the same current source (paragraph [0028]); an analog-to-digital converter (ADC) (ADC 103), arranged to convert a first voltage across the first diode into a first diode voltage value, and convert a second voltage across the second diode into a second diode voltage value (paragraph [0025]); and a processing circuit, arranged to perform an arithmetic operation upon the first diode voltage value and the second diode voltage value to generate a temperature value (paragraph [0024]).
Claim 17
Malevsky discloses the integrated circuit of claim 16, wherein the arithmetic operation performed by the processing circuit comprises: calculating a diode voltage difference value between the first diode voltage value and the second diode voltage value, where calculation of the temperature value is based at least partly on the diode voltage difference value (paragraph [0024]).
Claim 18
Malevsky discloses the integrated circuit of claim 16, wherein the diode device comprises: a first diode component; and a second diode component; wherein during the first interval, the switch circuit connects the first diode component to the current source, and disconnects the second diode component from the current source; and during the second interval, the switch circuit disconnects the first diode component from the current source, and connects the second diode component to the current source (Fig. 2, paragraphs [0026-0028]).
Claim 19
Malevsky discloses the integrated circuit of claim 16, wherein the diode device comprises: a first diode component; and a second diode component; wherein during the first interval, the switch circuit connects the first diode component to the current source, and disconnects the second diode component from the current source; and during the second interval, the switch circuit connects the first diode component to the current source, and connects the second diode component to the current source (Fig. 2, paragraphs [0026-0028]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Pub. 2016/0224146 (“Malevsky”) in view of U.S. Patent Pub. 2018/0086629 (“Manos”).
Claim 11
Malevsky discloses the signal processing method of claim 10.
Malevsky does not appear to explicitly disclose further comprising: determining the constant during a wafer chip probing (CP) process.
Manos discloses an IC chip with wafer probing (paragraph [0019]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have incorporated wafer chip probing, as disclosed by Manos, into the method of Malevsky, such as to provide determining the constant during a wafer chip probing (CP) process, for the purpose of providing wafer level test probing and connection for other sensing circuits (Manos, paragraph [0024]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERICA S Y LIN whose telephone number is (571)270-7911. The examiner can normally be reached M-F 8-4, TW M,W.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Douglas X Rodriguez can be reached at (571) 431-0716. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERICA S LIN/Primary Examiner, Art Unit 2853
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