Prosecution Insights
Last updated: April 19, 2026
Application No. 18/619,356

FLEXIBLE CIRCUIT BOARD

Non-Final OA §103
Filed
Mar 28, 2024
Examiner
LEE, PETE T
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Chipbond Technology Corporation
OA Round
1 (Non-Final)
75%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
85%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allow Rate
578 granted / 773 resolved
+6.8% vs TC avg
Moderate +10% lift
Without
With
+10.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
33 currently pending
Career history
806
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
56.8%
+16.8% vs TC avg
§102
26.0%
-14.0% vs TC avg
§112
12.2%
-27.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 773 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Election/Restrictions Applicant's election with traverse of claims 1-2, and 7-8 in the reply filed on 01/06/2026 is acknowledged. The traversal is on the ground(s) that there is no explanation. This is not found persuasive because the species involve different features which have components that are mutually exclusive from one another which result in a different field of search. Different search terms will be used which will result in a serious burden on examination. The requirement is still deemed proper and is therefore made FINAL. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim (s) 1-2 and 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Otsubo (WO 2015/033736) in view of Ogura (CN 107211529A) and in view of Happoya et al. (US2016/0143150 A1) hereinafter Happoya. Regarding claim 1, Otsubo discloses a flexible circuit board ( Fig.1) comprising: a flexible substrate (21F) including a first part (110;Fig.2) and a second part (120 and 130;Fig.2) which are connected to each other and a plurality of circuit lines (26) arranged on a surface of the flexible substrate (21F); an insulating layer (21B) configured to cover the surface and the plurality of circuit lines (26); and a plurality of shaping strips (28) arranged on the insulating layer located on the second part along the first direction (top down direction in Fig.2), a space exists between the adjacent shaping strips (see space between 28) and exposes the insulating layer (21B), wherein the plurality of shaping strips are extended in a second direction which intersects the first direction (see 27 extend in left right direction in Fig.2). Otsubo fails to specifically discloses a first width of the first part is less than a second width of the second part in a first direction and the insulating layer is a solder resist layer. Ogura discloses a first width (see right thin part of substrate 60; Fig.14b) of the first part is less than a second width of the second part (left thick part of 60 in Fig.14b) in a first direction (top-down direction of Fig.14b). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Ogura to modify the dimensions of Otsubo in order to allow the flexible printed circuit board to have a smaller footprint to be accommodated in various electrical devices. Happoya discloses a solder resist layer (34:Fig.3). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Happoya to modify the insulating layer of Otsubo in order to provide electrical insulation between circuitry on a printed circuit board. Regarding claim 2 Otsubo discloses wherein the second part includes a first protruding section (see first 36), a second protruding section (see second 36) and a connecting section (37) which is located between the first and second protruding sections and connected to the first part (see 37 connected between 36 and connected to part 110). Regarding claim 7 Otsubo discloses the claimed invention except for wherein the first width is less than 2/3 of the second width. It would have been obvious to one of ordinary skill in the art at the time the invention was made to use wherein the first width is less than 2/3 of the second width in order to allow the flexible printed circuit board to have a smaller footprint to be accommodated in various electrical devices, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ233. Allowable Subject Matter Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner's statement of reasons for allowance: Regarding claim 8, The prior art of record neither anticipates norrenders obvious the claimed subject matter of the instant application as a whole eithertaken alone or in combination, in particular, prior art of record does not teach" wherein the plurality of shaping strips are made of a solder resist material " in combination with the remaining limitations of the claim 1. Therefore, prior art of record neither anticipates nor renders obvious the instantapplication claimed invention as a whole either taken alone or in combination. Any comments considered necessary by applicant must be submitted no laterthan the payment of the issue fee and, to avoid processing delays, should preferablyaccompany the issue fee. Such submissions should be clearly labeled "Comments onStatement of Reasons for Allowance." Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETE LEE whose telephone number is (571) 270-5921. The examiner can normally be reached on Monday-Friday (2nd & 4th Friday Off). If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Timothy Dole can be reached at (571) 272-2229 The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /PETE T LEE/Primary Examiner, Art Unit 2848
Read full office action

Prosecution Timeline

Mar 28, 2024
Application Filed
Feb 07, 2026
Non-Final Rejection — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
75%
Grant Probability
85%
With Interview (+10.5%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 773 resolved cases by this examiner. Grant probability derived from career allow rate.

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