DETAILED ACTION
Claim Objections
Claim 21 is objected to because of the following informalities: In claim 21, line 3, change “(GPU” to “(GPU)”. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 21-40 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim (US 9,311,157).
Referring to claims 21, 28 and 34, Kim discloses an apparatus (fig. 1, configuration) comprising:
a multi-tile architecture (fig. 1, CPU 110/GPU 120/Memory 130) for graphics operations (4:18-20, graphics operations) including a graphics processing unit GPU (fig. 1, GPU 120), the GPU including:
a plurality of processing core tiles (fig. 1, CPU 110) installed on a dice (fig. 1, configuration), and
a plurality of fixed function units (fig. 1, PE 125) to perform certain processing functions (fig. 2, ALU;1:50-56);
wherein the apparatus is to:
receive an application (fig. 5A, task block) for performance by the GPU;
analyze processing requirements (fig. 6, examine dependency S630) for the application;
determine a preferred assignment (fig. 6, determine tasks block arrangement S640 with information S630/S620/S610) of the plurality of fixed function units to the plurality of processing core tiles based on the processing requirements for the application; and
provide a dynamic exclusive assignment (fig. 13, dynamic resource allocation S1330) of the fixed function units to one of the processing core tiles according to the determined preferred assignment (fig. 13, CPU/GPU S1340/S1350).
As to claims 22, 29 and 35, Kim discloses the apparatus of claim 21, wherein determining the preferred assignment of the plurality of fixed function units to the plurality of processing core tiles includes optimizing power and performance characteristics (6:58-62, system performance) for processing of the application.
As to claims 23, 30 and 36, Kim discloses the apparatus of claim 21, wherein a first fixed function unit includes a performance characteristic that differ from a performance characteristic of a second fixed function unit (fig. 10, PE characteristics during execution 1030A/1030B).
As to claims 24, 31 and 37, Kim discloses the apparatus of claim 23, wherein the performance characteristic includes performance speed (fig. 10, PE time start & time count 1030A).
As to claims 25, 32 and 38, Kim discloses the apparatus of claim 21, wherein the apparatus is to modify the dynamic assignment of the fixed function units to the processing core tiles in response to a change in processing requirements (fig. 10, slope 1030A vs. 1030B).
As to claims 26 and 39, Kim discloses the apparatus of claim 21, wherein the GPU includes a structure to interconnect (fig. 2, busses) the plurality of processing core tiles with the plurality of fixed function units.
As to claims 27, 33 and 40, Kim discloses the apparatus of claim 21, wherein the application includes a shader program (4:18-20, graphics operations).
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to examiner Cheng-Yuan Tseng whose telephone number is (571)272-9772, and fax number is (571)273-9772. The examiner can normally be reached on Monday through Friday from 09:00 to 17:30 Eastern Time. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alicia Harrington can be reached on (571)272-2330. The fax phone number for the organization where this application or proceeding is assigned is (571)273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at (866)217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call (800)786-9199 (IN USA OR CANADA) or (571)272-1000.
/CHENG YUAN TSENG/Primary Examiner, Art Unit 2615