Prosecution Insights
Last updated: October 02, 2026
Application No. 18/620,866

TECHNOLOGIES FOR PROGRAMMABLE MICRORING RESONATORS

Non-Final OA §103
Filed
Mar 28, 2024
Examiner
KIANNI, KAVEH C
Art Unit
2874
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
1096 granted / 1257 resolved
+19.2% vs TC avg
Moderate +11% lift
Without
With
+11.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
35 currently pending
Career history
1279
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
61.9%
+21.9% vs TC avg
§102
11.0%
-29.0% vs TC avg
§112
25.5%
-14.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1257 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Detailed Action. Applicant’s election with traverse of Group I and species A (claims 1-9 and 12) in response/amendment submitted on 5/26/26 is acknowledged. The traversal is on the ground(s) that each of the group I, II and II inventions share in part some similarities to each other that would not create serious burden for the examiner to search the inventions and that there is no species involved between the inventions because there is no mutual exclusive characteristics between the embodiments/species and therefore the search for the entire applicant can be made without serious burden. This is not found persuasive because each of the group species as was specified in the previous office action contains limitations that are not found in other group inventions species that define mutually exclusive characteristics and would require a different search strings and/or search in different class/subclasses. The requirement is still deemed proper and is therefore made FINAL. Information Disclosure Statement The prior art documents submitted by Applicant(s) in the information Disclosure Statement(s) have all been considered and made of record (note the attached copy of form(s) PTO-1449). Allowable Subject Matter Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim 1-7, 9 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over “Roelofs” et. al. US 20210288658 A1(having international publication WO 2021188455 A1). Regarding claims 1, Roelofs teaches an apparatus (see figs. 1-) comprising: a photonic integrated circuit (PIC) die (shown in at least figs. 4-5; par. 0046) comprising: a waveguide (see figs. 1-5; parag. 0021-0024); a microresonator coupled to the waveguide (see figs. 1-5; parag. 0022-0024); a first semiconductor junction that at least partially overlaps with the microresonator (multiple junctions between the n-doped and p-doped regions; see at least figs.4-5 and parag. 0038; wherein each junction is around the middle portion and overlapping the microresonator which is formed over a substrate); and a second semiconductor junction that at least partially overlaps with the microresonator (see a second/multiple junctions between the n-doped and p-doped regions; see at least figs.4-5 and parag. 0038; wherein each junction is around the middle portion and overlapping the microresonator which is formed over a substrate). However, Roelofs does not explicitly references “photonics” in conjunction to above PIC. Nonetheless, it would have been obvious to an ordinary artisan skilled in the art before effective date of the invention was made that integrated circuits integrated with optical circuitry formed on a substrate is/known as PIC, as such photonic integrated circuitry provides useful digital-to-analog converter system and method of operation (see summary). The statements advanced in rejection of claim 1, above, as to the applicability and disclosure Roelofs and the motivation of are incorporated herein in rejection of the following claims as follows: 2. (Original) The apparatus of claim 1, further comprising control circuitry to: control a voltage across the first semiconductor junction to control a resonance frequency of the microresonator; and control a voltage across the second semiconductor junction to control a quality factor of the microresonator (see at least parag. 0025-0026, 0030-0035, 0051-0052…). With regard to claim 3, such functional limitation, though explicitly silent on ‘control circuitry to reverse bias the first semiconductor junction; and forward bias the second semiconductor junction’ as a method of mere manipulating the controller/processor to perform a task that having features mentioned in the claimed invention the controller/processor is capable of performing the same noting that the controller is performing biasing function mentioned by Roelofs in page 9, one of ordinary skilled in art can seek the controller to perform reverse biasing the first and second semiconductor junctions; Since are all from the same field of endeavor, the structure and teachings of would have been recognized as being in the pertinent art and it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. . 4. (Original) The apparatus of claim 1, further comprising control circuitry to: determine a desired coupling regime between the waveguide and the microresonator; and control a voltage across the second semiconductor junction at least partially based on the desired coupling regime (see at least parag. 0022-0024, 0042, 0046, 0047, 0052). With regard to claims 5-6, ‘control circuitry to: determine a desired chirp on light in the waveguide; and control a voltage across the second semiconductor junction at least partially based on the desired chirp on light in the waveguide’; and ‘control circuitry to: determine a desired tradeoff between optical bandwidth of the microresonator and a modulation speed of the microresonator; and control a voltage across the second semiconductor junction at least partially based on the desired tradeoff between optical bandwidth of the microresonator and a modulation speed of the microresonator’ such functional limitations, as method/steps of mere manipulating the controller/processor to perform a task that with features mentioned above the controller can is capable performing the same noting that the controller/processor is performing various circuitry functions such as bandwidths/wavelength bands (see at least parag. 0024) and one of ordinary skilled in art can seek the controller to perform such step of desire chirp and/or a desired tradeoff between optical bandwidth of the microresonators; since are all from the same field of endeavor, the structure and teachings of would have been recognized as being in the pertinent art and it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. . 7. (Original) The apparatus of claim 1, wherein the PIC die further comprises: a second waveguide; a second microresonator coupled to the second waveguide; a third semiconductor junction that at least partially overlaps with the second microresonator; a fourth semiconductor junction that at least partially overlaps with the second microresonator; and control circuitry to: control a voltage across the second semiconductor junction and a voltage across the fourth semiconductor junction to match a first coupling regime between the waveguide and the microresonator and a second coupling regime between the second waveguide and the second microresonator (shown in figs. 2-8). 9. (Original) The apparatus of claim 1, wherein the waveguide comprises silicon and nitrogen (see parag. 0062), wherein the microresonator comprises gallium and arsenic (see at least parag. 0059). 12. (Original) The apparatus of claim 1, further comprising an integrated circuit package, wherein the integrated circuit package comprises the PIC die, a substrate, and an electronic integrated circuit (EIC) die (see figs. 1-8; para. 0038). Citation of Relevant Prior Art Prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. In accordance with MPEP 707.05 the following references are pertinent in rejection of this application since they provide substantially the same information disclosure as this patent does. These references are: US 20090208209 A1 US 20140110572 A1 US 20150323450 A1 US 20210288658 A1 WO 2021188455 A1 WO 2024044521 A1 Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to KAVEH C KIANNI whose telephone number is (571)272-2417. The examiner can normally be reached on 9-19. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas Hollweg can be reached on571-270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KAVEH C KIANNI/Primary Examiner, Art Unit 2874
Read full office action

Prosecution Timeline

Mar 28, 2024
Application Filed
Aug 11, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12748265
Boot Release/Lock Simplex And Duplex Optical Connectors
3y 5m to grant Granted Sep 29, 2026
Patent 12742235
OPTICAL INTEGRATED DEVICE AND MANUFACTURING METHOD OF THE SAME
3y 11m to grant Granted Sep 22, 2026
Patent 12742936
LIGHT GUIDE COLUMN, AND METHOD AND APPARATUS FOR ADJUSTING SIDEWALL STRUCTURE OF CYLINDRICAL LIGHT GUIDE COLUMN
3y 0m to grant Granted Sep 22, 2026
Patent 12742923
LIGHT SOURCE MODULE AND REFLECTIVE DISPLAY DEVICE
2y 9m to grant Granted Sep 22, 2026
Patent 12736753
CIRCUIT BOARD HAVING AN OPTICAL FIBER
2y 10m to grant Granted Sep 15, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
98%
With Interview (+11.0%)
2y 4m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1257 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month