DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement filed on 03/29/2024 has been considered and
placed in the application file.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 and 4-5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Maxim et al. (U.S. 2023/0387861).
Regarding claim 1, Maxim et al. (hereinafter, Ref~861) discloses (please see Fig. 3 and related text for details) a Doherty amplifier circuit (10 of Fig. 3) comprising:
a first integrated circuit (CMOS Die of Fig. 3); and
a second integrated circuit (GaAs Die of Fig. 3) connected to the first integrated circuit, wherein the first integrated circuit comprises:
a carrier amplifier (22 of Fig. 3) configured to amplify a radio-frequency signal (RFIN of Fig. 3),
a peak amplifier (26 of Fig. 3) configured to amplify the radio-frequency signal, and
a variable gain control circuit (e.g., 64 and/or 68 of Fig. 3 at least) configured to control a gain of the radio-frequency signal based on a drive level signal (control signal from 36 of Fig. 3) that indicates a drive level (Sat Det of Fig. 3) of the carrier amplifier,
wherein a state of operation of the peak amplifier is controlled based on an output from the variable gain control circuit as described throughout the disclosure (see paragraph [0029-0047]), and
wherein the first integrated circuit is on a silicon die (a typical CMOS die would be made from Silicon), meeting claim 1.
Regarding claim 2, Ref~861 discloses the Doherty amplifier circuit according to Claim 1, further comprising: a bias circuit (65 of Fig. 3) configured to input a bias to the peak amplifier based on the output from the variable gain control circuit from the teaching that “the bias and the variable gain of the peaking driver input driver input stage 26 is controlled by the activation signal generated by the saturation detector 34” as described in paragraph [0061], meeting claim 2.
Regarding claim 4, Ref~861 discloses the Doherty amplifier circuit according to Claim 1, wherein the carrier amplifier comprises:
a driver stage carrier amplifier (22 of Fig. 3), and
a power stage carrier amplifier (16 of Fig. 3) configured to accept an output from the driver stage carrier amplifier as an input,
wherein the peak amplifier comprises:
a driver stage peak amplifier (26 of Fig. 3), and a power stage peak amplifier (18 of Fig. 3) configured to accept an output from the driver stage peak amplifier as an input, and
wherein the first integrated circuit on the silicon die further comprises: a distribution circuit (28 of Fig. 3) configured to input the radio-frequency signal to the carrier amplifier and to the peak amplifier as signals having different phases from each other, the driver stage carrier amplifier, and the driver stage peak amplifier, meeting claim 4.
Regarding claim 5, Ref~861 discloses the Doherty amplifier circuit according to Claim 2, wherein the carrier amplifier comprises:
a driver stage carrier amplifier (22 of Fig. 3), and
a power stage carrier amplifier (16 of Fig. 3) configured to accept an output from the driver stage carrier amplifier as an input,
wherein the peak amplifier comprises:
a driver stage peak amplifier (26 of Fig. 3), and a power stage peak amplifier (18 of Fig. 3) configured to accept an output from the driver stage peak amplifier as an input, and
wherein the first integrated circuit on the silicon die further comprises:
a distribution circuit (28 of Fig. 3) configured to input the radio-frequency signal (RFIn of Fig. 3) to the carrier amplifier and to the peak amplifier as signals having different phases (90 degrees) from each other, the driver stage carrier amplifier, and the driver stage peak amplifier, meeting claim 5.
Allowable Subject Matter
Claims 3 and 6-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HIEU P NGUYEN whose telephone number is 571-272-8577. The examiner can normally be reached on Monday-Friday 8:30AM-6:00PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, YOUNGHUIE HAN (Jessica) can be reached on 571-272-2078. The fax phone number for the organization where this application or proceeding is assigned is 703-872-9306.
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/HIEU P NGUYEN/Primary Examiner, Art Unit 2843