DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 11/14/2025 has been entered.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-4 & 7-10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Bhutta (US PGPub 20210090859), a reference of record.
As per claim 1:
Bhutta discloses in Figs. 1-11, & 14-15
An impedance-matching method applied to semiconductor processing equipment ([0187]) comprising:
a processing preparation step including obtaining currently stored impedance-matching data corresponding to a processing ignition step ([0095-0098] & [0330]), the impedance-matching data including a parameter adjustment position (EVC configurations [0098] & the parameter-related value for respective pulse level, [0179]) corresponding to a parameter adjustable device (EVC, [0176]) in an impedance-matching device (matching network 11) of the semiconductor processing equipment, and adjusting a parameter value (EVC capacitance, [0181]) of the parameter adjustable device based on the parameter adjustment position (operation 308/318), wherein for semiconductor processing that is performed multiple times, the currently stored impedance-matching data is a value that is updated multiple times ([0183]); and
the processing ignition step including applying radio frequency (RF) power (from RF source 15) to a processing chamber (plasma chamber 19) of the semiconductor processing equipment through the impedance-matching device, performing impedance matching through the impedance-matching device, and determining a current parameter adjustment position of the parameter adjustable device when impedance is matched, and updating the impedance-matching data based on the current parameter adjustment position ([0179-0181]).
While claim 1 does not state that the processing preparation state and the processing ignition state are run separately, or that the processing preparation step is not run during the processing ignition state, such an interpretation or amendment would still be met by Bhutta as process 300 includes separate steps (first and second level processes 301A & 301B) for separate pulse power levels, which may individually be interpreted as a processing preparation state or a processing ignition state, and both implement the same impedance matching procedures for adjusting the EVCs as disclosed by Bhutta, which meet the limitations as noted above.
As per claim 2:
Bhutta discloses in Figs. 1-11, & 14-15
an operation mode of the impedance-matching device includes an automatic matching mode (auto tuning mode [0118]) and a non-automatic matching mode (manual tuning mode, [0120]);
in the processing preparation step, the impedance-matching device is set to the non-automatic matching mode (process 600 discloses the impedance matching process as including the non-automatic matching mode (manual tuning mode in 606)); and
in the processing ignition step, the impedance-matching device is set to the automatic matching mode (auto tuning mode 601 is implemented as part of the matching process during the ignition step, [0113]).
As per claim 3:
Bhutta discloses in Figs. 1-11, & 14-15:
the parameter adjustment position includes a first parameter-adjustment position, a parameter correction value, and a second parameter-adjustment position (Fig. 14 discloses the process as a repeating cycle, such that a first parameter-adjustment position is the previous parameter adjustment position in the process (the EVC value), the second parameter-adjustment position is the subsequent parameter-adjustment position to which the EVC is altered in 308, and the parameter correction value is the difference between the two, [0179]);
the second parameter-adjustment position is a sum of the first parameter-adjustment position and the parameter correction value (as an inherent result of the parameter correction value being the difference between the parameter adjustment positions); and
adjusting the parameter value of the parameter-adjustable device based on the parameter adjustment positions includes: adjusting the parameter value of the parameter adjustable device based on the second parameter adjustment position (as an inherent result of the parameter correction value being the difference between the parameter adjustment positions).
As per claim 4:
Bhutta discloses in Figs. 1-11, & 14-15:
updating the impedance-matching data based on the current parameter adjustment position includes:
updating the first parameter adjustment position based on the current parameter adjustment position; and
updating the second parameter adjustment position based on the updated first parameter adjustment position and the parameter correction value (as the process of Fig. 14 is a repeating process, each iteration may update the first parameter adjustment position to be that of the second parameter adjustment position of the previous iteration, as the first parameter adjustment position is the current EVC configuration, and the second parameter adjustment position is the new EVC configuration provided in step 308, which is different from the first parameter adjustment position by the parameter correction value).
As per claim 7:
Bhutta discloses in Figs. 1-11, & 14-15:
the parameter adjustable device includes an adjustable capacitor and/or an adjustable inductor (electronic variable capacitor EVC, [0056]).
As per claim 8:
Bhutta discloses in Figs. 1-11, & 14-15:
Semiconductor processing equipment comprising a radio frequency (RF) power source (RF source 15), an impedance matching device (matching network 11), and a processing chamber (plasma chamber 19), wherein:
the RF power source is configured to apply RF power to the processing chamber of the semiconductor processing equipment through the impedance matching device ([0048]); and
the impedance-matching device includes:
a parameter adjustable device (capacitors 31/33, [0056]); and
a controller (control circuit 45 [0060]) configured to, in a processing preparation step, obtain currently stored impedance-matching data corresponding to a processing ignition step ([0095-0098] & [0330]), the impedance-matching data including a parameter adjustment position (EVC configurations [0098] & the parameter-related value for respective pulse level, [0179]) corresponding to the parameter adjustable device in the impedance-matching device of the semiconductor processing equipment, adjust a parameter value (EVC capacitance, [0181]) of the parameter adjustable device based on the parameter adjustment position (operation 308/318), wherein for semiconductor processing that is performed multiple times, the currently stored impedance-matching data is a value that is updated multiple times ([0183]), and in a processing ignition step, when applying the RF power to the processing chamber of the semiconductor processing equipment through the impedance-matching device, adjust the parameter-adjustable device to achieve impedance matching, determine a current parameter-adjustment position of the parameter adjustable device when impedance is matched, and update the impedance-matching data based on the current parameter adjustment position ([0179-0181]).
While claim 8 does not state that the processing preparation state and the processing ignition state are run separately, or that the processing preparation step is not run during the processing ignition state, such an interpretation or amendment would still be met by Bhutta as process 300 includes separate steps (first and second level processes 301A & 301B) for separate pulse power levels, which may individually be interpreted as a processing preparation state or a processing ignition state, and both implement the same impedance matching procedures for adjusting the EVCs as disclosed by Bhutta, which meet the limitations as noted above.
As per claim 9:
Bhutta discloses in Figs. 1-11, & 14-15
an operation mode of the impedance-matching device includes an automatic matching mode (auto tuning mode [0118]) and a non-automatic matching mode (manual tuning mode, [0120]);
and the controller is further configured to:
in the processing preparation step, set the impedance-matching device to the non- automatic matching mode (process 600 discloses the impedance matching process as including the non-automatic matching mode (manual tuning mode in 606)); and
in the processing ignition step, set the impedance-matching device to the automatic matching mode (auto tuning mode 601 is implemented as part of the matching process during the ignition step, [0113]).
As per claim 10:
Bhutta discloses in Figs. 1-11, & 14-15:
the parameter adjustment position includes a first parameter adjustment position, a parameter correction value, and a second parameter adjustment position (Fig. 14 discloses the process as a repeating cycle, such that a first parameter-adjustment position is the previous parameter adjustment position in the process (the EVC value), the second parameter-adjustment position is the subsequent parameter-adjustment position to which the EVC is altered in 308, and the parameter correction value is the difference between the two, [0179]); the second parameter adjustment position is a sum of the first parameter adjustment position and the parameter correction value (as an inherent result of the parameter correction value being the difference between the parameter adjustment positions); and the controller is further configured to adjust the parameter value of the parameter adjustable device based on the second parameter adjustment position (as an inherent result of the parameter correction value being the difference between the parameter adjustment positions).
Allowable Subject Matter
Claims 5, & 21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the limitations of claim 5 require the impedance matching process to satisfy a predetermined condition based on the impedance-matching time that is not disclosed in the prior art of Bhutta, nor is it rendered obvious. Bhutta discloses the use of EVCs to reduce the impedance-matching time to ~500 μsec or less, such that a condition for minimizing time is not part of the impedance matching process, thus rendering claim 5-6 as allowable subject matter.
As per claim 21, the examiner agrees with the applicant’s arguments that Bhutta, the closest relevant prior art, does not disclose the combination of limitations in claim 21.
Response to Arguments
Applicant's arguments filed 11/14/2025 with regards to claims 1-4 & 7-10 have been fully considered but they are not persuasive.
In the applicant’s remarks, the applicant states that the applicant “traverses” the rejections of anticipation by Bhutta, but does not provide arguments beyond those already addressed in the examiner’s response to argument in the final office action of 09/25/2025. As such, the applicant appears to concede to the examiner’s arguments.
As such, the rejection of claims 1-4 & 7-10 under Bhutta are sustained.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMUEL S OUTTEN whose telephone number is (571)270-7123. The examiner can normally be reached M-F: 9:30AM-6:00PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Lindgren Baltzell can be reached at (571) 272-1988. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Samuel S Outten/Primary Examiner, Art Unit 2843