Prosecution Insights
Last updated: October 02, 2026
Application No. 18/623,750

UNIT PIXEL HAVING LIGHT EMITTING DEVICE DISPLAYING APPARATUS

Final Rejection §102§103
Filed
Apr 01, 2024
Priority
May 22, 2020 — provisional 63/028,784 +2 more
Examiner
YEUNG LOPEZ, FEIFEI
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Seoul Viosys Co., Ltd.
OA Round
6 (Final)
81%
Grant Probability
Favorable
7-8
OA Rounds
0m
Est. Remaining
79%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
884 granted / 1088 resolved
+13.3% vs TC avg
Minimal -3% lift
Without
With
+-2.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
36 currently pending
Career history
1123
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
55.2%
+15.2% vs TC avg
§102
24.1%
-15.9% vs TC avg
§112
17.3%
-22.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1088 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 15-18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Takeya et al (PG Pub 2019/0229097 A1). Regarding claim 15, Takeya teaches (see claims 1 and 10 below) a display device comprising: a substrate (900, figs. 30A and 30B) including a first surface and a second surface opposite to the first surface; and light sources arranged on the substrate, each of the light sources including: light emitters including a first conductivity type semiconductor layer and a second conductivity type semiconductor layer; pads configured to electrically connect to the light emitters; a light blocking layer disposed on the substrate; and an adhesive layer disposed on the substrate and configured to cover a region of the light blocking layer, wherein the light emitters include a first light emitter configured to emit a first light of a first color, a second light emitter configured to emit a second light of a second color different from the first color, and a third light emitter configured to emit a third light of a third color different from the second color, wherein the pads include a first pad, a second pad, a third pad, and a fourth pad, wherein the first pad is electrically connected to the first conductivity type semiconductor layer of the first light emitter and the first conductivity type semiconductor layer of the third light emitter, wherein the second pad is electrically connected to the second conductivity type semiconductor layer of the third light emitter, wherein the third pad is electrically connected to the second conductivity type semiconductor layer of the second light emitter, wherein the light blocking layer includes a window region through which at least one of the first light, the second light, or the third light passes, and wherein the adhesive layer is disposed on a region of the window region. Regarding claim 16, Takeya teaches the display device of claim 15, wherein the first pad includes a region overlapped with the first light emitter and the second light emitter (fig. 30A). Regarding claim 17, Takeya teaches the display device of claim 15, wherein the adhesive layer includes a diffuser (paragraph [0422]). Regarding claim 18, Takeya teaches the display device of claim 15, further comprising a surface layer (55b, fig. 29B; device in fig. 29B forms one of the three LEDs 811/813/815 in fig. 30A) disposed between the substrate and at least one of the first light emitter, the second light emitter, or the third light emitter Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim(s) 1-7 and 10-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takeya et al (PG Pub 2019/0229097 A1) and Lee et al (PG Pub 2020/0279979 A1). Regarding claim 1, Takeya teaches a light module comprising: a substrate (900, figs. 30A and 30B) including a first surface and a second surface opposite to the first surface; and a light emitter arranged on the first surface of the substrate, each of the light emitters including: light emitting devices (811,813,815, figs. 29 and 30, paragraph [0425]) including a first conductivity type semiconductor layer (2110 or 2114)and a second conductivity type semiconductor layer (2114 or 2110); pads (921,923,925,930) configured to electrically connect to the light emitting devices; a light blocking layer (902) disposed on the substrate; and an adhesive layer (903) disposed on the substrate and configured to cover a region of the light blocking layer, wherein the light emitting devices include a first light emitting device having a first peak wavelength, a second light emitting device having second peak wavelength different (paragraph [0424]) from the first peak wavelength, and a third light emitting device having a third peak wavelength different (paragraph [0424]) from the second peak wavelength, wherein the pads include a first pad (930), a second pad (921), a third pad (923), and a fourth pad (925), wherein the first pad is electrically connected to the first conductivity type semiconductor layer of the first light emitting device (811, paragraph [0429]) and the first conductivity type semiconductor layer of the third light emitting device (815, paragraph [0429]), wherein the second pad is electrically connected to the second conductivity type semiconductor layer of the first light emitting device (paragraph [0429]), wherein the third pad is electrically connected to the second conductivity type semiconductor layer of the second light emitting device (813, paragraph [0429]), wherein the light blocking layer includes a window region (fig. 30B) through which light generated from at least one of the first light emitting device, the second light emitting device, or the third light emitting device passes (paragraph [0418]), and wherein the adhesive layer fills (fig. 30B) a region of the window region. Takeya does not teach in figs. 30A and 30B that there are plural light emitters arranged on the substrate, each of the light emitters including plural light emitting devices. Fig. 16 of Takeya teaches a plural slight emitters (four 110) arranged on the substrate (10, fig. 15, paragraph [0264]), each of the light emitters including: plural light emitting devices (three in each), for the benefit of forming large display with plurality of light emitting units 101 (paragraph [0292]). Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to arrange a plurality of light emitters on the substrate, each of the light emitters including plural light emitting devices, for the benefit of forming large display with plural light emitting units. Takeya does not teach a side surface of the first light emitting device overlaps, in a plan view, with a majority of a side surface of the second light emitting device, and a different side surface of the first light emitting device overlaps, in the plan view, with a majority of a side surface of the third light emitting device. In the same field of endeavor, Lee teaches a side surface of the first light emitting (222, fig. 7B) device overlaps, in a plan view, with a majority of a side surface of the second light emitting device (221), and a different side surface of the first light emitting device overlaps, in the plan view, with a majority of a side surface of the third light emitting device (223), for the benefit of producing pure white light and preventing angle-dependent color variation (paragraph [0177]). Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to make a side surface of the first light emitting device overlap, in a plan view, with a majority of a side surface of the second light emitting device, and a different side surface of the first light emitting device overlap, in the plan view, with a majority of a side surface of the third light emitting device, for the benefit of producing pure white light and preventing angle-dependent color variation. Regarding claim 2, Takeya teaches the light module of claim 1, wherein the first pad (930, fig. 30A) includes a region overlapped with the first light emitting device (811) and the second light emitting device (813, paragraph [0429]). Regarding claim 3, Takeya teaches the light module of claim 1, wherein the adhesive layer is formed of a light transmissive layer (paragraph [0418]). Regarding claim 4, Takeya teaches the light module of claim 3, wherein the adhesive layer includes a diffuser (paragraph [0423]). Regarding claim 5, Takeya teaches the light module of claim 1, further comprising a surface layer (55b, fig. 29B, paragraphs [0425][0399][0080][0090][0316]) disposed between the substrate and at least one of the first light emitting device, the second light emitting device, or the third light emitting device. Regarding claim 6, Takeya teaches the light module of claim 1, further comprising a layer (909, fig. 30A) covering a region of the pads. Takeya does not explicitly teach the layer is an insulation layer. It would have been obvious to the skilled in the art before the effective filing date of the invention to make layer 909 an insulating layer for the known benefit of avoiding shorting layers 930, 921, 923, and 925 and to provide proper bias to the light emitting devices to turn them on/off. Regarding claim 7, Takeya teaches the light module of claim 6, wherein the insulation layer is disposed between the first pad and the second pad (fig. 30A). Regarding claim 10, Takeya in view of Kim teaches (see claim 1) a light module comprising: a substrate including a first surface and a second surface opposite to the first surface; and light sources (see light emitters in claim 1) arranged on the first surface of the substrate, each of the light sources including: light emitters including a first conductivity type semiconductor layer and a second conductivity type semiconductor layer; pads configured to electrically connect to the light emitters; a light blocking layer disposed on the substrate; and an adhesive layer disposed on the substrate and configured to cover a region of the light blocking layer, wherein the light emitters include a first light emitter configured to emit a first light of a first color, a second light emitter configured to emit a second light of a second color different from the first color, and a third light emitter configured to emit a third light of a third color different from the second color, wherein the pads include a first pad (930), a second pad (925), a third pad (923), and a fourth pad (921), wherein the first pad is electrically connected to the first conductivity type semiconductor layer of the first light emitter and the first conductivity type semiconductor layer of the third light emitter, wherein the second pad is electrically connected to the second conductivity type semiconductor layer of the third light emitter, wherein the third pad is electrically connected to the second conductivity type semiconductor layer of the second light emitter, wherein the light blocking layer includes a window region through which at least one of the first light, the second light, or the third light passes, wherein the adhesive layer is disposed on the window region, and wherein the second surface of the substrate is substantially flat. Takeya does not teach a side surface of the first light emitting device overlaps, in a plan view, with a majority of a side surface of the second light emitting device, and a different side surface of the first light emitting device overlaps, in the plan view, with a majority of a side surface of the third light emitting device. In the same field of endeavor, Lee teaches a side surface of the first light emitting (222, fig. 7B) device overlaps, in a plan view, with a majority of a side surface of the second light emitting device (221), and a different side surface of the first light emitting device overlaps, in the plan view, with a majority of a side surface of the third light emitting device (223), for the benefit of producing pure white light and preventing angle-dependent color variation (paragraph [0177]). Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to make a side surface of the first light emitting device overlap, in a plan view, with a majority of a side surface of the second light emitting device, and a different side surface of the first light emitting device overlap, in the plan view, with a majority of a side surface of the third light emitting device, for the benefit of producing pure white light and preventing angle-dependent color variation. Regarding claim 11, Takeya teaches the light module of claim 10, wherein the first pad includes a region overlapped with the first light emitter and the second light emitter (fig. 30A). Regarding claim 12, Takeya teaches the light module of claim 10, wherein the adhesive layer includes a diffuser (paragraph [0422]). Response to Arguments Applicant's arguments filed July 23, 2026 have been fully considered but they are not persuasive. Applicant argues that (page 9, remarks) As illustrated in Fig. 30A of Takeya, the first to third light emitting devices are arranged in a triangular configuration. Takeya therefore does not disclose or suggest the claimed arrangement in which a side surface of the first light emitting device overlaps, in a plan view, with a majority of a side surface of the second light emitting device, and a different side surface of the first light emitting device overlaps, in the plan view, with a majority of a side surface of the third light emitting device. The Office Action relies on Lee to cure this deficiency. Lee, however, does not merely disclose an isolated "overlap" feature that can be freely imported into Takeya. Rather, Lee discloses a particular pixel architecture in which the distances between light emitting cells within the same pixel are smaller than the distances between light emitting cells of different pixels. Lee explains that this spacing relationship permits light emitted from openings in the same pixel to be mixed relatively easily, while preventing light emitted from different pixels from being mixed, thereby implementing high purity white light while preventing color variation based on viewing angle. Lee further explains that the distances between light emitting cells in the same pixel may vary depending on the types of light emitted from the cells. See Lee, Fig. 7B, paragraphs [0178]-[0186]. Thus, the arrangement relied upon by the Office Action is not disclosed by Lee as a general purpose geometric substitution, but as part of Lee's specific spacing scheme for controlling color mixing. The proposed modification would therefore require substantially redesigning Takeya's pixel layout. In particular, Takeya uses alignment markers to define the locations of the first to third light emitting devices within the pixel region. Incorporating Lee's arrangement would require changing those device locations and the corresponding alignment marker pattern, not merely substituting one known component for another. The Office Action does not identify any teaching in Takeya that its triangular arrangement produces the color mixing problem addressed by Lee, nor does it explain why a person of ordinary skill in the art would have abandoned Takeya's disclosed emitter layout and alignment marker arrangement to adopt Lee's different pixel architecture. Accordingly, the Office Action has not established that the claimed arrangement would have been obvious. Although Lee discloses the claimed side overlap relationship, the Office Action does not sufficiently explain why a person of ordinary skill in the art would have modified Takeya's pixel layout and corresponding alignment marker arrangement to incorporate Lee's particular emitter geometry. While obviousness does not require an express teaching to combine references, it does require an articulated reasoning with a rational underpinning for making the proposed modification. Here, the Office Action identifies the claimed geometry in Lee but does not adequately explain why one of ordinary skill in the art would have adopted that geometry in Takeya's pixel architecture. In response, there’s no requirement that the primary reference discloses the problem solved by the secondary reference to meet the prima facie of obviousness. Thus, Takeya does not need to disclose the problem to be solved by Lee to qualify as prior art under the obvious rejection. The Office Action suggests modifying Takeya in view of Lee not under the rationale of simply replacing one element for another, as argued by Applicant, but providing explicitly stated advantages for the modification: “for the benefit of producing pure white light and preventing angle-dependent color variation.” See rejection above. Applicant argues that modifying Takeya in view of Lee’s teaching would have required modification in Takeya’s device—change alignment marker arrangement. In response, it is impossible to modify without modification. The skilled in the art would have change the alignment marker arrangement according to the new sub-pixels’ positions to achieve the stated benefits in Lee. The MPEP states that “the reason or motivation to modify the reference may often suggest what the inventor has done, but for a different purpose or to solve a different problem. It is not necessary that the prior art suggest the combination to achieve the same advantage or result discovered by applicant.” See, e.g., In re Kahn, 441 F.3d 977, 987, 78 USPQ2d 1329, 1336 (Fed. Cir. 2006) (motivation question arises in the context of the general problem confronting the inventor rather than the specific problem solved by the invention); Cross Med. Prods., Inc. v. Medtronic Sofamor Danek, Inc., 424 F.3d 1293, 1323, 76 USPQ2d 1662, 1685 (Fed. Cir. 2005) ("One of ordinary skill in the art need not see the identical problem addressed in a prior art reference to be motivated to apply its teachings."); In re Lintner, 458 F.2d 1013, 173 USPQ 560 (CCPA 1972) (discussed below); In re Dillon, 919 F.2d 688, 16 USPQ2d 1897 (Fed. Cir. 1990). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to FEIFEI YEUNG LOPEZ whose telephone number is (571)270-1882. The examiner can normally be reached M-F: 8am to 4pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached on 571 270 7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FEIFEI YEUNG LOPEZ/Primary Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Show 7 earlier events
Nov 12, 2025
Response Filed
Jan 27, 2026
Final Rejection mailed — §102, §103
Mar 11, 2026
Response after Non-Final Action
Apr 23, 2026
Request for Continued Examination
Apr 28, 2026
Response after Non-Final Action
May 05, 2026
Non-Final Rejection mailed — §102, §103
Jul 23, 2026
Response Filed
Sep 16, 2026
Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12733299
DISPLAY DEVICE AND LIGHT EMITTING DIODE CHIP
3y 1m to grant Granted Sep 08, 2026
Patent 12713908
SEMICONDUCTOR DEVICE
2y 7m to grant Granted Aug 18, 2026
Patent 12707907
CONTROL AND LOCALIZATION OF POROSITY IN III-NITRIDES AND METHODS OF USING AND MAKING THEREOF
4y 0m to grant Granted Aug 11, 2026
Patent 12707679
SHIFTED-CHANNEL STACKED FETS
2y 7m to grant Granted Aug 11, 2026
Patent 12701852
DISPLAY DEVICE AND TILED DISPLAY DEVICE
3y 6m to grant Granted Aug 04, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

7-8
Expected OA Rounds
81%
Grant Probability
79%
With Interview (-2.7%)
2y 5m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 1088 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month