DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the optical coupler coupled to or at the end of the optical waveguide at a surface that is perpendicular to the substrate (as recited in claims 25 and 38) must be shown or the feature(s) canceled from the claim(s). No new matter may be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Interpretation
The term "footprint", which appears in independent claims 21 and 33 and in dependent claim 39 but is not in the original disclosure, is interpreted to mean a cross-sectional area of the EIC or PIC. Thus the footprint of an EIC being smaller than a footprint of a PIC is schematically shown for example in figs. 1A-1B and 4.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
Claims 22 and 33-41 are rejected under 35 U.S.C. 112(a) as failing to comply with the written description requirement. The claims contain subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, at the time the application was filed, had possession of the claimed invention. This is a new matter rejection (note MPEP 608.04).
Claims 22 and 34: There is no support in the original disclosure for the recitations of the PIC or EIC being on a die. The original disclosure barely mentions any die, let alone that a PIC or EIC is on it. [0052] and [0060] state that a PIC may include a silicon PIC die, not be on it, and there appears to be no mention of an EIC in the context of a die.
Claims 33 and 37: There is no support in the original disclosure for the recitations of the PIC comprising an optical modulator. No optical modulator is mentioned in the original disclosure. Claims 34-36 and 38-41 are rejected by dependence from claims 33 or 37.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 21, 23-26, and 29-32 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2012/0224804 A1.
Claim 21: '804 discloses an optoelectronic system, comprising (see mainly figs. 4A-4B):
a substrate 2;
a first photonic integrated circuit (PIC) 3 coupled with the substrate, the first PIC comprising optical transmitter circuitry ([0057]);
a second PIC (unlabeled in fig. 4B, but it is the left PIC above labeled mirror 8) coupled with the substrate, the second PIC comprising optical receiver circuitry ([0058]);
an optical waveguide (right instance labeled 5, or unlabeled left instance in fig. 4B) coupled with the first PIC or the second PIC;
an optical coupler 8 (or 9) at an end of the optical waveguide;
a first electronic integrated circuit (EIC) 14 coupled with the first PIC and comprising driver circuitry ([0065]) coupled with the optical transmitter circuitry of the first PIC, wherein a footprint of the first EIC is within a footprint of the first PIC (fig. 4B);
a conductive interconnect between the first EIC and the first PIC ("electrical line 16" in [0065]);
a second EIC (unlabeled in fig. 4B, but it is the left EIC near the left PIC) coupled with the second PIC, the second EIC coupled with the optical receiver circuitry of the second PIC, wherein a footprint of the second EIC is within a footprint of the second PIC (fig. 4B); and
a processor 1 coupled with the first EIC and the second EIC.
Claim 23: In terms of base claim 21, the substrate could alternatively be taken as 4. In that case, in the variant of figs. 6A-6B, the substrate 4 is between the first EIC 14 and the first PIC 3.
Claim 24: In terms of base claim 21, the substrate could alternatively be taken as 4. In that case, in the variant of figs. 6A-6B:
the substrate 4 has a first side and a second side opposite the first side,
the first PIC 3 is coupled with the first side of the substrate, and
the first EIC 14 is coupled with the second side of the substrate.
Claim 25: The optoelectronic system of claim 21, wherein:
the optical waveguide 5 is parallel to the substrate 12, and
the optical coupler 9 is coupled to the end of the optical waveguide at a surface that is perpendicular to the substrate.
Claim 26: A first portion of the optical waveguide 5 (a portion away from couplers 8 or 9) has a first thickness,
a second portion of the waveguide 5 (an end portion in the vicinity of coupler 8 or 9) has a second thickness, and
the second thickness is smaller than the first thickness (as shown in fig. 4B).
Claim 29: The optoelectronic system further comprises a conductive interconnect between the second EIC and the second PIC (by analogy to "electrical line 16" mentioned in [0065]).
Claim 30: The first PIC is aligned with the second PIC (as examples, their bottoms are at the same height above the substrate in fig. 4B, and they both lie along the IVB-IVB cross-section axis labeled in fig. 4A).
Claim 31: The first PIC and the second PIC are coplanar (fig. 4B).
Claim 32: The first PIC is aligned with the conductive interconnect (fig. 4B).
Claims 33 and 35-41 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2019/0146166 A1.
Claim 33: '166 discloses an optoelectronic system, comprising (see mainly fig. 3E):
a substrate 180;
a photonic integrated circuit (PIC) 130 coupled with the substrate, the PIC comprising an optical modulator 110 (note fig. 1D and [0031]); an
optical waveguide 123 coupled with the PIC;
an optical coupler 122 at an end of the optical waveguide;
an electronic integrated circuit (EIC) 190 coupled with the PIC 130 and comprising driver circuitry coupled with the optical modulator of the PIC ([0030]-[0031]), wherein a footprint of the EIC 190 is within a footprint of the PIC 130 (fig. 3E);
a conductive interconnect 192 (or 146) between the EIC and the PIC; and
a processor 154 coupled with the EIC ([0025] states that 154 can be a CPU or GPU, each of which is a processor).
Claim 35: In terms of base claim 33, the substrate could alternatively be taken as 146. In that case, the substrate 146 is between the EIC 190 and the PIC 130.
Claim 36: In terms of base claim 33, the substrate could alternatively be taken as 146. In that case:
the substrate 146 has a first side (lower side in fig. 5E) and a second side (upper side) opposite the first side,
the PIC 130 is coupled with the first side of the substrate, and
the EIC 190 is coupled with the second side of the substrate.
Claim 37: '166 discloses an optoelectronic system, comprising (see mainly fig. 3E):
a substrate 180;
a photonic integrated circuit (PIC) 130 coupled with the substrate, the PIC comprising an optical modulator 110;
an electronic integrated circuit (EIC) 190 coupled with the PIC and comprising driver circuitry coupled with the optical modulator of the PIC, wherein the EIC and the PIC are stacked with respect to one another;
a conductive interconnect 146 between the EIC and the PIC; and
a processor 154 coupled with the EIC.
Claim 38: The optoelectronic system further comprises:
an optical waveguide 123 parallel to the substrate; and
an optical coupler 122 at an end of the optical waveguide at a surface (edge of 118a in figs. 1C-1D) that is perpendicular to the substrate.
Claim 39: A footprint of the EIC 190 is within a footprint of the PIC 130 (fig. 3E).
Claim 40: In terms of base claim 37, the substrate could alternatively be taken as 146. In that case, the substrate 146 is between the EIC 190 and the PIC 130.
Claim 41: In terms of base claim 37, the substrate could alternatively be taken as 146. In that case:
the substrate 146 has a first side (lower side in fig. 5E) and a second side (upper side) opposite the first side,
the PIC 130 is coupled with the first side of the substrate, and
the EIC 190 is coupled with the second side of the substrate.
Claim Rejections - 35 USC § 103
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 28 is rejected under 35 U.S.C. 103 as being unpatentable over US 2012/0224804 A1 (applied above).
'804 does not identify a material of the conductive interconnect ("electrical line 16" in [0065]) and thus does not disclose that the conductive interconnect includes copper. Official notice is taken of the fact that copper was well known in the art as a suitable material for forming electrical lines prior to the effective filing date of this application. No unexpected result would have been achieved by using copper for the electrical line 16 in '804. Accordingly it would have been obvious to a person of ordinary skill in the art before the effective filing date of claim 28 to do so, motivated by a desire to limit costs by using a well-known and widely industrially available material.
Allowable Subject Matter
Claim 27 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of base claim 21. The '804 reference applied to claim 21 does not disclose or reasonably suggest that its optical waveguides 5 include silicon and nitrogen.
Contact Information
Examiner: 571-272-2360
Examiner's direct supervisor: 571-272-2397
Official correspondence by fax: 571-273-8300
Information regarding the status of an application may be obtained from Patent Center. Should you have questions about Patent Center, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/Michael Stahl/Primary Examiner, Art Unit 2874