DETAILED ACTION
The instant application having Application No. 18/624679 filed on 04/02/2024 is presented for examination by the examiner.
Claim 1-20 is/are pending in the application.
Claims 1, 8 and 13 is/are independent claims.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Examiner Notes
Examiner cites particular columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Priority
As required by M.P.E.P. 201.14(c), acknowledgement is made of applicant’s claim for priority based on applications filed on 02/16/2024.
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Drawings
The applicant’s drawings submitted are acceptable for examination purposes.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 8, and 10-15 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter.
Claim 8 is rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter as being software per se. Per claim 8, the claim calls for an accelerator device; however, there is no hardware element found within the claimed device. As recited in the body of the claim, the claimed device contains “input-output interface”, “virtual machine” and “accelerator driver” One of ordinary skill in the art would understand that “input-output interface”, “virtual machine” and “accelerator driver” could be implemented in software, which is non-statutory subject matter. is suggested that the claim be further amended to positively recite at least one hardware embodiment in the body of the claim to make the claim statutory under 35. U.S.C. 101.
Claims 10-12 are also rejected under 35 U.S.C 101 as being directed to non-statutory subject matter for the same reasons.
Claim 13 is rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter as being software per se. Per claim 13, the claim calls for a host machine; however, there is no hardware element found within the claimed device. As recited in the body of the claim, the claimed device contains “input-output interface”, “virtual machine” and “accelerator driver” One of ordinary skill in the art would understand that “input-output interface”, “virtual machine” and “accelerator driver” could be implemented in software, which is non-statutory subject matter. is suggested that the claim be further amended to positively recite at least one hardware embodiment in the body of the claim to make the claim statutory under 35. U.S.C. 101.
Claims 14-15 are also rejected under 35 U.S.C 101 as being directed to non-statutory subject matter for the same reasons.
Allowable Subject Matter
Claims 3, 5, and 17-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 10-15 would be allowable if rewritten to overcome the rejection(s) under 101 set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following prior art made of record and not relied upon is cited to establish the level of skill in the applicant’s art and those arts considered reasonably pertinent to applicant’s disclosure. See MPEP 707.05(c).
Prior arts:
US 2025/006918 to Downs
Guest kernel mode virtual I/O driver 144 at action 306 translates the OS API call into a virtual I/O (virtio) command buffer stored in one or more of storage devices 262. At action 308, guest kernel mode virtual I/O driver 144 sends the addresses of the virtio command buffer and a virtio response buffer to host user mode virtual I/O driver 146.
US 2020/0050574 to Vajravel
It is commonly used by drivers as a means to allow its high-priority tasks (e.g., interrupt handlers) to be completed immediately while delaying its low-priority tasks until after the operating system has completed other higher-priority tasks. The result of step 1a will be that virtual bus driver 260 will be able to schedule the execution of its IRP completion routine as a DPC.
US 2016/0182342 to Singaravelu
Interrupt coalescing is a technique to hold back events that generate interrupts until a certain amount of time passes or a certain about of data to process is collected. When a VM generates a packet to send out (a transmit packet), the VNIC deriver generates an interrupt (e.g., by performing a call) to the virtualization software to inform the virtualization software of the pending transmit packet.
US 2015/0055499 to Zheng
The method comprises the steps of detecting a packet handling interrupt upon receiving a first data packet that is associated with the container, and determining whether the container is latency sensitive. The method further comprises the step of processing the packet handling interrupt if the container is latency sensitive. The method further comprises, if the container is not latency sensitive, then queueing the first data packet and delaying processing of the packet handling interrupt.
US 2014/0173628 to Ramakrishnan
devirtualization works best only on devices with low asynchronous operations and low DMA/interrupt handling such as GPU and sensors, for example, asynchronous operations (e.g., receipt of network packets that require callback into guest operating systems) have to rely on slow virtual interrupts
The prior art of record does not disclose and/or fairly suggest at least claimed limitations recited in such manners in dependent claims 3, 5, 1-11, and 17-18.
The prior art of record does not disclose and/or fairly suggest at least claimed limitations recited in such manners in independent claim 13 “… the accelerator driver to receive a current interrupt value and packet statistics from an accelerator device, and to communicate an intended interrupt value that is based in part on the current interrupt value and the packet statistics to the accelerator device, the intended interrupt value determined by a virtualizer interrupt moderation library of the at least one Virtio standard virtualizer component that is in communication with the accelerator driver, the intended interrupt value to be used with interrupts of the at least one accelerator device and with at least one of the different VMs.”
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-2, 7, 16 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over US 2019/0114197 to Gong in further view of US 2011/0179413 to Subramanian et al. (hereafter “Subramanian”), US 2020/0118514 to Sheriber et al. (hereafter “Sheriber”) and US 2006/0075480 to Noehring et al. (hereafter “Noehring”)
As per claim 1, Gong discloses A Virtio standard system (FIGs. 1-3; paragraphs 0071-0072: “the virtual accelerator is VirtIO-crypto, VirtIO-ipsec, or VirtIO-compression. The software input/output interface (sio) layer 204 includes a plurality of data packet headers of virtual accelerators, for example, a VirtIO-crypto header and a VirtIO-ipsec header, where the sio is an interface for performing data transmission between a frontend driver of each virtual accelerator and a backend device (Hypervisor), for example, a Virtual In/Out) (VirtIO) interface.”) comprising at least one circuit to host a virtualizer component (FIGs. 1-4: hypervisor 403 (virtualizer component)) that enables a plurality of virtual machines (VMs) (FIGs. 1-3: VM1-2), an accelerator driver (FIGs. 1-4; paragraphs 0071 and 0037-0074: frontend drivers), wherein individual ones of the plurality of VMs are associated with respective virtual input-output interfaces (vIO IFs) that are associated with the virtualizer component (FIGs. 1-4; paragraphs 0073-0075: “The virtual accelerator is similar to a virtual network interface card or a virtual magnetic disk. For example, the virtual accelerator is VirtIO-crypto, VirtIO-ipsec, or VirtIO-compression. The software input/output interface (sio) layer 204 includes a plurality of data packet headers of virtual accelerators, for example, a VirtIO-crypto header and a VirtIO-ipsec header, where the sio is an interface for performing data transmission between a frontend driver of each virtual accelerator and a backend device (Hypervisor), for example, a Virtual In/Out) (VirtIO) interface.” [Wingdings font/0xE0] virtual accelerator 4031-4034 located in hypervisor 403 associated with VM1-2) and that are to communicate with an accelerator device (communicating is interpreted as exchanging/sending/receiving/sharing [Wingdings font/0xE0]FIGs. 1-4; paragraphs 0073-0075: “The virtual accelerator is similar to a virtual network interface card or a virtual magnetic disk. For example, the virtual accelerator is VirtIO-crypto, VirtIO-ipsec, or VirtIO-compression. The software input/output interface (sio) layer 204 includes a plurality of data packet headers of virtual accelerators, for example, a VirtIO-crypto header and a VirtIO-ipsec header, where the sio is an interface for performing data transmission between a frontend driver of each virtual accelerator and a backend device (Hypervisor), for example, a Virtual In/Out) (VirtIO) interface.” [Times New Roman font/0xE0] virtual accelerator 4031-4034 located in hypervisor 403 associated with VM1-2) [Wingdings font/0xE0] virtual accelerator perform I/O to hardware accelerator 404).
Gong discloses the driver is the accelerator driver (FIGs. 1-4), however, Gong does not explicitly disclose a virtualizer component that enables a plurality of virtual machines (VMs) and a virtualizer interrupt moderation library; wherein the accelerator driver is to monitor interrupts associated with the plurality of VMs and to communicate a current interrupt value and packet statistics with the virtualizer interrupt moderation library, and wherein the virtualizer interrupt moderation library is to indicate an intended interrupt value to the accelerator driver to cause the accelerator device to use the intended interrupt value with at least one of the plurality of VMs.
Subramanian further discloses a virtualizer component that enables a plurality of virtual machines (VMs) (FIGs. 1 and 4; VMM 412 enabling VM 404) and a virtualizer interrupt moderation library (FIGs. 1 and 4-5; paragraphs 0053, 0054 and 0068: VMM 412 enabling interrupt coalescing 436 including interrupt strategies (virtualizer interrupt moderation library as claimed),
wherein the driver is to monitor interrupts associated with the plurality of VMs (FIGs. 4 and 5-8; paragraphs 0053-0054 and 0058-0059: “wherein the accelerator driver is to monitor interrupts associated with the plurality of VMs and to communicate a current interrupt value and packet statistics with the virtualizer interrupt moderation library, and wherein the virtualizer interrupt moderation library is to indicate an intended interrupt value to the accelerator driver to cause the accelerator device to use the intended interrupt value with at least one of the plurality of VMs.” AND “the virtualization intermediary side safe interrupt coalescing process 700, the virtualization intermediary 412 generates a unique identifier for every interrupt and tracks the state of the unique identifier in the shared memory region 500. The guest OS VF driver 409 maintains state in the shared memory region 500 indicating the unique identifier of the last virtual interrupt that it processed. The virtualization intermediary 412 consults the two state variables to avoid generating interrupts when the guest operating system VF driver 409 has not acknowledged a previously posted virtual interrupt.”) [Wingdings font/0xE0] driver 409 monitoring/tracking states of the interrupts sending to the VMs) and to communicate a current interrupt value with the virtualizer interrupt moderation library (communicating is interpreted as exchanging/sending/receiving/sharing [Wingdings font/0xE0]FIGs. 4-6; paragraphs 0053-0054 and 0060-0061: “The guest OS resident VF driver 409 and the virtualization intermediary 412 collaboratively maintain state information in the shared memory region 500 to track the latest virtual interrupt that was generated by the virtualization intermediary 412 and the latest virtual interrupt that was received by the guest OS VF driver 409. This information sharing allows the virtualization intermediary 412 to implement a first virtual interrupt coalescing strategy, referred to herein as a `safe virtual interrupt coalescing strategy`, by avoiding the delivery of a virtual interrupt when the guest OS VF 408 has not yet responded to a previously generated interrupt.”), and wherein the virtualizer interrupt moderation library is to indicate an intended interrupt value to the driver (FIGs. 5-7; paragraphs 0053-0054, and 0058-0061: generating safe strategy by avoiding delivery of interrupts OR aggressive strategy (a specific interrupt delivery rate).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Subramainian into Gong’s teaching because it would provide for the purpose of improving management of interrupt moderation for interrupts between circuits in a computing environment (Subramanian, paragraph 0012).
Sheriber further discloses to cause the accelerator device to use the intended interrupt value with at least one of the plurality of VMs (paragraphs 0015 and 0031).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Sheriber into Gong’s teaching and Subramanian’s teaching because it would provide for the purpose of The virtual machine GPU can also generate interrupts to the guest operating system at a rate specified by the value, to enable the virtual machine to draw framebuffers at the rate (i.e., refresh rate) (Sheriber, paragraph 0015).
Noehring further discloses wherein the driver is to communicate packet statistics (in view of paragraph 0014 of the specification, Noehring paragraph 0039 discloses “NIC driver 226 may use heuristics on input packet queue length to notify NIC 102 of the number of packets that host processor 104 is expected to be able to handle for the next given time period (e.g., every millisecond).” [Wingdings font/0xE0] number of packets (packet statistics as claimed) [Wingdings font/0xE0] communicating is interpreted as exchanging/sending/receiving/sharing )
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Noehring into Gong’s teaching, Subramanian’s teaching and Sheriber’s teaching because it would provide for the purpose of to throttle the amount of traffic sent to host processor 104 when it is becoming overwhelmed during a DOS attack or otherwise (Noehring, paragraph 0039).
As per claim 2, Gong discloses wherein the accelerator device is a peripheral component interconnect (PCI)-enabled data-path accelerator (paragraph 0121).
As per claim 7, Gong discloses wherein the virtualizer component is a hypervisor (FIGs. 1-4: hypervisor 403 (virtualizer component)) or a virtual machine manager for the plurality of VMs (FIGs. 1-3: VM1-2) and wherein the at least one circuit is part of at least one host machine that also includes the plurality of VMs (FIGs. 1-3).
As per claim 16, Gong discloses A method for handling interrupts in a Virtio standard (FIGs. 1-3; paragraphs 0071-0072: “the virtual accelerator is VirtIO-crypto, VirtIO-ipsec, or VirtIO-compression. The software input/output interface (sio) layer 204 includes a plurality of data packet headers of virtual accelerators, for example, a VirtIO-crypto header and a VirtIO-ipsec header, where the sio is an interface for performing data transmission between a frontend driver of each virtual accelerator and a backend device (Hypervisor), for example, a Virtual In/Out) (VirtIO) interface.”), the method comprising:
hosting, using at least one host machine, a virtualizer component (FIGs. 1-4: hypervisor 403 (virtualizer component)) that enables a plurality of virtual machines (VMs) (FIGs. 1-3: VM1-2), an accelerator driver (FIGs. 1-4; paragraphs 0071 and 0037-0074: frontend drivers);
enabling individual ones of the plurality of VMs to be associated with respective virtual input-output interfaces (vIO IFs) that are associated with the virtualizer component (FIGs. 1-4; paragraphs 0073-0075: “The virtual accelerator is similar to a virtual network interface card or a virtual magnetic disk. For example, the virtual accelerator is VirtIO-crypto, VirtIO-ipsec, or VirtIO-compression. The software input/output interface (sio) layer 204 includes a plurality of data packet headers of virtual accelerators, for example, a VirtIO-crypto header and a VirtIO-ipsec header, where the sio is an interface for performing data transmission between a frontend driver of each virtual accelerator and a backend device (Hypervisor), for example, a Virtual In/Out) (VirtIO) interface.” [Wingdings font/0xE0] virtual accelerator 4031-4034 located in hypervisor 403 associated with VM1-2) and that are to communicate with an accelerator device (communicating is interpreted as exchanging/sending/receiving/sharing [Wingdings font/0xE0]FIGs. 1-4; paragraphs 0073-0075: “The virtual accelerator is similar to a virtual network interface card or a virtual magnetic disk. For example, the virtual accelerator is VirtIO-crypto, VirtIO-ipsec, or VirtIO-compression. The software input/output interface (sio) layer 204 includes a plurality of data packet headers of virtual accelerators, for example, a VirtIO-crypto header and a VirtIO-ipsec header, where the sio is an interface for performing data transmission between a frontend driver of each virtual accelerator and a backend device (Hypervisor), for example, a Virtual In/Out) (VirtIO) interface.” [Times New Roman font/0xE0] virtual accelerator 4031-4034 located in hypervisor 403 associated with VM1-2) [Wingdings font/0xE0] virtual accelerator perform I/O to hardware accelerator 404)
Gong discloses the driver is the accelerator driver (FIGs. 1-4), however, Gong does not explicitly disclose a virtualizer component that enables a plurality of virtual machines (VMs) and a virtualizer interrupt moderation library;
monitoring, using the accelerator driver, interrupts associated with the accelerator device; and
communicating a current interrupt value and packet statistics with the virtualizer interrupt moderation library, wherein the virtualizer interrupt moderation library is to indicate an intended interrupt value to the accelerator driver to cause the accelerator device to use the intended interrupt value with at least one of the plurality of VMs.
Subramanian further discloses a virtualizer component that enables a plurality of virtual machines (VMs) (FIGs. 1 and 4; VMM 412 enabling VM 404) and a virtualizer interrupt moderation library (FIGs. 1 and 4-5; paragraphs 0053, 0054 and 0068: VMM 412 enabling interrupt coalescing 436 including interrupt strategies (virtualizer interrupt moderation library as claimed);
monitoring, using the accelerator driver, interrupts associated with the accelerator device (FIGs. 4 and 5-8; paragraphs 0053-0054 and 0058-0059: “wherein the accelerator driver is to monitor interrupts associated with the plurality of VMs and to communicate a current interrupt value and packet statistics with the virtualizer interrupt moderation library, and wherein the virtualizer interrupt moderation library is to indicate an intended interrupt value to the accelerator driver to cause the accelerator device to use the intended interrupt value with at least one of the plurality of VMs.” AND “the virtualization intermediary side safe interrupt coalescing process 700, the virtualization intermediary 412 generates a unique identifier for every interrupt and tracks the state of the unique identifier in the shared memory region 500. The guest OS VF driver 409 maintains state in the shared memory region 500 indicating the unique identifier of the last virtual interrupt that it processed. The virtualization intermediary 412 consults the two state variables to avoid generating interrupts when the guest operating system VF driver 409 has not acknowledged a previously posted virtual interrupt.”) [Wingdings font/0xE0] driver 409 monitoring/tracking states of the interrupts sending to the VMs);
communicating a current interrupt value and packet statistics with the virtualizer interrupt moderation library (communicating is interpreted as exchanging/sending/receiving/sharing [Wingdings font/0xE0]FIGs. 4-6; paragraphs 0053-0054 and 0060-0061: “The guest OS resident VF driver 409 and the virtualization intermediary 412 collaboratively maintain state information in the shared memory region 500 to track the latest virtual interrupt that was generated by the virtualization intermediary 412 and the latest virtual interrupt that was received by the guest OS VF driver 409. This information sharing allows the virtualization intermediary 412 to implement a first virtual interrupt coalescing strategy, referred to herein as a `safe virtual interrupt coalescing strategy`, by avoiding the delivery of a virtual interrupt when the guest OS VF 408 has not yet responded to a previously generated interrupt.”);
wherein the virtualizer interrupt moderation library is to indicate an intended interrupt value to the accelerator driver (FIGs. 5-7; paragraphs 0053-0054, and 0058-0061: generating safe strategy by avoiding delivery of interrupts OR aggressive strategy (a specific interrupt delivery rate).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Subramainian into Gong’s teaching because it would provide for the purpose of improving management of interrupt moderation for interrupts between circuits in a computing environment (Subramanian, paragraph 0012).
Sheriber further discloses to cause the accelerator device to use the intended interrupt value with at least one of the plurality of VMs (paragraphs 0015 and 0031).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Sheriber into Gong’s teaching and Subramanian’s teaching because it would provide for the purpose of The virtual machine GPU can also generate interrupts to the guest operating system at a rate specified by the value, to enable the virtual machine to draw framebuffers at the rate (i.e., refresh rate) (Sheriber, paragraph 0015).
Noehring further discloses wherein the driver is to communicate packet statistics (in view of paragraph 0014 of the specification, Noehring paragraph 0039 discloses “NIC driver 226 may use heuristics on input packet queue length to notify NIC 102 of the number of packets that host processor 104 is expected to be able to handle for the next given time period (e.g., every millisecond).” [Wingdings font/0xE0] number of packets (packet statistics as claimed) [Wingdings font/0xE0] communicating is interpreted as exchanging/sending/receiving/sharing )
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Noehring into Gong’s teaching, Subramanian’s teaching and Sheriber’s teaching because it would provide for the purpose of to throttle the amount of traffic sent to host processor 104 when it is becoming overwhelmed during a DOS attack or otherwise (Noehring, paragraph 0039).
As per claim 20, Gong discloses providing the virtualizer component as a hypervisor (FIGs. 1-4: hypervisor 403 (virtualizer component)) or a virtual machine manager for the plurality of VMs (FIGs. 1-3: VM1-2); and
enabling the hypervisor or the virtual machine manager to be part of at least one host machine (FIGs. 1-3).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Gong in view of Subramanian, Sheriber and Noehring, as applied to claim 1, and further in view of US 2019/0155539 to Ni et al. (hereafter Ni)
As per claim 4, Gong discloses VIO_IF (FIGs. 1-4; paragraphs 0073-0075), however, Gong does not explicitly disclose wherein the respective vIO IFs are virtqueues that comprise one or more of request virtqueues, control virtqueues, administration virtqueues, receive virtqueues, or transmit virtqueues.
Ni further discloses wherein the respective vIO IFs are virtqueues that comprise one or more of request virtqueues (paragraphs 0037 and 0040), control virtqueues, administration virtqueues, receive virtqueues, or transmit virtqueues.
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Ni into Gong’s teaching, Subramanian’s teaching, Sheriber’s teaching, Noehring’s teaching because it would provide for the purpose of to throttle the amount of traffic sent to host processor 104 when it is becoming overwhelmed during a DOS attack or otherwise (Noehring, paragraph 0039).
Claims 6 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Gong in view of Subramanian, Sheriber and Noehring, as applied to claims 1 and 16, and further in view of US 2016/0299858 to Ching et al. (hereafter Ching)
As per claim 6, Gong does not explicitly disclose wherein the accelerator device is adapted to provide information about the interrupts to enable the accelerator driver to perform the monitoring of the interrupts associated with the accelerator device.
Ching further discloses wherein the accelerator device is adapted to provide information about the interrupts (FIG. 2; paragraphs 0043-0045: information/data/interrupts sent from the accelerator to CPU or driver) to enable the accelerator driver to perform the monitoring of the interrupts associated with the accelerator device (FIG. 2; paragraphs 0043-0045: “The guest OS resident VF driver 409 and the virtualization intermediary 412 collaboratively maintain state information in the shared memory region 500 to track the latest virtual interrupt that was generated by the virtualization intermediary 412 and the latest virtual interrupt that was received by the guest OS VF driver 409. This information sharing allows the virtualization intermediary 412 to implement a first virtual interrupt coalescing strategy, referred to herein as a `safe virtual interrupt coalescing strategy`, by avoiding the delivery of a virtual interrupt when the guest OS VF 408 has not yet responded to a previously generated interrupt.)
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Ching into Gong’s teaching, Subramanian’s teaching, Sheriber’s teaching, Noehring’s teaching because it would provide for the purpose of the accelerator driver, at operation will process the IRQ signal, e.g., triggering an appropriate subroutine to resolve the error (Ching, paragraph 0045).
As per claim 19, Gong does not explicitly disclose providing, by the accelerator device, information about the interrupts; and enabling the accelerator driver to perform the monitoring of the interrupts using the information.
Ching further discloses providing, by the accelerator device, information about the interrupts (FIG. 2; paragraphs 0043-0045: information/data/interrupts sent from the accelerator to CPU or driver); and
enabling the accelerator driver to perform the monitoring of the interrupts using the information (FIG. 2; paragraphs 0043-0045: “The guest OS resident VF driver 409 and the virtualization intermediary 412 collaboratively maintain state information in the shared memory region 500 to track the latest virtual interrupt that was generated by the virtualization intermediary 412 and the latest virtual interrupt that was received by the guest OS VF driver 409. This information sharing allows the virtualization intermediary 412 to implement a first virtual interrupt coalescing strategy, referred to herein as a `safe virtual interrupt coalescing strategy`, by avoiding the delivery of a virtual interrupt when the guest OS VF 408 has not yet responded to a previously generated interrupt.)
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Ching into Gong’s teaching, Subramanian’s teaching, Sheriber’s teaching, Noehring’s teaching because it would provide for the purpose of the accelerator driver, at operation will process the IRQ signal, e.g., triggering an appropriate subroutine to resolve the error (Ching, paragraph 0045).
Claims 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Gong in view of Subramanian, Sheriber, Noehring further in view of US 2016/0299858 to Ching et al. (hereafter “Ching”)
As per claim 8, Gong discloses At least one Virtio standard accelerator device adapted for data path acceleration with respective virtual input-output interfaces (vIO IFs) (FIGs. 1-3; paragraphs 0071-0072: “the virtual accelerator is VirtIO-crypto, VirtIO-ipsec, or VirtIO-compression. The software input/output interface (sio) layer 204 includes a plurality of data packet headers of virtual accelerators, for example, a VirtIO-crypto header and a VirtIO-ipsec header, where the sio is an interface for performing data transmission between a frontend driver of each virtual accelerator and a backend device (Hypervisor), for example, a Virtual In/Out) (VirtIO) interface.”) associated with different virtual machines (VMs) (FIGs. 1-3: VM1-2), an accelerator driver (FIGs. 1-4; paragraphs 0071 and 0037-0074: frontend drivers) of a virtualizer component (FIGs. 1-4: hypervisor 403 (virtualizer component)) of at least one host machine (FIGs. 1-3: VM1-2).
Gong discloses the driver is the accelerator driver (FIGs. 1-4), however, Gong does not explicitly disclose to communicate a current interrupt value and packet statistics with an accelerator driver of a virtualizer component of at least one host machine, and adapted to receive an intended interrupt value as determined by a virtualizer interrupt moderation library based in part on the current interrupt value and the packet statistics, wherein the intended interrupt value is to be used with interrupts of the at least one Virtio standard accelerator device and with at least one of the different VMs.
Subramanian further discloses to communicate a current interrupt value with an accelerator driver (communicating is interpreted as exchanging/sending/receiving/sharing [Wingdings font/0xE0] FIGs. 4-6; paragraphs 0053-0054 and 0060-0061: “The guest OS resident VF driver 409 and the virtualization intermediary 412 collaboratively maintain state information in the shared memory region 500 to track the latest virtual interrupt that was generated by the virtualization intermediary 412 and the latest virtual interrupt that was received by the guest OS VF driver 409. This information sharing allows the virtualization intermediary 412 to implement a first virtual interrupt coalescing strategy, referred to herein as a `safe virtual interrupt coalescing strategy`, by avoiding the delivery of a virtual interrupt when the guest OS VF 408 has not yet responded to a previously generated interrupt.” [Wingdings font/0xE0] exchanging the information i.e., state information to track the interrupt) of a virtualizer component of at least one host machine (FIGs. 1 and 4; VMM 412 enabling VM 404) and a virtualizer interrupt moderation library (FIGs. 1 and 4-5; paragraphs 0053, 0054 and 0068: VMM 412 enabling interrupt coalescing 436 including interrupt strategies (virtualizer interrupt moderation library as claimed), and adapted to receive an intended interrupt value as determined by a virtualizer interrupt moderation library based in part on the current interrupt value (FIGs. 5-7; paragraphs 0053-0054, and 0058-0061: generating safe strategy by avoiding delivery of interrupts OR aggressive strategy (a specific interrupt delivery rate).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Subramainian into Gong’s teaching because it would provide for the purpose of improving management of interrupt moderation for interrupts between circuits in a computing environment (Subramanian, paragraph 0012).
Sheriber further discloses wherein the intended interrupt value is to be used with interrupts of the at least one Virtio standard accelerator device and with at least one of the different VMs (paragraphs 0015 and 0031).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Sheriber into Gong’s teaching and Subramanian’s teaching because it would provide for the purpose of The virtual machine GPU can also generate interrupts to the guest operating system at a rate specified by the value, to enable the virtual machine to draw framebuffers at the rate (i.e., refresh rate) (Sheriber, paragraph 0015).
Noehring further discloses to communicate a packet statistics with an accelerator driver (in view of paragraph 0014 of the specification, Noehring paragraph 0039 discloses “NIC driver 226 may use heuristics on input packet queue length to notify NIC 102 of the number of packets that host processor 104 is expected to be able to handle for the next given time period (e.g., every millisecond).” [Wingdings font/0xE0] number of packets (packet statistics as claimed) [Wingdings font/0xE0] communicating is interpreted as exchanging/sending/receiving/sharing)
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Noehring into Gong’s teaching, Subramanian’s teaching and Sheriber’s teaching because it would provide for the purpose of to throttle the amount of traffic sent to host processor 104 when it is becoming overwhelmed during a DOS attack or otherwise (Noehring, paragraph 0039).
Musumeci further discloses an intended interrupt value as determined based in part on the packet statistics (paragraphs 0032-0034: determining new value of an interrupt coalescing parameter based on “Trend” value which is number of backets).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Musumeci into Gong’s teaching, Subramanian’s teaching, Sheriber’s teaching, and Noehring’s teaching because it would provide for the purpose of dynamically modifying the interrupt blanking (or coalescing) behavior of a communication interface, in response to the changing workload or traffic pattern received at the interface (Musumeci, paragraph 0009).
As per claim 9, Gong discloses wherein the accelerator device is a peripheral component interconnect (PCI)-enabled data-path accelerator (paragraph 0121).
Conclusion
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/TUAN C DAO/ Primary Examiner, Art Unit 2198
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