DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 10/15/2025 have been fully considered but they are not persuasive. The amendment to the claims, namely, “used by the data to be queued in the buffer” as opposed to “used by the data” is implied in the previously rejected claims since the claim contains recitation of an aforementioned buffer which obviously is for the purpose of buffering data. Likewise, the recitation of sending write commands as opposed to sending commands is implied in the previously rejected claims since the claims recite a memory system having a buffer and buses connected between a host and the memory system which obviously involves executing write commands on the memory system. It appears that an interview will be beneficial to flesh out the scope of the latest amendment before the filing of the next response.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 11,983,435; claims 1-21 of U.S. Patent No. 11,074,007. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the issued patent make obvious the claims of the pending application in that the claims are directed to substantially the same subject matter as the parent case though not necessarily presented in the same sequential/logical order or the same claim numbering as shown in the table below (for purposes of illustration rather than limitation).
Instant Application: 18/624,796
Patent: 11,074,007; 11,983,435
Claim 1. A method, comprising: maintaining a count representative of an amount of available capacity of a buffer in a memory sub-system; sending a write command to the memory sub-system to store data, wherein the data is to be queued in the buffer in the memory sub-system prior to execution of the write command in the memory sub-system; updating the count corresponding to deducting, from the amount of available capacity of the buffer, an amount of buffer capacity used by the data to be queued in the buffer for the execution of the write command in the memory sub-system; and controlling sending write commands to the memory sub-system based on the count.
3. The method of claim 2, further comprising: sending an information request to the memory sub-system based at least in part on the amount of available capacity of the buffer as represented by the count.
Claim 1. A host system, comprising: a processing device; and a controller, operatively connected to a memory sub-system via a communication channel, to: store information identifying an amount of available capacity of a buffer of the memory sub-system; transmit, through the communication channel to the memory sub-system, one or more write commands to store data in memory components of the memory sub-system, wherein the memory sub-system queues the one or more write commands in the buffer; update the information by deducting, from the amount of available capacity, an amount of buffer capacity used by the one or more write commands to calculate a current amount of available capacity of the buffer; and determine whether to generate an information request to the memory sub-system based at least in part on the current amount of available capacity.
“A later patent claim is not patentably distinct from an earlier patent claim if the later claim is obvious over, or anticipated by, the earlier claim. In re Longi, 759 F.2d at 896, 225 USPQ at 651 (affirming a holding of obviousness-type double patenting because the claims at issue were obvious over claims in four prior art patents); In re Berg, 140 F.3d at 1437, 46 USPQ2d at 1233 (Fed. Cir. 1998) (affirming a holding of obviousness-type double patenting where a patent application claim to a genus is anticipated by a patent claim to a species within that genus). “ELI LILLY AND COMPANY v BARR LABORATORIES, INC., United States Court of Appeals for the Federal Circuit, ON PETITION FOR REHEARING EN BANC (DECIDED: May 30, 2001).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-3, 8-10, and 15-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bains (US Pub. 2019/0129656) and WO 2017/145223 (hereinafter WO223, Relying on relevant sections of the PE2E English Machine Translation).
Regarding claim 1, Bains discloses a method, comprising: maintaining a count representative of an amount of available capacity of a buffer in a memory sub-system; sending a write command to the memory sub-system to store data [¶0036: wherein the buffer status is written into WC counter 124, the WC counter 124 stores the information indicative of the amount of availability capacity of write buffer 134; ¶0029: wherein the information in WC counter is updated by increasing or decreasing the count in WC counter as the available write buffer space changes]; and controlling sending write commands to the memory sub-system based on the count [Abstract; ¶0008, 0024: the host device queries the memory to obtain status of available write buffer space in the controller and adjust the write credit counter].
Bains does not explicitly disclose updating the count by deducting an amount of buffer capacity used by the data to be queued in the buffer.
WO223, however, discloses updating the count by deducting an amount of buffer capacity used by the data to be queued in the buffer [English Description: if it is determined that the actual usage amount of the target data exceeds the target usage amount, the storage program executes a capacity reduction process, the storage program updates the local area control area control table].
It would have been obvious to one of ordinary skill in the art to have updating the count by deducting an amount of buffer capacity used by the data in order to improve the performance of a computer system in which data are stored in distributed locations (Abstract).
Regarding claim 2, Bains discloses the method of claim 1, wherein the sending of the write command is in response to a determination that the amount of available capacity of the buffer as represented by the count is sufficient for queuing the data to be stored via the execution of the write command [¶0036, 0029: preventing further write request if there is no available buffer space; generate the information request based at least in part on a time interval wherein the WC counter can be updated periodically].
Regarding claim 3, Bains discloses the method of claim 2, further comprising: sending an information request to the memory sub-system based at least in part on the amount of available capacity of the buffer as represented by the count [¶0029: wherein the information in WC counter is updated by increasing or decreasing the count in WC counter as the available write buffer space changes]; and receiving, from the memory sub-system, a response to the information request [¶0002, 0004].
Regarding claims 8 and 15, the rationale in the rejection of claim 1 is herein incorporated. Bains further discloses an apparatus, comprising: a host system [FIG. 3]; a memory sub-system having a buffer [FIG. 14, 15]; a plurality of buses connected between the host system and the memory sub-system, the plurality of buses including: a command bus [FIG. 4]; a data bus [FIG. 1]; a transaction bus [FIG. 1]; and a metadata bus [FIG. 1].
Regarding claims 9 and 16, the rationale in the rejection of claim 2 is herein incorporated.
Regarding claims 10 and 17, the rationale in the rejection of claim 3 is herein incorporated.
Claim(s) 4-7, 11-14, and 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bains (US Pub. 2019/0129656), and WO 2017/145223, and OKAMOTO (CN100422920).
Regarding claim 4, Bains discloses the method of claim 3, but does not explicitly disclose wherein the sending of the information request is in response to a determination that the amount of available capacity of the buffer as represented by the count is lower than a threshold.
Okamoto, however, discloses wherein the sending of the information request is in response to a determination that the amount of available capacity of the buffer as represented by the count is lower than a threshold [English Translation: if the buffer data in the storage falls below the lower limit, if the determination process that data storage capacity in the buffer falls below the lower limit reference value, reading the record data from the buffer to pause writing data to hard disk so as to calculate the data amount from the current data storage capacity].
It would have been obvious to one of ordinary skill in the art, at the time of invention, to have postpone generation of the information request until the current amount of available capacity is less than a threshold in order to calculate the data amount from the current data storage capacity (English Translation).
Regarding claim 5, Bains discloses the method of claim 4, wherein the sending of the information request is further in response to a determination that the memory sub-system has no pending read command [¶0036, 0029: preventing further write request if there is no available buffer space; generate the information request based at least in part on a time interval wherein the WC counter can be updated periodically].
Regarding claim 6, Okamoto discloses the method of claim 5, wherein the sending of the information request is further in response to a determination that a time period from a prior communication from the memory sub-system about available capacity of the buffer is longer than a threshold time period [English Translation: if the buffer data in the storage falls below the lower limit, if the determination process that data storage capacity in the buffer falls below the lower limit reference value, reading the record data from the buffer to pause writing data to hard disk so as to calculate the data amount from the current data storage capacity].
Regarding claim 7, WO223 discloses the method of claim 5, wherein the response from the memory sub-system identifies available capacity of the buffer as determined by the memory sub-system in response to the information request [Abstract; ¶0008, 0024: the host device queries the memory to obtain status of available write buffer space in the controller and adjust the write credit counter].
Regarding claims 11 and 18, the rationale in the rejection of claim 4 is herein incorporated.
Regarding claims 12 and 19, the rationale in the rejection of claim 5 is herein incorporated.
Regarding claims 13 and 20, the rationale in the rejection of claim 6 is herein incorporated.
Regarding claim 14, the rationale in the rejection of claim 7 is herein incorporated.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. FR 3026513 discloses suspending any subsequent writing in the storage device and sending indication to the host device so that the host device will no longer transmit write commands to the storage device.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARDOCHEE CHERY whose telephone number is (571)272-4246. The examiner can normally be reached from 900-500.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rocio Del Mar Perez-Velez can be reached at (571)270-5935. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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Respectfully Submitted,
USPTO
Dated: April 1, 2026 By: /MARDOCHEE CHERY/
Primary Examiner
Art Unit 2133
Email:Mardochee.Chery@uspto.gov Telephone: 571-272-4246
Facsimile: 571-273-4246