Prosecution Insights
Last updated: April 19, 2026
Application No. 18/624,817

TWO-STAGE CONVERTER AND CONTROL METHOD THEREOF

Non-Final OA §102§103
Filed
Apr 02, 2024
Examiner
JACKSON, LAKAISHA
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
DELTA ELECTRONICS (SHANGHAI) CO., LTD.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
96%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allow Rate
411 granted / 484 resolved
+16.9% vs TC avg
Moderate +11% lift
Without
With
+11.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
23 currently pending
Career history
507
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
46.8%
+6.8% vs TC avg
§102
34.4%
-5.6% vs TC avg
§112
12.4%
-27.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 484 resolved cases

Office Action

§102 §103
DETAILED ACTION The present application, filed 04/02/2024, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-5 and 13-15 is/are rejected under 35 U.S.C. 102(a)(1)(a)(2) as being anticipated by Wei et al. (“Wei”, US 9,331,565). Re claim 1, Wei teaches a two-stage converter [Fig 1], comprising: a first stage conversion unit [15], receiving a first power [from Vin], and converting the first power into a second power [at 15a]; a capacitor unit [Cin], electrically connected to the first stage conversion unit to receive the second power; and a second stage conversion unit [11], electrically connected to the capacitor unit to receive a power transmitted by the capacitor unit, wherein the first stage conversion unit receives a switch signal [from 13b1] which has a switching cycle, and in at least one said switching cycle, the two-stage converter performs a first control mode in which an operation state of the second stage conversion unit is adjusted according to an operation state of the first stage conversion unit [Col 5, ln 66-Col 6, ln 2]. Re claim 2, Wei teaches wherein in the first control mode, when the operation state of the first stage conversion unit is stopping outputting the second power, the operation state of the second stage conversion unit is adjusted to stop operating, and when the operation state of the first stage conversion unit is outputting the second power, the operation state of the second stage conversion unit is adjusted to operate normally [Col 9, ln 29-37]. Re claim 3, Wei teaches wherein the first stage conversion unit has a plurality of first signals [VPWM1] reflecting the operation state of the first stage conversion unit, the capacitor unit has a plurality of second signals [capacitor voltage, capacitor current] reflecting the operation state of the first stage conversion unit, and the two-stage converter determines the operation state of the first stage conversion unit according to at least one said first signal or at least one said second signal [signals from the first control circuit is sent to the second stage converter, Col 5, ln 66-Col 6, ln 2]. Re claim 4, Wei teaches wherein the two-stage converter determines the operation state of the first stage conversion unit according to the switch signal [if the output of 13b1 is active, the operation state is normal], the operation state of the first stage conversion unit is outputting the second power when the switch signal is at a first level, and the operation state of the first stage conversion unit is stopping outputting the second power when the switch signal is at a second level [13b1 being disabled, Col 9, ln 29-31]. Re claim 5, Wei teaches wherein when the operation state of the second stage conversion unit is operating normally, the second stage conversion unit receives a high-frequency switch signal [VPWM2, note: Col 20, ln 3-5 indicates the signal can be a frequency signal]. Re claim 13, Wei teaches [Fig 1] a control method of a two-stage converter [Fig 1], wherein the two-stage converter comprises a first stage conversion unit [15], a capacitor unit [Cin] and a second stage conversion unit [11], the first stage conversion unit receives a first power [Vin] and converts the first power into a second power [Vbus], the capacitor unit is electrically connected to the first stage conversion unit to receive the second power, the second stage conversion unit is electrically connected to the capacitor unit to receive a power transmitted by the capacitor unit [as shown in Fig 1], the first stage conversion unit receives a switch signal [from 13b1] which has a switching cycle, and the control method comprises: in at least one said switching cycle, controlling the two-stage converter to perform a first control mode in which an operation state of the second stage conversion unit is adjusted according to an operation state of the first stage conversion unit [Col 5, ln 66-Col 6, ln 2]. Re claim 14, Wei teaches wherein in the first control mode, when the operation state of the first stage conversion unit is stopping outputting the second power, adjusting the operation state of the second stage conversion unit to stop operating, and when the operation state of the first stage conversion unit is outputting the second power, adjusting the operation state of the second stage conversion unit to operate normally [Col 9, ln 29-37]. Re claim 15, Wei teaches determining the operation state of the first stage conversion unit according to at least one signal in the two-stage converter [if the output of 13b1 is active, the operation state is normal]; and outputting or stopping outputting a high-frequency switch signal to the second stage conversion unit according to the operation state of the first stage conversion unit [13b1 being disabled, Col 9, ln 29-31]. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wei in view of Pastore et al. (“Pastore”, US 10,491,126). Re claim 6, Wei teaches the limitations as applied to the claim above but does not teach a first driving circuit, configured to output the switch signal to the first stage conversion unit; a state determination circuit, configured to determine the operation state of the first stage conversion unit according to at least one signal in the two-stage converter; and a second driving circuit, configured to output or stop outputting a high-frequency switch signal to the second stage conversion unit according to a determination result of the state determination circuit. Pastore teaches a device [Fig 1A] having a first driving circuit [117], configured to output the switch signal [DR1] to the first stage conversion unit; a state determination circuit [124], configured to determine the operation state of the first stage conversion unit according to at least one signal in the two-stage converter [Col 6, ln 28-38]; and a second driving circuit [123], configured to output or stop outputting a high-frequency switch signal to the second stage conversion unit according to a determination result of the state determination circuit [Col 6, ln 28-38]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Wei to include the features of Pastore because it is used to manage fault conditions, thus improving the utility of the device, which increases efficiency. Claims 7, 8, and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wei in view of Uno et al. (“Uno”, US 2013/0336017). Re claim 7, Wei teaches the limitations as applied to the claim above but does not teach wherein in at least another switching cycle, the two-stage converter performs a second control mode in which the second stage conversion unit operates normally and continuously. Uno teaches a device [Fig 1] wherein in at least another switching cycle, the two-stage converter performs a second control mode in which the second stage conversion unit operates normally and continuously [paragraph 76]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Wei to include the features of Uno because it is used to manage fault conditions, thus improving the utility of the device, which increases efficiency. Re claim 8, Wei teaches the limitations as applied to the claim above but does not teach wherein in the first control mode, a high-frequency switch signal is outputted to control the second stage conversion unit to operate normally when the first stage conversion unit is outputting the second power, and the high-frequency switch signal is blocked to control the second stage conversion unit to stop operating when the first stage conversion unit is stopping outputting the second power; and wherein in the second control mode, the high-frequency switch signal is outputted continuously to control the second stage conversion unit to operate normally. Uno teaches wherein in the first control mode, a high-frequency switch signal is outputted to control the second stage conversion unit to operate normally when the first stage conversion unit is outputting the second power, and the high-frequency switch signal is blocked to control the second stage conversion unit to stop operating when the first stage conversion unit is stopping outputting the second power [paragraph 75]; and wherein in the second control mode, the high-frequency switch signal is outputted continuously to control the second stage conversion unit to operate normally [paragraph 76]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Wei to include the features of Uno because it is used to manage fault conditions, thus improving the utility of the device, which increases efficiency. Re claim 16, Wei teaches the limitations as applied to the claim above but does not teach wherein in at least another switching cycle, controlling the two-stage converter to perform a second control mode in which the second stage conversion unit operates normally and continuously. Uno teaches wherein in at least another switching cycle, controlling the two-stage converter to perform a second control mode in which the second stage conversion unit operates normally and continuously [paragraph 76]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Wei to include the features of Uno because it is used to manage fault conditions, thus improving the utility of the device, which increases efficiency. Allowable Subject Matter Claims 9-12 and 17-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: the prior art fails to teach or disclose: Re claim 9 and its dependents thereof, the closet prior art (which has been made of record) fail to disclose (by themselves or in combination): “a state determination circuit, configured to determine the operation state of the first stage conversion unit according to at least one signal in the two-stage converter; a mode determination circuit, configured to determine a control mode of the two-stage converter according to a time of the first stage conversion unit outputting the second power or an input current of the first stage conversion unit; and a second driving circuit, configured to output or stop outputting a high-frequency switch signal to the second stage conversion unit according to determination results of the state determination circuit and the mode determination circuit” in combination with the additionally claimed features, as are claimed by Applicant. Re claim 17 and its dependents thereof, the closet prior art (which has been made of record) fail to disclose (by themselves or in combination): “determining a control mode of the two-stage converter according to a time of the first stage conversion unit outputting the second power or an input current of the first stage conversion unit; and outputting or stopping outputting a high-frequency switch signal to the second stage conversion unit according to the operation state of the first stage conversion unit and the control mode of the two-stage converter” in combination with the additionally claimed features, as are claimed by Applicant. Conclusion Examiner's Note: Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAKAISHA JACKSON whose telephone number is (571)270-3111. The examiner can normally be reached on M-F 8:00-5:00. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MONICA LEWIS can be reached on 571-272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LaKaisha Jackson/ Examiner, Art Unit 2838
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Prosecution Timeline

Apr 02, 2024
Application Filed
Jan 06, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
96%
With Interview (+11.3%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 484 resolved cases by this examiner. Grant probability derived from career allow rate.

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