DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This office action is in response to communication files 7/14/2026.
The instant application having application No. 18/624,915 filed on April 2, 2024, presents claims 1-26 for examination. The instant application is continuation of Application 17/977,265, now US patent 11,972,239, which is continuation of Application 17/213,360, now US patent 11,520,569, which is continuation of Application 16/524,381, now US patent 10,990,366, which is continuation of Application 15/727,097 filed October 6, 2017, now US patent 10,416,974.
Status of the Claims
No claim is amended. Claims 1-26 are currently pending in the application.
Response to Amendment
Regarding double patenting rejections: Applicant requested holding the rejections in abeyance.
Regarding 35 U.S.C. § 101 rejection: Applicant's arguments are not persuasive, see the response to arguments section of the office action below. The rejections to the claims 1-26 under 35 U.S.C. § 101 are maintained.
Examiner Notes
Examiner cites particular columns, paragraphs, figures and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1-4, 6-16, and 18-26 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-6, 8-18, and 20-26 of U.S. Patent No. 11,972,239. The table below shows the comparison:
The instant application 18/624,915
US patent 11,972,239 (Appl. No. 17/977,265)
Obvious comparison and comments
1. A computer implemented method comprising:
receiving, by a processor, an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency;
storing, by the processor, during operation of the augmented computer software application as the received message is processed thereby, a data entry in a data store coupled therewith indicative of traversal of a checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one; and
determining, periodically by the processor, that the latency exceeds a threshold and based thereon, adding, by the processor, one or more additional checkpoints along the processing path between the first and second checkpoints.
2. The computer implemented method of claim 1, wherein the determining further comprises: determining, periodically by the processor, that the latency does not exceed the threshold and based thereon, removing, by the processor, one or more previously added checkpoints from the processing path.
3. The computer implemented method of claim 1, wherein the determining further comprises: determining, by the processor, that the latency exceeds the threshold when the latency exceeds an amount of time between new messages arriving at portions of the augmented computer software application defined by the first and second checkpoints.
4. The computer implemented method of claim 1, wherein the determining further comprises: determining, by the processor, that the latency exceeds the threshold when a number of messages awaiting processing by a portion of the augmented computer software application, defined by the first checkpoint located prior to the portion and the second checkpoint located after the portion, exceeds a threshold number of messages.
6. The computer implemented method of claim 1, wherein the determining is performed by the processor as the augmented computer software application processes received messages.
7. The computer implemented method of claim 1, wherein the latency is determined based on a previously processed message.
8. The computer implemented method of claim 1, wherein at least one of the first or second checkpoints includes the one or more additional checkpoints added for a prior received message.
9. The computer implemented method of claim 1, wherein processing performance of the augmented computer software application improves as checkpoints are removed.
10. The computer implemented method of claim 1, wherein the determining whether the latency exceeds the threshold further comprises determining an elapse of time between times when the received message traversed the first checkpoint and when the received message traverses the second checkpoint.
11. The computer implemented method of claim 1, wherein the latency is determined based on data entries stored in the data store and indicative of times when the received message traversed the first and second checkpoints.
12. The computer implemented method of claim 1, wherein the received message is an electronic data transaction request message, and wherein the augmented computer software application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
13. A non-transitory computer-readable medium storing instructions that, when executed by a processor, cause the processor to:
receive an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency;
store, during operation of the augmented computer software application as the received message is processed thereby, a data entry in a data store coupled therewith indicative of traversal of a checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one; and
determine, periodically, that the latency exceeds a threshold and based thereon, adding, by the processor, one or more additional checkpoints along the processing path between the first and second checkpoints via which a subsequently received message will traverse during processing thereof.
14. The non-transitory computer-readable medium of claim 13, wherein the instructions are further executable by the processor to cause the processor to determine, periodically, that the latency does not exceed the threshold and based thereon, removing, by the processor, one or more previously added checkpoints from the processing path.
15. The non-transitory computer-readable medium of claim 13, wherein the instructions are further executable by the processor to cause the processor to determine that the latency exceeds the threshold when the latency exceeds an amount of time between new messages arriving at portions of the augmented computer software application defined by the first and second checkpoints.
16. The non-transitory computer-readable medium of claim 13, wherein the instructions are further executable by the processor to cause the processor to determine that the latency exceeds the threshold when a number of messages awaiting processing by a portion of the augmented computer software application, defined by the first checkpoint located prior to the portion and the second checkpoint located after the portion, exceeds a threshold number of messages.
18. The non-transitory computer-readable medium of claim 13, wherein the determining is performed by the processor as the augmented computer software application processes received messages.
19. The non-transitory computer-readable medium of claim 13, wherein the latency is determined based on a previously processed message.
20. The non-transitory computer-readable medium of claim 13, wherein at least one of the first or second checkpoints includes the one or more additional checkpoints added for a prior received message.
21. The non-transitory computer-readable medium of claim 13, wherein processing performance of the augmented computer software application improves as checkpoints are removed.
22. The non-transitory computer-readable medium of claim 13, wherein the determining whether the latency exceeds the threshold further comprises determining an elapse of time between times when the received message traversed the first checkpoint and when the received message traverses the second checkpoint.
23. The non-transitory computer-readable medium of claim 13, wherein the latency is determined based on data entries stored in the data store and indicative of times when the received message traversed the first and second checkpoints.
24. The non-transitory computer-readable medium of claim 13, wherein the received message is an electronic data transaction request message, and wherein the augmented computer software application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
25. An apparatus comprising:
a processor; and
a memory coupled with the processor and storing computer executable instructions operative to cause the processor to:
receive an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency;
store, during operation of the augmented computer software application as the received message is processed thereby, a data entry in a data store coupled therewith indicative of traversal of a checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one; and
determine, periodically, that the latency exceeds a threshold and based thereon, adding, by the processor, one or more additional checkpoints along the processing path between the first and second checkpoints via which a subsequently received message will traverse during processing thereof.
26. The apparatus of claim 25, wherein the instructions are further executable by the processor to cause the processor to determine, periodically, that the latency does not exceed the threshold and based thereon, remove one or more previously added checkpoints along the processing path.
1. A computer implemented method comprising:
receiving, by a processor, an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency and wherein each of the first and second checkpoints is configured to be enabled or disabled and are initially enabled and, during operation of the augmented computer software application as the received message is processed thereby, a data entry is stored by the processor in a data store coupled therewith indicative of traversal of an enabled checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one; and
determining, periodically by the processor, that the latency exceeds a threshold and based thereon, enabling, by the processor, one or more additional checkpoints along the processing path between the first and second enabled checkpoints via which a subsequently received message will traverse during processing thereof.
2. The computer implemented method of claim 1, wherein the determining further comprises: determining, periodically by the processor, that the latency does not exceed the threshold and based thereon, disabling, by the processor, one or more previously enabled checkpoints along the processing path.
3. The computer implemented method of claim 1, wherein the determining further comprises: determining, by the processor, that the latency exceeds the threshold when the latency exceeds an amount of time between new messages arriving at portions of the application defined by the first and second enabled checkpoints.
4. The computer implemented method of claim 1, wherein the determining further comprises: determining, by the processor, that the latency exceeds the threshold when a number of messages awaiting processing by a portion of the application, defined by the first checkpoint located prior to the portion and the second checkpoint located after the portion, exceeds a threshold number of messages.
5. The computer implemented method of claim 1, wherein the determining is performed by the processor as the computer software application processes received messages.
6. The computer implemented method of claim 1, wherein the latency is determined based on a previously processed message.
8. The computer implemented method of claim 1, wherein at least one of the first or second checkpoints includes the one or more additional checkpoints enabled for a prior received message.
9. The computer implemented method of claim 1, wherein processing performance of the computer software application improves as checkpoints are disabled.
10. The computer implemented method of claim 1, wherein the determining whether the latency exceeds the threshold further comprises determining an elapse of time between times when the received message traversed the first checkpoint and when the received message traverses the second checkpoint.
11. The computer implemented method of claim 1, wherein the latency is determined based on data entries stored in the data store and indicative of times when the received message traversed the first and second checkpoints.
12. The computer implemented method of claim 1, wherein the received message is an electronic data transaction request message, and wherein the computer software application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
13. A non-transitory computer-readable medium storing instructions that, when executed by a processor, cause the processor to:
receive an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency and wherein each of the first and second checkpoints is configured to be enabled or disabled and are initially enabled and, during operation of the augmented computer software application as the received message is processed thereby, a data entry is stored by the processor in a data store coupled therewith indicative of traversal of an enabled checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one; and
determine, periodically, that the latency exceeds a threshold and based thereon, enabling, by the processor, one or more additional checkpoints along the processing path between the first and second enabled checkpoints via which a subsequently received message will traverse during processing thereof.
14. The non-transitory computer-readable medium of claim 13, wherein the instructions are further executable by the processor to cause the processor to determine, periodically, that the latency does not exceed the threshold and based thereon, disabling, by the processor, one or more previously enabled checkpoints along the processing path.
15. The non-transitory computer-readable medium of claim 13, wherein the determining further comprises: determining, by the processor, that the latency exceeds the threshold when the latency exceeds an amount of time between new messages arriving at portions of the application defined by the first and second enabled checkpoints.
16. The non-transitory computer-readable medium of claim 13, wherein the instructions are further executable by the processor to cause the processor to determine that the latency exceeds the threshold when a number of messages awaiting processing by a portion of the application, defined by the first checkpoint located prior to the portion and the second checkpoint located after the portion, exceeds a threshold number of messages.
17. The non-transitory computer-readable medium of claim 13, wherein the determining is performed by the processor as the computer software application processes received messages.
18. The non-transitory computer-readable medium of claim 13, wherein the latency is determined based on a previously processed message.
20. The non-transitory computer-readable medium of claim 13, wherein at least one of the first or second checkpoints includes the one or more additional checkpoints enabled for a prior received message.
21. The non-transitory computer-readable medium of claim 13, wherein processing performance of the computer software application improves as checkpoints are disabled.
22. The non-transitory computer-readable medium of claim 13, wherein the determining whether the latency exceeds the threshold further comprises determining an elapse of time between times when the received message traversed the first checkpoint and when the received message traverses the second checkpoint.
23. The non-transitory computer-readable medium of claim 13, wherein the latency is determined based on data entries stored in the data store and indicative of times when the received message traversed the first and second checkpoints.
24. The non-transitory computer-readable medium of claim 13, wherein the received message is an electronic data transaction request message, and wherein the computer software application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
25. An apparatus comprising:
a processor; and
a memory coupled with the processor and storing computer executable instructions operative to cause the processor to:
receive an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency and wherein each of the first and second checkpoints is configured to be enabled or disabled and are initially enabled and, during operation of the augmented computer software application as the received message is processed thereby, a data entry is stored by the processor in a data store coupled therewith indicative of traversal of an enabled checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one; and
determine, periodically, that the latency exceeds a threshold and based thereon, enabling, by the processor, one or more additional checkpoints along the processing path between the first and second enabled checkpoints via which a subsequently received message will traverse during processing thereof.
26. The apparatus of claim 25, wherein the instructions are further executable by the processor to cause the processor to determine, periodically, that the latency does not exceed the threshold and based thereon, disabling, by the processor, one or more previously enabled checkpoints along the processing path.
Claim 1 is anticipated by claim 1 of the patent.
Claim 2 is anticipated by claim 2 of the patent.
Claim 3 is anticipated by claim 3 of the patent.
Claim 4 is anticipated by claim 4 of the patent.
Claim 6 is anticipated by claim 5 of the patent.
Claim 7 is anticipated by claim 6 of the patent.
Claim 8 is anticipated by claim 8 of the patent.
Claim 9 is anticipated by claim 9 of the patent.
Claim 10 is anticipated by claim 10 of the patent.
Claim 11 is anticipated by claim 11 of the patent.
Claim 12 is anticipated by claim 12 of the patent.
Claim 13 is anticipated by claim 13 of the patent.
Claim 14 is anticipated by claim 14 of the patent.
Claim 15 is anticipated by claim 15 of the patent.
Claim 16 is anticipated by claim 16 of the patent.
Claim 18 is anticipated by claim 17 of the patent.
Claim 19 is anticipated by claim 18 of the patent.
Claim 20 is anticipated by claim 20 of the patent.
Claim 21 is anticipated by claim 21 of the patent.
Claim 22 is anticipated by claim 22 of the patent.
Claim 23 is anticipated by claim 23 of the patent.
Claim 24 is anticipated by claim 24 of the patent.
Claim 25 is anticipated by claim 25 of the patent.
Claim 26 is anticipated by claim 26 of the patent.
Claims 1-4, 6-16, and 18-26 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-6, 8-16, and 18-23 of U.S. Patent No. 11,520,569. The table below shows the comparison:
The instant application 18/624,915
US patent 11,520,569 (Appl. No. 17/213,360)
Obvious comparison and comments
1. A computer implemented method comprising:
receiving, by a processor, an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency;
storing, by the processor, during operation of the augmented computer software application as the received message is processed thereby, a data entry in a data store coupled therewith indicative of traversal of a checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one; and
determining, periodically by the processor, that the latency exceeds a threshold and based thereon, adding, by the processor, one or more additional checkpoints along the processing path between the first and second checkpoints.
2. The computer implemented method of claim 1, wherein the determining further comprises: determining, periodically by the processor, that the latency does not exceed the threshold and based thereon, removing, by the processor, one or more previously added checkpoints from the processing path.
3. The computer implemented method of claim 1, wherein the determining further comprises: determining, by the processor, that the latency exceeds the threshold when the latency exceeds an amount of time between new messages arriving at portions of the augmented computer software application defined by the first and second checkpoints.
4. The computer implemented method of claim 1, wherein the determining further comprises: determining, by the processor, that the latency exceeds the threshold when a number of messages awaiting processing by a portion of the augmented computer software application, defined by the first checkpoint located prior to the portion and the second checkpoint located after the portion, exceeds a threshold number of messages.
6. The computer implemented method of claim 1, wherein the determining is performed by the processor as the augmented computer software application processes received messages.
7. The computer implemented method of claim 1, wherein the latency is determined based on a previously processed message.
8. The computer implemented method of claim 1, wherein at least one of the first or second checkpoints includes the one or more additional checkpoints added for a prior received message.
9. The computer implemented method of claim 1, wherein processing performance of the augmented computer software application improves as checkpoints are removed.
10. The computer implemented method of claim 1, wherein the determining whether the latency exceeds the threshold further comprises determining an elapse of time between times when the received message traversed the first checkpoint and when the received message traverses the second checkpoint.
11. The computer implemented method of claim 1, wherein the latency is determined based on data entries stored in the data store and indicative of times when the received message traversed the first and second checkpoints.
12. The computer implemented method of claim 1, wherein the received message is an electronic data transaction request message, and wherein the augmented computer software application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
13. A non-transitory computer-readable medium storing instructions that, when executed by a processor, cause the processor to:
receive an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency;
store, during operation of the augmented computer software application as the received message is processed thereby, a data entry in a data store coupled therewith indicative of traversal of a checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one; and
determine, periodically, that the latency exceeds a threshold and based thereon, adding, by the processor, one or more additional checkpoints along the processing path between the first and second checkpoints via which a subsequently received message will traverse during processing thereof.
14. The non-transitory computer-readable medium of claim 13, wherein the instructions are further executable by the processor to cause the processor to determine, periodically, that the latency does not exceed the threshold and based thereon, removing, by the processor, one or more previously added checkpoints from the processing path.
15. The non-transitory computer-readable medium of claim 13, wherein the instructions are further executable by the processor to cause the processor to determine that the latency exceeds the threshold when the latency exceeds an amount of time between new messages arriving at portions of the augmented computer software application defined by the first and second checkpoints.
16. The non-transitory computer-readable medium of claim 13, wherein the instructions are further executable by the processor to cause the processor to determine that the latency exceeds the threshold when a number of messages awaiting processing by a portion of the augmented computer software application, defined by the first checkpoint located prior to the portion and the second checkpoint located after the portion, exceeds a threshold number of messages.
18. The non-transitory computer-readable medium of claim 13, wherein the determining is performed by the processor as the augmented computer software application processes received messages.
19. The non-transitory computer-readable medium of claim 13, wherein the latency is determined based on a previously processed message.
20. The non-transitory computer-readable medium of claim 13, wherein at least one of the first or second checkpoints includes the one or more additional checkpoints added for a prior received message.
21. The non-transitory computer-readable medium of claim 13, wherein processing performance of the augmented computer software application improves as checkpoints are removed.
22. The non-transitory computer-readable medium of claim 13, wherein the determining whether the latency exceeds the threshold further comprises determining an elapse of time between times when the received message traversed the first checkpoint and when the received message traverses the second checkpoint.
23. The non-transitory computer-readable medium of claim 13, wherein the latency is determined based on data entries stored in the data store and indicative of times when the received message traversed the first and second checkpoints.
24. The non-transitory computer-readable medium of claim 13, wherein the received message is an electronic data transaction request message, and wherein the augmented computer software application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
25. An apparatus comprising:
a processor; and
a memory coupled with the processor and storing computer executable instructions operative to cause the processor to:
receive an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency;
store, during operation of the augmented computer software application as the received message is processed thereby, a data entry in a data store coupled therewith indicative of traversal of a checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one; and
determine, periodically, that the latency exceeds a threshold and based thereon, adding, by the processor, one or more additional checkpoints along the processing path between the first and second checkpoints via which a subsequently received message will traverse during processing thereof.
26. The apparatus of claim 25, wherein the instructions are further executable by the processor to cause the processor to determine, periodically, that the latency does not exceed the threshold and based thereon, remove one or more previously added checkpoints along the processing path.
1. A computer implemented method comprising:
receiving, by a processor, an augmented computer software application operative to process a received message via a plurality of processing paths through which the received message traverses during processing, the augmented computer software application including a previously inserted plurality of checkpoints along at least one of the plurality of processing paths such that the received message traverses at least one of the plurality of checkpoints before traversing at least one other of the plurality of checkpoints, wherein each of the plurality of checkpoints is enabled or disabled and further wherein during operation of the augmented computer software application as the received message is processed by the computer software application, a data entry is stored by the processor in a data store coupled therewith indicative of traversal of an enabled one of the plurality of checkpoints and no data entry is stored by the processor in the data store indicative of traversal of a disabled one of the plurality of checkpoints;
determining, periodically by the processor, that a message processing latency between first and second enabled checkpoints of the plurality of checkpoints does or does not exceed a threshold and based thereon: when the message processing latency is determined not to exceed the threshold, disabling, by the processor, those of the plurality of checkpoints through which a subsequently received message traverses between the first and second enabled checkpoints as the subsequently received message is processed by the computer software application; and when the message processing latency is determined to exceed the threshold, enabling, by the processor, at least one of the plurality of checkpoints through which the subsequently received message traverses between the first and second enabled checkpoints as the subsequently received message is processed by the computer software application.
1. …. when the message processing latency is determined not to exceed the threshold, disabling, by the processor, those of the plurality of checkpoints through which a subsequently received message traverses between the first and second enabled checkpoints as the subsequently received message is processed by the computer software application; …
2. The computer implemented method of claim 1, wherein the determining further comprises: determining, by the processor, that the message processing latency exceeds the threshold when the latency between the first and second enabled checkpoints exceeds an amount of time between new messages arriving at a portion of the application defined by the first and second enabled checkpoints..
3. The computer implemented method of claim 1, wherein the determining further comprises: determining, by the processor, that the message processing latency exceeds the threshold when a number of messages awaiting processing by a portion of the application defined by the first and second enabled checkpoints exceeds a threshold number of messages.
4. The computer implemented method of claim 1, wherein the determining is performed by the processor as the computer software application processes received messages.
5. The computer implemented method of claim 1, wherein the message processing latency is determined based on a previously processed message.
6. The computer implemented method of claim 1, wherein the enabling further comprises augmenting the computer software application to insert an additional checkpoint.
8. The computer implemented method of claim 1, wherein processing performance of the computer software application improves as checkpoints are disabled.
9. The computer implemented method of claim 1, wherein the determining whether the message processing latency between the first and second enabled checkpoints exceeds the threshold further comprises determining an elapse of time between times when the received message traversed the first and second enabled checkpoints.
10. The computer implemented method of claim 1, wherein the message processing latency between the first and second enabled checkpoints is determined based on data entries stored in the data store and indicative of times when the received message traversed the first and second enabled checkpoints.
11. The computer implemented method of claim 1, wherein each received message is an electronic data transaction request message, and wherein the computer software application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
12. A non-transitory computer-readable medium storing instructions that, when executed by a processor, cause the processor to:
receive an augmented computer software application operative to process a received message via a plurality of processing paths through which the received message traverses during processing, the augmented computer software application including a previously inserted plurality of checkpoints along at least one of the plurality of processing paths such that the received message traverses at least one of the plurality of checkpoints before traversing at least one other of the plurality of checkpoints, wherein each of the plurality of checkpoints is enabled or disabled and further wherein during operation of the augmented computer software application as the received message is processed by the computer software application, a data entry is stored by the processor in a data store coupled therewith indicative of traversal of an enabled one of the plurality of checkpoints and no data entry is stored by the processor in the data store indicative of traversal of a disabled one of the plurality of checkpoints;
determine, periodically, that a message processing latency between first and second enabled checkpoints of the plurality of checkpoints does or does not exceed a threshold and based thereon: when the message processing latency is determined not to exceed the threshold, disable those of the plurality of checkpoints through which a subsequently received message traverses between the first and second enabled checkpoints as the subsequently received message is processed by the computer software application; and when the message processing latency is determined to exceed the threshold, enable at least one of the plurality of checkpoints through which the subsequently received message traverses between the first and second enabled checkpoints as the subsequently received message is processed by the computer software application.
12. … when the message processing latency is determined not to exceed the threshold, disable those of the plurality of checkpoints through which a subsequently received message traverses between the first and second enabled checkpoints as the subsequently received message is processed by the computer software application;…
13. The non-transitory computer-readable medium of claim 12, wherein the message processing latency is determined to exceed the threshold when the latency between the first and second enabled checkpoints exceeds an amount of time between new messages arriving at a portion of the application defined by the first and second enabled checkpoints.
14. The non-transitory computer-readable medium of claim 12, wherein the message processing latency is determined to exceed the threshold when a number of messages awaiting processing by a portion of the application defined by the first and second enabled checkpoints exceeds a threshold number of messages.
15. The non-transitory computer-readable medium of claim 12, wherein the determination is performed as the computer software application processes received messages.
16. The non-transitory computer-readable medium of claim 12, wherein the message processing latency is determined based on a previously processed message.
18. The non-transitory computer-readable medium of claim 12, wherein at least one of the first or second enabled checkpoints includes the enabled at least one of the plurality of checkpoints enabled for a prior received message.
19. The non-transitory computer-readable medium of claim 12, wherein processing performance of the computer software application improves as checkpoints are disabled.
20. The non-transitory computer-readable medium of claim 12, wherein the determination as to whether the message processing latency between the first and second enabled checkpoints exceeds the threshold further comprises a determination of an elapse of time between times when the received message traversed the first and second enabled checkpoints.
21. The non-transitory computer-readable medium of claim 12, wherein the message processing latency between the first and second enabled checkpoints is determined based on data entries stored in the data store and indicative of times when the received message traversed the first and second enabled checkpoints.
22. The non-transitory computer-readable medium of claim 12, wherein each received message is an electronic data transaction request message, and wherein the computer software application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
23. An apparatus comprising: a processor; and a memory coupled with the processor and storing computer executable instructions operative to cause the processor to:
receive an augmented computer software application operative to process a received message via a plurality of processing paths through which the received message traverses during processing, the augmented computer software application including a previously inserted plurality of checkpoints along at least one of the plurality of processing paths such that the received message traverses at least one of the plurality of checkpoints before traversing at least one other of the plurality of checkpoints, wherein each of the plurality of checkpoints is enabled or disabled and further wherein during operation of the augmented computer software application as the received message is processed by the computer software application, a data entry is stored by the processor in a data store coupled therewith indicative of traversal of an enabled one of the plurality of checkpoints and no data entry is stored by the processor in the data store indicative of traversal of a disabled one of the plurality of checkpoints;
determine, periodically, that a message processing latency between first and second enabled checkpoints of the plurality of checkpoints does or does not exceed a threshold and based thereon: when the message processing latency is determined not to exceed the threshold, disable those of the plurality of checkpoints through which a subsequently received message traverses between the first and second enabled checkpoints as the subsequently received message is processed by the computer software application; and when the message processing latency is determined to exceed the threshold, enable at least one of the plurality of checkpoints through which the subsequently received message traverses between the first and second enabled checkpoints as the subsequently received message is processed by the computer software application..
23. … when the message processing latency is determined not to exceed the threshold, disable those of the plurality of checkpoints through which a subsequently received message traverses between the first and second enabled checkpoints as the subsequently received message is processed by the computer software application; …
Claim 1 is anticipated by claim 1 of the patent.
Claim 2 is anticipated by claim 1 of the patent.
Claim 3 is anticipated by claim 2 of the patent.
Claim 4 is anticipated by claim 3 of the patent.
Claim 6 is anticipated by claim 4 of the patent.
Claim 7 is anticipated by claim 5 of the patent.
Claim 8 is anticipated by claim 6 of the patent.
Claim 9 is anticipated by claim 8 of the patent.
Claim 10 is anticipated by claim 9 of the patent.
Claim 11 is anticipated by claim 10 of the patent.
Claim 12 is anticipated by claim 11 of the patent.
Claim 13 is anticipated by claim 12 of the patent.
Claim 14 is anticipated by claim 12 of the patent.
Claim 15 is anticipated by claim 13 of the patent.
Claim 16 is anticipated by claim 14 of the patent.
Claim 18 is anticipated by claim 15 of the patent.
Claim 19 is anticipated by claim 16 of the patent.
Claim 20 is anticipated by claim 18 of the patent.
Claim 21 is anticipated by claim 19 of the patent.
Claim 22 is anticipated by claim 20 of the patent.
Claim 23 is anticipated by claim 21 of the patent.
Claim 24 is anticipated by claim 22 of the patent.
Claim 25 is anticipated by claim 23 of the patent.
Claim 26 is anticipated by claim 23 of the patent.
Claims 1-4, 6-7, 9-16, 18-19, and 21-26 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 4-10, and 12-15 of U.S. Patent No. 10,990,366. The table below shows the comparison:
The instant application 18/624,915
US patent 10,990,366 (Appl. No. 16/524,381)
Obvious comparison and comments
1. A computer implemented method comprising:
receiving, by a processor, an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency;
storing, by the processor, during operation of the augmented computer software application as the received message is processed thereby, a data entry in a data store coupled therewith indicative of traversal of a checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one; and
determining, periodically by the processor, that the latency exceeds a threshold and based thereon, adding, by the processor, one or more additional checkpoints along the processing path between the first and second checkpoints.
2. The computer implemented method of claim 1, wherein the determining further comprises: determining, periodically by the processor, that the latency does not exceed the threshold and based thereon, removing, by the processor, one or more previously added checkpoints from the processing path.
3. The computer implemented method of claim 1, wherein the determining further comprises: determining, by the processor, that the latency exceeds the threshold when the latency exceeds an amount of time between new messages arriving at portions of the augmented computer software application defined by the first and second checkpoints.
4. The computer implemented method of claim 1, wherein the determining further comprises: determining, by the processor, that the latency exceeds the threshold when a number of messages awaiting processing by a portion of the augmented computer software application, defined by the first checkpoint located prior to the portion and the second checkpoint located after the portion, exceeds a threshold number of messages.
6. The computer implemented method of claim 1, wherein the determining is performed by the processor as the augmented computer software application processes received messages.
7. The computer implemented method of claim 1, wherein the latency is determined based on a previously processed message.
9. The computer implemented method of claim 1, wherein processing performance of the augmented computer software application improves as checkpoints are removed.
10. The computer implemented method of claim 1, wherein the determining whether the latency exceeds the threshold further comprises determining an elapse of time between times when the received message traversed the first checkpoint and when the received message traverses the second checkpoint.
11. The computer implemented method of claim 1, wherein the latency is determined based on data entries stored in the data store and indicative of times when the received message traversed the first and second checkpoints.
12. The computer implemented method of claim 1, wherein the received message is an electronic data transaction request message, and wherein the augmented computer software application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
13. A non-transitory computer-readable medium storing instructions that, when executed by a processor, cause the processor to:
receive an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency;
store, during operation of the augmented computer software application as the received message is processed thereby, a data entry in a data store coupled therewith indicative of traversal of a checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one; and
determine, periodically, that the latency exceeds a threshold and based thereon, adding, by the processor, one or more additional checkpoints along the processing path between the first and second checkpoints via which a subsequently received message will traverse during processing thereof.
14. The non-transitory computer-readable medium of claim 13, wherein the instructions are further executable by the processor to cause the processor to determine, periodically, that the latency does not exceed the threshold and based thereon, removing, by the processor, one or more previously added checkpoints from the processing path.
15. The non-transitory computer-readable medium of claim 13, wherein the instructions are further executable by the processor to cause the processor to determine that the latency exceeds the threshold when the latency exceeds an amount of time between new messages arriving at portions of the augmented computer software application defined by the first and second checkpoints.
16. The non-transitory computer-readable medium of claim 13, wherein the instructions are further executable by the processor to cause the processor to determine that the latency exceeds the threshold when a number of messages awaiting processing by a portion of the augmented computer software application, defined by the first checkpoint located prior to the portion and the second checkpoint located after the portion, exceeds a threshold number of messages.
18. The non-transitory computer-readable medium of claim 13, wherein the determining is performed by the processor as the augmented computer software application processes received messages.
19. The non-transitory computer-readable medium of claim 13, wherein the latency is determined based on a previously processed message.
21. The non-transitory computer-readable medium of claim 13, wherein processing performance of the augmented computer software application improves as checkpoints are removed.
22. The non-transitory computer-readable medium of claim 13, wherein the determining whether the latency exceeds the threshold further comprises determining an elapse of time between times when the received message traversed the first checkpoint and when the received message traverses the second checkpoint.
23. The non-transitory computer-readable medium of claim 13, wherein the latency is determined based on data entries stored in the data store and indicative of times when the received message traversed the first and second checkpoints.
24. The non-transitory computer-readable medium of claim 13, wherein the received message is an electronic data transaction request message, and wherein the augmented computer software application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
25. An apparatus comprising:
a processor; and
a memory coupled with the processor and storing computer executable instructions operative to cause the processor to:
receive an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency;
store, during operation of the augmented computer software application as the received message is processed thereby, a data entry in a data store coupled therewith indicative of traversal of a checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one; and
determine, periodically, that the latency exceeds a threshold and based thereon, adding, by the processor, one or more additional checkpoints along the processing path between the first and second checkpoints via which a subsequently received message will traverse during processing thereof.
26. The apparatus of claim 25, wherein the instructions are further executable by the processor to cause the processor to determine, periodically, that the latency does not exceed the threshold and based thereon, remove one or more previously added checkpoints along the processing path.
1. A computer implemented method of
monitoring message processing by an application in a data transaction processing system, the method comprising:
storing, by a processor, in a data store, a data entry indicative of each received message that traverses an enabled checkpoint of a plurality of checkpoints in the application, wherein each of the plurality of checkpoints is enabled or disabled, and further wherein at least a first checkpoint and a second checkpoint of the plurality of checkpoints are enabled and a third checkpoint located between the first checkpoint and the second checkpoint in a message processing sequence is disabled;
detecting, by the processor coupled with the data store and the application, that the application has received a message at the second checkpoint in the message processing sequence; determining, by the processor, from the received message that a message processing latency for the message processing sequence between the first checkpoint and the second checkpoint exceeds an amount of time; and enabling, by the processor, the third checkpoint for storage of data entries for subsequent received messages; and wherein each received message is an electronic data transaction request message, and wherein the application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
4. The computer implemented method of claim 1, further comprising: detecting, by the processor coupled with the data store and the application, that the application has received a message at a sixth enabled checkpoint in the message processing sequence, the application including fourth, fifth, and sixth enabled checkpoints ordered sequentially in the message processing sequence; determining, by the processor, from the received message that a message processing latency for the message processing sequence between the first checkpoint and the second checkpoint is below a latency threshold associated with the fourth and sixth enabled checkpoints; and disabling, by the processor, the fifth enabled checkpoint for storage of data entries for subsequent received messages.
5. The computer implemented method of claim 4, wherein determining further comprises: determining, by the processor, that the message processing latency between the fourth and sixth enabled checkpoints is less than an amount of time between new messages arriving at a portion of the application defined by the fourth and sixth enabled checkpoints.
6. The computer implemented method of claim 4, wherein determining further comprises: determining, by the processor that a number of messages awaiting processing by a portion of the application defined by the fourth and sixth enabled checkpoints is less than a threshold number of messages.
Claim 5 or claim 6 cited above.
10. The computer implemented method of claim 1, wherein the message processing latency between two enabled checkpoints is determined based on data entries stored in the data store and indicative of times when a received message traversed the two enabled checkpoints.
7. The computer implemented method of claim 4, wherein disabling the fifth enabled checkpoint reduces an amount of data stored in the data store.
8. The computer implemented method of claim 4, wherein disabling the fifth enabled checkpoint reduces an amount of storage space necessary to store the data in the data store.
9. The computer implemented method of claim 1, wherein determining whether a message processing latency between two enabled checkpoints of the plurality of checkpoints exceeds the amount of time comprises determining an elapse of time between times when a received message traversed the two enabled checkpoints.
10. The computer implemented method of claim 1, wherein the message processing latency between two enabled checkpoints is determined based on data entries stored in the data store and indicative of times when a received message traversed the two enabled checkpoints.
1. …wherein each received message is an electronic data transaction request message, and wherein the application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
12. A non-transitory computer-readable medium storing instructions for
monitoring message processing by an application in a data transaction processing system that, when executed by a processor, cause the processor to:
store, in a data store, a data entry indicative of each received message that traverses an enabled checkpoint of a plurality of checkpoints in the application, wherein each of the plurality of checkpoints is enabled or disabled, and further wherein at least a first checkpoint and a second checkpoint of the plurality of checkpoints are enabled and a third checkpoint located between the first checkpoint and the second checkpoint in a message processing sequence is disabled;
detect that the application has received a message at the second checkpoint in the message processing sequence; determine from the received message that a message processing latency for the message processing sequence between the first checkpoint and the second checkpoint exceeds an amount of time; and enable the third checkpoint for storage of data entries for subsequent received messages; and wherein each received message is an electronic data transaction request message, and wherein the application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
15. The non-transitory computer-readable medium of claim 12, wherein the instructions are further configured to cause the processor to: detect that the application has received a message at a sixth enabled checkpoint in the message processing sequence, the application including fourth, fifth, and sixth enabled checkpoints ordered sequentially in the message processing sequence; determine from the received message that a message processing latency for the message processing sequence between the first checkpoint and the second checkpoint is below a latency threshold associated with the fourth and sixth enabled checkpoints; and disable the fifth enabled checkpoint for storage of data entries for subsequent received messages.
13. The non-transitory computer-readable medium of claim 12, wherein the instructions are further configured to cause the processor to determine that the message processing latency between the first and second enabled checkpoints exceeds an amount of time between new messages arriving at a portion of the application defined by the first and second enabled checkpoints.
14. The non-transitory computer-readable medium of claim 12, wherein the instructions are further configured to cause the processor to determine that a number of messages awaiting processing by a portion of the application defined by the first and second enabled checkpoints exceeds a threshold number of messages.
Claim 13 or claim 14 cited above.
Claim 10 cited above for instant claim 7.
Claim 7 or claim 8 cited above for instant claim 9
Claim 9 cited above for instant claim 10.
Claim 10 cited above for instant claim 11.
12. … wherein each received message is an electronic data transaction request message, and wherein the application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
.
Claim 12 cited above for instant claim 13. Although claim 12 does not explicitly recite an apparatus/computer, all necessary components of a computer, such as a processor, memory, are recited, therefore, an apparatus is implied.
Claim 15 cited above for instant claim 14.
Claim 1 is anticipated by claim 1 of the patent.
Claim 2 is anticipated by claim 4 of the patent.
Claim 3 is obvious over claim 5 of the patent.
Claim 4 is obvious over claim 6 of the patent.
Claim 6 is anticipated by claim 5 or claim 6 of the patent.
Claim 7 is anticipated by claim 10 of the patent.
Claim 9 is obvious over claim 7 or claim 8 of the patent.
Claim 10 is anticipated by claim 9 of the patent.
Claim 11 is anticipated by claim 10 of the patent.
Claim 12 is anticipated by claim 1 of the patent.
Claim 13 is anticipated by claim 12 of the patent.
Claim 14 is anticipated by claim 15 of the patent.
Claim 15 is anticipated by claim 13 of the patent.
Claim 16 is anticipated by claim 14 of the patent.
Claim 18 is anticipated by claim 13 or claim 14 of the patent.
Claim 19 is anticipated by claim 10 of the patent.
Claim 21 is obvious over claim 7 or claim 8 of the patent.
Claim 22 is anticipated by claim 9 of the patent.
Claim 23 is anticipated by claim 10 of the patent.
Claim 24 is anticipated by claim 12 of the patent.
Claim 25 is obvious over claim 12 of the patent.
Claim 26 is anticipated by claim 15 of the patent.
Claims 1-4, 6-7, 9-16, 18-19, and 21-26 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 4-6, 8-12, and 18 of U.S. Patent No. 10,416,974 . The table below shows the comparison:
The instant application 18/624,915
US patent 10,416,974 (Appl. No. 15/727,097)
Obvious comparison and comments
1. A computer implemented method comprising:
receiving, by a processor, an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency;
storing, by the processor, during operation of the augmented computer software application as the received message is processed thereby, a data entry in a data store coupled therewith indicative of traversal of a checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one; and
determining, periodically by the processor, that the latency exceeds a threshold and based thereon, adding, by the processor, one or more additional checkpoints along the processing path between the first and second checkpoints.
2. The computer implemented method of claim 1, wherein the determining further comprises: determining, periodically by the processor, that the latency does not exceed the threshold and based thereon, removing, by the processor, one or more previously added checkpoints from the processing path.
3. The computer implemented method of claim 1, wherein the determining further comprises: determining, by the processor, that the latency exceeds the threshold when the latency exceeds an amount of time between new messages arriving at portions of the augmented computer software application defined by the first and second checkpoints.
4. The computer implemented method of claim 1, wherein the determining further comprises: determining, by the processor, that the latency exceeds the threshold when a number of messages awaiting processing by a portion of the augmented computer software application, defined by the first checkpoint located prior to the portion and the second checkpoint located after the portion, exceeds a threshold number of messages.
6. The computer implemented method of claim 1, wherein the determining is performed by the processor as the augmented computer software application processes received messages.
7. The computer implemented method of claim 1, wherein the latency is determined based on a previously processed message.
9. The computer implemented method of claim 1, wherein processing performance of the augmented computer software application improves as checkpoints are removed.
10. The computer implemented method of claim 1, wherein the determining whether the latency exceeds the threshold further comprises determining an elapse of time between times when the received message traversed the first checkpoint and when the received message traverses the second checkpoint.
11. The computer implemented method of claim 1, wherein the latency is determined based on data entries stored in the data store and indicative of times when the received message traversed the first and second checkpoints.
12. The computer implemented method of claim 1, wherein the received message is an electronic data transaction request message, and wherein the augmented computer software application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
13. A non-transitory computer-readable medium storing instructions that, when executed by a processor, cause the processor to:
receive an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency;
store, during operation of the augmented computer software application as the received message is processed thereby, a data entry in a data store coupled therewith indicative of traversal of a checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one; and
determine, periodically, that the latency exceeds a threshold and based thereon, adding, by the processor, one or more additional checkpoints along the processing path between the first and second checkpoints via which a subsequently received message will traverse during processing thereof.
14. The non-transitory computer-readable medium of claim 13, wherein the instructions are further executable by the processor to cause the processor to determine, periodically, that the latency does not exceed the threshold and based thereon, removing, by the processor, one or more previously added checkpoints from the processing path.
15. The non-transitory computer-readable medium of claim 13, wherein the instructions are further executable by the processor to cause the processor to determine that the latency exceeds the threshold when the latency exceeds an amount of time between new messages arriving at portions of the augmented computer software application defined by the first and second checkpoints.
16. The non-transitory computer-readable medium of claim 13, wherein the instructions are further executable by the processor to cause the processor to determine that the latency exceeds the threshold when a number of messages awaiting processing by a portion of the augmented computer software application, defined by the first checkpoint located prior to the portion and the second checkpoint located after the portion, exceeds a threshold number of messages.
18. The non-transitory computer-readable medium of claim 13, wherein the determining is performed by the processor as the augmented computer software application processes received messages.
19. The non-transitory computer-readable medium of claim 13, wherein the latency is determined based on a previously processed message.
21. The non-transitory computer-readable medium of claim 13, wherein processing performance of the augmented computer software application improves as checkpoints are removed.
22. The non-transitory computer-readable medium of claim 13, wherein the determining whether the latency exceeds the threshold further comprises determining an elapse of time between times when the received message traversed the first checkpoint and when the received message traverses the second checkpoint.
23. The non-transitory computer-readable medium of claim 13, wherein the latency is determined based on data entries stored in the data store and indicative of times when the received message traversed the first and second checkpoints.
24. The non-transitory computer-readable medium of claim 13, wherein the received message is an electronic data transaction request message, and wherein the augmented computer software application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
25. An apparatus comprising:
a processor; and
a memory coupled with the processor and storing computer executable instructions operative to cause the processor to:
receive an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency;
store, during operation of the augmented computer software application as the received message is processed thereby, a data entry in a data store coupled therewith indicative of traversal of a checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one; and
determine, periodically, that the latency exceeds a threshold and based thereon, adding, by the processor, one or more additional checkpoints along the processing path between the first and second checkpoints via which a subsequently received message will traverse during processing thereof.
26. The apparatus of claim 25, wherein the instructions are further executable by the processor to cause the processor to determine, periodically, that the latency does not exceed the threshold and based thereon, remove one or more previously added checkpoints along the processing path.
1. A computer implemented method of
monitoring message processing by an application in a data transaction processing system, the method comprising: detecting, by a processor coupled with the application, that the application has received a message of a plurality of messages for processing as each message of the plurality of messages is received by the application, the application including a plurality of checkpoints, wherein each of the plurality of checkpoints is enabled or disabled, and further wherein at least first, second and third checkpoints of the plurality of checkpoints are enabled, the third enabled checkpoint being located between the first and second enabled checkpoints in a message processing sequence; detecting, by the processor, that a message processing latency between the first and second enabled checkpoints of the plurality of checkpoints is less than an amount of time between new messages arriving at a portion of the application defined by the first and second enabled checkpoints and further detecting that a number of messages awaiting processing by the portion of the application defined by the first and second enabled checkpoints exceeds a threshold number of messages, and based thereon, disabling, by the processor, the third enabled checkpoint; and upon a received message of the plurality of messages traversing an enabled checkpoint of the plurality of checkpoints, storing, by the processor, in a data store, a data entry indicative of the received message, the traversed enabled checkpoint, and a time when the received message traversed the enabled checkpoint.
11. The computer implemented method of claim 1, further comprising, enabling the third checkpoint when the message processing latency between the first and second enabled checkpoints of the plurality of checkpoints ceases to be less than an amount of time between new messages arriving at a portion of the application defined by the first and second enabled checkpoints or a number of messages awaiting processing by the portion of the application defined by the first and second enabled checkpoints is less than a threshold number of messages.
1. …. detecting, by the processor, that a message processing latency between the first and second enabled checkpoints of the plurality of checkpoints is less than an amount of time between new messages arriving at a portion of the application defined by the first and second enabled checkpoints …, and based thereon, disabling, by the processor, the third enabled checkpoint; …
4. The computer implemented method of claim 3, wherein the other condition comprises one of: (i) the message processing latency between the fourth and fifth enabled checkpoints exceeds a latency threshold associated with the fourth and fifth enabled checkpoints; (ii) the message processing latency between the fourth and fifth enabled checkpoints exceeds a message processing latency between a different pair of enabled checkpoints of the plurality of checkpoints; (iii) the message processing latency between the fourth and fifth enabled checkpoints exceeds an amount of time between new messages arriving at a portion of the application defined by the fourth and fifth enabled checkpoints; or (iv) a number of messages awaiting processing by a portion of the application defined by the first and second enabled checkpoints exceeds a threshold number of messages.
Claim 4 cited above for instant claim 3.
Claim 1 cited above for instant claim 1. Claim 1 recites a processor that performs all processes.
9. The computer implemented method of claim 1, wherein the message processing latency between two enabled checkpoints is determined based on data entries stored in the data store and indicative of times when a received message traversed the two enabled checkpoints.
5. The computer implemented method of claim 1, wherein disabling the third checkpoint reduces an amount of data stored in the data store.
6. The computer implemented method of claim 1, wherein disabling the third checkpoint reduces an amount of storage space necessary to store the data store.
8. The computer implemented method of claim 1, wherein detecting whether a message processing latency between two enabled checkpoints of the plurality of checkpoints is less than an amount of time between new messages arriving at a portion of the application defined by the first and second enabled checkpoints comprises determining an elapse of time between times when a received message traversed the two enabled checkpoints.
Claim 9 cited above for instant claim 7.
10. The computer implemented method of claim 1, wherein each message is an electronic data transaction request message, and wherein the application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.
12. A non-transitory computer-readable medium storing instructions for
monitoring message processing by an application in a data transaction processing system that, when executed by a processor, cause the processor to: detect that the application has received a message of a plurality of messages for processing as each message of the plurality of messages is received by the application, the application including a plurality of checkpoints, wherein each of the plurality of checkpoints is enabled or disabled, and further wherein at least first, second and third checkpoints of the plurality of checkpoints are enabled, the third enabled checkpoint being located between the first and second enabled checkpoints in a message processing sequence; detect that a message processing latency between the first and second enabled checkpoints of the plurality of checkpoints is less than an amount of time between new messages arriving at a portion of the application defined by the first and second enabled checkpoints and further detect that a number of messages awaiting processing by the portion of the application defined by the first and second enabled checkpoints exceeds a threshold number of messages, and based thereon, disable the third enabled checkpoint; and upon a received message of the plurality of messages traversing an enabled checkpoint of the plurality of checkpoints, store, in a data store, a data entry indicative of the received message, the traversed enabled checkpoint, and a time when the received message traversed the enabled checkpoint.
11. The computer implemented method of claim 1, further comprising, enabling the third checkpoint when the message processing latency between the first and second enabled checkpoints of the plurality of checkpoints ceases to be less than an amount of time between new messages arriving at a portion of the application defined by the first and second enabled checkpoints or a number of messages awaiting processing by the portion of the application defined by the first and second enabled checkpoints is less than a threshold number of messages.
12. … detect that a message processing latency between the first and second enabled checkpoints of the plurality of checkpoints is less than an amount of time between new messages arriving at a portion of the application defined by the first and second enabled checkpoints …, and based thereon, disable the third enabled checkpoint;…
Claim 4 condition (iii) cited above for instant claim 3.
Claim 4 condition (iv) cited above for instant claim 3.
Claim 12 cited above for instant claim 13. Claim 12 recites a processor that performs all processes..
Claim 9 cited above for instant claim 7.
Claim 5 or claim 6 cited above for instant claim 9.
Claim 8 cited above for instant claim 10.
Claim 9 cited above for instant claim 7.
Claim 10 cited above for instant claim 12.
18. A computer system for
monitoring message processing by an application in a data transaction processing system, the computer system comprising: means for detecting that the application has received a message of a plurality of messages for processing as each message of the plurality of messages is received by the application, the application including a plurality of checkpoints, wherein each of the plurality of checkpoints is enabled or disabled, and further wherein at least first, second and third checkpoints of the plurality of checkpoints are enabled, the third enabled checkpoint being located between the first and second enabled checkpoints in a message processing sequence; means for detecting that a message processing latency between the first and second enabled checkpoints of the plurality of checkpoints is less than an amount of time between new messages arriving at a portion of the application defined by the first and second enabled checkpoints and for further detecting that a number of messages awaiting processing by the portion of the application defined by the first and second enabled checkpoints exceeds a threshold number of messages, and based thereon, means for disabling the third enabled checkpoint; and means for, upon a received message of the plurality of messages traversing an enabled checkpoint of the plurality of checkpoints, storing in a data store, a data entry indicative of the received message, the traversed enabled checkpoint, and a time when the received message traversed the enabled checkpoint.
11. The computer implemented method of claim 1, further comprising, enabling the third checkpoint when the message processing latency between the first and second enabled checkpoints of the plurality of checkpoints ceases to be less than an amount of time between new messages arriving at a portion of the application defined by the first and second enabled checkpoints or a number of messages awaiting processing by the portion of the application defined by the first and second enabled checkpoints is less than a threshold number of messages.
18. … means for detecting that a message processing latency between the first and second enabled checkpoints of the plurality of checkpoints is less than an amount of time between new messages arriving at a portion of the application defined by the first and second enabled checkpoints …, and based thereon, means for disabling the third enabled checkpoint; …
Claim 1 is anticipated by claims 1 and 11 of the patent.
Claim 2 is anticipated by claim 1 of the patent.
Claim 3 is anticipated by claim 4 of the patent.
Claim 4 is anticipated by claim 4 of the patent.
Claim 6 is anticipated by claim 1 of the patent.
Claim 7 is anticipated by claim 9 of the patent.
Claim 9 is anticipated by claim 5 or claim 6 of the patent.
Claim 10 is obvious over claim 8 of the patent.
Claim 11 is anticipated by claim 9 of the patent.
Claim 12 is anticipated by claim 10 of the patent.
Claim 13 is anticipated by claims 12 and 11 of the patent.
Claim 14 is anticipated by claim 12 of the patent.
Claim 15 is anticipated by claim 4 of the patent.
Claim 16 is anticipated by claim 4 of the patent.
Claim 18 is anticipated by claim 12 of the patent.
Claim 19 is anticipated by claim 9 of the patent.
Claim 21 is anticipated by claim 5 or claim 6 of the patent.
Claim 22 is anticipated by claim 8 of the patent.
Claim 23 is anticipated by claim 9 of the patent.
Claim 24 is anticipated by claim 10 of the patent.
Claim 25 is anticipated by claims 18 and 11 of the patent.
Claim 26 is anticipated by claim 18 of the patent.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-26 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
With respect to claim 1, This claim is within at least one of the four categories of patent eligible subject matter as it is directed to a method claim under Step 1.
Under Prong 1, Step 2A:
However, the limitations of claim 1,
“determining, periodically …, that the latency exceeds a threshold and based thereon, adding, …, one or more additional checkpoints along the processing path between the first and second checkpoints.”
as drafted, are functions that, under its broadest reasonable interpretation, recite the abstract idea of a mental process. The limitation encompasses a human mind carrying out the functions through observation, evaluation, judgment and /or opinion, or even with the aid of pen and paper. e.g. human can manually periodically determine the latency as defined in the claim and add more checkpoints as defined in the claim. Thus, the claim limitation falls within the “Mental Processes” grouping of abstract ideas under Prong 1 Step 2A.
Under Prong 2, Step 2A:
The judicial exception is not integrated into a practical application. The claim recites the following additional elements
“receiving, by a processor, an augmented computer software application operative to process a received message via a processing path which includes first and second checkpoints through which the received message traverses in sequence during processing, the traversal therebetween characterized by a latency;
storing, by the processor, during operation of the augmented computer software application as the received message is processed thereby, a data entry in a data store coupled therewith indicative of traversal of a checkpoint, wherein the first and second checkpoints are a pair of a plurality of checkpoints located throughout the augmented computer software application along a plurality of different processing paths of which the processing path is one;” And
“a processor”, “a data store”.
Wherein “receiving …”, and “storing …” are insignificant extra-solution activity such as gathering and storing data, according to MPEP 2106.05(g); thus, not indicative of an integration into a practical application. And the processor and data store are recited at a high-level of generality (i.e. as a generic processing device performing generic computer functions) such that it amounts to no more than mere instructions to apply the judicial exception using a generic computer component. Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea.
Under Step 2B:
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional element “a processor”, “a data store”, that are mere use of generic computer to implement the abstract idea, thus, are not an inventive concept. The “receiving …”, and “storing …” are insignificant extra-solution activities such as data gathering and storing which are recognized as well-understood, routine, and conventional activity, see MPEP § 2106.05(d)(II), Symantec for receiving and transmitting data, Versata Dev. Group, Inc. v. SAP Am., Inc. for retrieving and storing data. Accordingly, the claim does not appear to be patent eligible under 35 USC 101.
With respect to claim 13, This claim is within at least one of the four categories of patent eligible subject matter as it is directed to a computer-readable medium claim under Step 1.
This claim recites a computer-readable medium to implement the method disclosed in claim 1, and therefore recites the same abstract idea as claim 1, please see the office action analysis regarding claim 1 above.
Claim 13 recites one more additional element that is not recited in claim 1, i.e. a computer-readable medium storing instructions, but the computer-readable medium is recited at a high-level of generality (i.e.as a generic computer component) such that it amounts no more than mere instructions to apply the exception using a generic computer component.
With respect to claim 25, This claim is within at least one of the four categories of patent eligible subject matter as it is directed to an apparatus claim under Step 1.
This claim recites an apparatus to implement the method disclosed in claim 1, and therefore recites the same abstract idea as claim 1, please see the office action analysis regarding claim 1 above.
Claim 25 recites more additional elements that are not recited in claim 1, i.e. “an apparatus”, and “a memory”, but the apparatus and the memory are recited at a high-level of generality (i.e.as a generic computer or computer component) such that it amounts no more than mere instructions to apply the exception using a generic computer.
With respect to claims 2, 14, and 26, “wherein the determining further comprises: determining, periodically by the processor, that the latency does not exceed the threshold and based thereon, removing, by the processor, one or more previously added checkpoints from the processing path.” Wherein the processor is recited at a high-level of generality (i.e.as a generic computer component) such that it amounts no more than mere instructions to apply the exception using a generic computer. And “determining…” and “removing…” are mental processes because human can perform the processes manually.
With respect to claims 3 and 15, “wherein the determining further comprises: determining, by the processor, that the latency exceeds the threshold when the latency exceeds an amount of time between new messages arriving at portions of the augmented computer software application defined by the first and second checkpoints.” Further defines the determining process in claim 1, and is the same mental process, please see the analysis for claim 1 above.
With respect to claims 4 and 16, “wherein the determining further comprises: determining, by the processor, that the latency exceeds the threshold when a number of messages awaiting processing by a portion of the augmented computer software application, defined by the first checkpoint located prior to the portion and the second checkpoint located after the portion, exceeds a threshold number of messages.” Further defines the determining process in claim 1, and is the same mental process, please see the analysis for claim 1 above.
With respect to claims 5 and 17, “wherein the determining further comprises: determining, by the processor, that the latency exceeds the threshold when a jitter measurement exceeds a threshold latency variation.” Further defines the determining process in claim 1, and is the same mental process, please see the analysis for claim 1 above.
With respect to claims 6 and 18, “wherein the determining is performed by the processor as the augmented computer software application processes received messages.” The processor is merely used as a tool to implement the determining process which is mental process, see analysis for claim 1 above.
With respect to claims 7 and 19, “wherein the latency is determined based on a previously processed message.” as drafted, is merely indicating a field of use or technological environment in which to apply a judicial exception, and does not amount to significantly more than the exception itself, and cannot integrate a judicial exception into a practical application. See MPEP § 2106.05(h).
With respect to claims 8 and 20, “wherein at least one of the first or second checkpoints includes the one or more additional checkpoints added for a prior received message.” as drafted, is merely indicating a field of use or technological environment in which to apply a judicial exception, and does not amount to significantly more than the exception itself, and cannot integrate a judicial exception into a practical application. See MPEP § 2106.05(h).
With respect to claims 9 and 21, “wherein processing performance of the augmented computer software application improves as checkpoints are removed.” as drafted, is merely indicating a field of use or technological environment in which to apply a judicial exception, and does not amount to significantly more than the exception itself, and cannot integrate a judicial exception into a practical application. See MPEP § 2106.05(h).
With respect to claims 10 and 22, “wherein the determining whether the latency exceeds the threshold further comprises determining an elapse of time between times when the received message traversed the first checkpoint and when the received message traverses the second checkpoint.” Further defines the determining process in claim 1, and is the same mental process, please see the analysis for claim 1 above.
With respect to claims 11 and 23, “wherein the latency is determined based on data entries stored in the data store and indicative of times when the received message traversed the first and second checkpoints.” as drafted, is merely indicating a field of use or technological environment in which to apply a judicial exception, and does not amount to significantly more than the exception itself, and cannot integrate a judicial exception into a practical application. See MPEP § 2106.05(h).
With respect to claims 12 and 24, “wherein the received message is an electronic data transaction request message, and wherein the augmented computer software application processes the electronic data transaction request message by determining whether an attempt to match the electronic data transaction request message with at least one previously received but unsatisfied electronic data transaction request message for a transaction which is counter thereto results in at least partial satisfaction of one or both of the electronic data transaction request message and the at least one previously received but unsatisfied electronic data transaction request message.” as drafted, is merely indicating a field of use or technological environment in which to apply a judicial exception, and does not amount to significantly more than the exception itself, and cannot integrate a judicial exception into a practical application. See MPEP § 2106.05(h). In addition, the determining process is mental process because human can manually perform the process with aid of pen and paper.
Response to Arguments
Applicant's arguments filed on 7/14/2016 have been fully considered but they are not persuasive.
At p9 last to p10 third paragraphs of the Remarks, Applicant argued that “the claims are not abstract but rather are integrated into a practical application and provide a novel concept.” Particularly, at p10 third paragraph of the Remarks, Applicant argued that “In particular, the claims dynamically modify checkpoints within an application or code based on whether the checkpoints are located in, or between, portions of the code that are a source of unexpected processing delays, or delays which exceed a predetermined delay or latency parameter (threshold).”
Examiner respectfully disagrees, because, as set forth in the office action, dynamically modifying checkpoints such as adding or removing checkpoints are mental processes as human can manually perform adding or removing checkpoints, e.g. by writing software program. The identified abstract idea of mental processes is not integrated into a practical application, and the claims do not provide an inventive concept.
At p10 fourth to p11 first paragraphs of the Remarks, Applicant argued that “The claims provide a system that operates efficiently and with minimal impact on the operation of the application/system being monitored. Further, as claimed in claim 2, the claimed system minimizes recording of data entries between pairs of checkpoints that are not experiencing delays or latency, or are experiencing an expected amount of latency, or are experiencing less latency than other portions of the code. By minimizing the number of data entries that are recorded, the monitoring system is configured to minimize the storage space necessary for the data store.”
Examiner respectfully disagrees, the claimed system may operate efficiently and with minimal impact on the operation of the application/system being monitored, but the system is a generic computer system merely used as a tool to implement the identified abstract idea of mental processes.
At p11 second paragraph of the Remarks, Applicant argued that “The claims as a whole are more than a drafting effort designed to monopolize the exception but rather are specifically tailored to a performance monitoring system that reduces the size of a data store and therefore improves the speed with which the data store may be queried, e.g., after the data is collected. The limitations as provided by the claims impose a meaningful limit on the judicial exception.”
Examiner respectfully disagrees, and points out that “a drafting effort designed to monopolize the exception” was not the basis for the 101 abstract idea rejections.
At p11 under title “Step 2A – Prong One” to p18 of the Remarks, Applicant argued with respect to Step 2A – Prong One. In particular, At p13 second from the last paragraph of the Remarks, Applicant argued that “The current claims recite technological limitations that provide a technical improvement to monitoring applications by efficiently monitoring processing of messages in an augmented computer software application by logging information about those messages as they are processed through the data transaction processing system, i.e., as they are processed at/through various "checkpoints" in the system.”
Examiner respectfully disagrees, because, as set forth in the office action, the claims recite abstract idea of mental processes such as determining latency and adding checkpoints, and recite additional elements which are either insignificant extra-solution activities or mere instructions to apply the judicial exception using a generic computer component. The additional elements do not integrate the judicial exception into a practical application, i.e. do not improve technology.
At p13 last and p14 first paragraphs of the Remarks, Applicant argued that “Accordingly, while the claims may involve a judicial exception, they do not recite a judicial exception and are therefore eligible and do not require further eligibility analysis.”
Examiner respectfully disagrees, because, as set forth in the office action, following MPEP guidelines respect to 101 rejections, abstract idea of mental processes was identified in the claims. The claims recite additional elements and the additional elements were analyzed as either insignificant extra-solution activities or mere instructions to apply the judicial exception using a generic computer component. The additional elements do not integrate the judicial exception into a practical application, i.e. do not improve technology. Even viewed as a whole the claims do not appear to be patent eligible under 35 USC 101.
At p14 second to p16 second paragraphs of the Remarks, Applicant cited Ex Parte Desjardins case and Enfish case, then argued that “However, the claimed system/process "...improve the performance of the monitoring threads/processes and thereby improve the performance of the system being monitored, by minimizing the amount of data that is collected and recorded without sacrificing diagnostic capabilities as discussed herein." See Applicants' Specification, para. [0017].”
Examiner respectfully disagrees, because, the Ex Parte Desjardins case and Enfish case are not applicable here. For Enfish, its self-referential data table was a data table of the memory controller of the computer itself and thus the improvement was to the computer itself. By contrast, in the instant application, nothing of the computer itself is being altered, it functions as it ordinarily would and is merely used as a tool to perform the instant claimed functionalities. For Desjardins case, the ARP evaluated the claims as a whole in discerning at least the limitation “adjust the first values of the plurality of parameters to optimize performance of the machine learning model on the second machine learning task while protecting performance of the machine learning model on the first machine learning task” to overcome the problem of “catastrophic forgetting” encountered in continual learning systems reflected the improvement disclosed in the specification. The instant claims do not recite any feature similar to those of Enfish or Desjardins. The minimized amount of data and without sacrificing diagnostic capabilities are results of the abstract idea of mental processes with the same computer, no technology was affected.
At p16 third paragraph of the Remarks, Applicant argued that “Like the claims in Desjardins, the present claims, when considered as a whole and as an ordered combination, impart a specific improved functionality to monitoring applications by modification of checkpoints within an application or code based on whether the checkpoints are located in, or between, portions of the code that are a source of delays which exceed a predetermined delay or latency parameter (threshold).”
Examiner respectfully disagrees, because, as explained above, Desjardins case is not applicable here. Further, determining latency and modifying checkpoints such as adding or removing checkpoints are mental processes as human can manually perform adding or removing checkpoints, e.g. by writing/modifying software program. These processes do not affect technology.
After citing some paragraphs from the instant spec, at p18 last paragraph of the Remarks, Applicant argued that “Therefore, similar to Desjardins, the claims are directed to eligible subject matter at least in view of Enfish. As stated in Enfish, the "conclusion that the claims are directed to an improvement of an existing technology is bolstered by the specification's teachings that the claimed invention achieves other benefits ... such as increased flexibility, faster search times, and smaller memory requirements." See Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 1337 (Fed. Cir. 2016)."”
Examiner respectfully disagrees, because, as explained above, Desjardins and Enfish cases are not applicable here. The deciding factors of eligibility for Desjardins are protecting performance of the machine learning model on the first machine learning task” to overcome the problem of “catastrophic forgetting” encountered in continual learning systems; and for Enfish are the self-referential data table in the memory controller. The instant claims do not recite any feature similar to Desjardins or Enfish. The instant claims may use more or less memory/storage depending on the number of checkpoints used, but the actual usage is the result of abstract idea of mental processes with the same computer, no technology was affected.
At p19 first paragraph of the Remarks, Applicant argued that “Therefore, the claims are not abstract.”
Examiner respectfully disagrees, because, as explained above, and as set forth in the office action, the claims recite abstract idea of mental processes, and the additional elements do not integrate the judicial exception into a practical application.
At p19 under title “Step 2A – Prong Two” to p20 of the Remarks, Applicant argued with respect to Step 2A – Prong two. In particular, at p20 second paragraph of the Remarks, Applicant argued that “In particular, the current claims disclose an improved monitoring system that allows for additional and/or more granular monitoring without impacting the performance of the monitored system by determining that the latency exceeds a threshold and based thereon, adding one or more additional checkpoints along the processing path between the first and second checkpoints.”
Examiner respectfully disagrees, because, as explained above, and as set forth in the office action, determining latency and modifying checkpoints such as adding or removing checkpoints are mental processes as human can manually perform these processes. These processes do not affect technology.
At p20 third paragraph of the Remarks, Applicant argued that “As noted above, the current claims provide a practical solution to problems caused by bottlenecks in different stages or portions of the code where, for example, processing occurs more slowly than the processing by one or more of the other processing stages, or otherwise takes longer than expected, delaying, or preventing processing by those other processing stages.”
Examiner respectfully disagrees, because, as explained above, the solution to the problems is abstract idea without significantly more, as human can manually determine bottlenecks/latency, and modify the checkpoints accordingly.
At p20 fourth to sixth paragraphs of the Remarks, Applicant argued that “The claims as a whole are more than a drafting effort designed to monopolize the exception, but rather are specifically tailored to a computer system for performance monitoring.”
Examiner respectfully disagrees and points out that “a drafting effort designed to monopolize the exception” was not the basis of rejections set forth in the office action. The arguments are not relevant to the current office action.
At p20 last paragraph of the Remarks, Applicant argued that “Accordingly, the claims are integrated into a practical application and provide an improvement to a specific technology and as such are directed to eligible subject matter.”
Examiner respectfully disagrees, because, as explained above, and as set forth in the office action, the claims recite abstract idea of mental processes such as determining latency and adding checkpoints, and recite additional elements which are either insignificant extra-solution activities or mere instructions to apply the judicial exception using a generic computer component. The additional elements do not integrate the judicial exception into a practical application, i.e. do not improve technology.
At p21 to p23 of the Remarks, Applicant argued with respect to Step 2B. Particularly, at p22 second paragraph of the Remarks, Applicant argued that “The combination of steps recited show that the claim is not to the idea of mental processes, but rather that the steps impose meaningful limits that allow for dynamically modifying checkpoints within an application or code based on whether the checkpoints are located in, or between, portions of the code that are a source of unexpected processing delays, or delays which exceed a predetermined delay or latency parameter, or between portions of the code that contribute to a high percentage of the overall message processing latency.”
Examiner respectfully disagrees, because, as explained above, and as set forth in the office action, receiving and storing are insignificant extra-solution activities which are recognized as well understood, routine, and conventional activities in MPEP. Determining latency and adding checkpoints are mental processes as human can manually perform these tasks. The computer/processor is merely used as a tool to implement the identified abstract idea. The additional elements including insignificant extra-solution activities and the generic computer/processor do not amount to significantly more and do not constitute an inventive concept.
At p22 third paragraph of the Remarks, Applicant argued that “Accordingly, the claims recite an inventive concept and significantly more than the judicial exception. …"
Examiner respectfully disagrees, please see the response in paragraph 55 above.
At p22 fourth paragraph of the Remarks, Applicant argued that “Should the Examiner disagree that Applicants' claims amount to "significantly more," Applicants request that the Examiner refer to the USPTO Memorandum dated April 19, 2018 entitled Changes in Examination Procedure Pertaining to Subject Matter Eligibility, Recent Subject Matter Eligibility Decision (Berkheimer V. HP, Inc.) which dictates how the Examiner should properly address and support an assertion that the claims do not provide "something more," so as to address each and every element of Applicants' claim to show that the claimed limitations, in the claimed combination, were well-understood, routine or conventional.”
Examiner respectfully disagrees, because, as explained above, e.g. paragraph 55 above, and as set forth in the office action, following MPEP guidelines, mental processes were identified in the claims, additional elements were analyzed as either insignificant extra-solution activities (such as “receiving …”, and “storing …” processes) which are recognized as well understood, routine, and conventional activities in MPEP (see MPEP § 2106.05(d)(II), Symantec for receiving and transmitting data, Versata Dev. Group, Inc. v. SAP Am., Inc. for retrieving and storing data.) or mere used of generic computer/processor as a tool to implement the identified abstract idea. Even viewed as a whole the claims do not appear to be patent eligible under 35 USC 101.
At p22 last to p23 first paragraph of the Remarks, Applicant argued that “Applicants point out that the question of whether additional elements represent well- understood, routine, conventional activity is distinct from patentability over the prior art under 35 U.S.C. §§ 102 and 103. Obviousness or lack of novelty does not establish that the additional elements are well-understood, routine, conventional activities, or elements to those in the relevant field. See MPEP § 2106.05.”
Examiner respectfully agrees that “Obviousness or lack of novelty does not establish that the additional elements are well-understood, routine, conventional activities”, and points out that the current 101 abstract idea rejections are not based on obviousness or lack of novelty.
At p23 second paragraph of the Remarks, Applicant argued that “An additional element (or combination of elements) is not well-understood, routine, or conventional unless the Examiner finds, and expressly supports a rejection in writing with, one or more of the following four options: …”
Examiner respectfully disagrees, because, as explained above, and as set forth in the office action, The “receiving …”, and “storing …” processes are insignificant extra-solution activities such as data gathering and storing which are recognized as well-understood, routine, and conventional activities in MPEP, see MPEP § 2106.05(d)(II), Symantec for receiving and transmitting data, Versata Dev. Group, Inc. v. SAP Am., Inc. for retrieving and storing data.
At p23 second from the last paragraph of the Remarks, Applicant argued that “Applicants submit that, at least based on the lack of any valid rejection under 35 U.S.C. 102 or 103, as described below, the Examiner cannot make any such showing that the claimed elements, in combination, are well-understood, routine, or conventional.”
Examiner respectfully disagrees, because, as set forth in the office action, and as explained above, see e.g. paragraphs 59 and 63 above, even viewed as a whole the claims do not appear to be patent eligible under 35 USC 101.
At p23 last paragraph of the Remarks, Applicant argued that “Accordingly, for at least these reasons, the Applicants respectfully request that the Examiner withdraw this rejection of claims 1-26.”
Examiner respectfully disagrees, because, as explained above, even viewed as a whole the claims do not appear to be patent eligible under 35 USC 101. The rejections are maintained.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/ZENGPU WEI/
Examiner, Art Unit 2197
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