Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Allowable Subject Matter
Claims 1-6 and 9-13 are allowed.
Claims 16 and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
Applicant’s arguments, filed Jan 26, 2026, with respect to how the newly amended claim features differ from the prior art cited in the last office have been fully considered. These arguments are found to be persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in this office action for claims 15, 17-18, and 20.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 20 is rejected under 35 U.S.C. 102(a)(1) or 102(a)(2) as being anticipated by Howson (Pub No. US 20230401778 A1).
As per claim 20, Howson teaches the claimed:
20. A non-transitory computer readable storage medium storing software code which, when implemented by a driver on a host processor ([0027] “… There may be provided a non-transitory computer readable storage medium having stored thereon a computer readable description of a graphics processing system” and [0054] “… The host computer system 322 further comprises a graphics driver 326. “)) causes the driver to:
indicate that a portion of data is to be processed with redundancy ([0067] “… The graphics processing unit 302 further comprises a testing unit 312 which operates at the per-tile rendering stage of the pipeline. The testing unit 312 reads the data about the current and previous tile render from the memory 304.sub.1 and, if this indicates that the render is suitable for redundancy testing, then the testing unit 312 compares the data between the current and previous render”);
indicate a redundancy policy selected for the portion of data, wherein the redundancy policy comprises temporal redundancy and/or spatial redundancy ([0067] “… The graphics processing unit 302 further comprises a testing unit 312 which operates at the per-tile rendering stage of the pipeline. The testing unit 312 reads the data about the current and previous tile render from the memory 304.sub.1 and, if this indicates that the render is suitable for redundancy testing, then the testing unit 312 compares the data between the current and previous render. If this data matches, then this indicates that the rendering of this tile is redundant and can be skipped and the output from the previous tile render re-used as the current output.” In this passage, an indication is used to determine whether a given tile is to be processed with redundancy. This indicator further indicates that the redundancy policy comprises temporal redundancy because the redundancy in this passage is between the previous render and the current render); and communicate to a tile-based graphics processor ([0067] “… The graphics processing unit 302 further comprises a testing unit 312 which operates at the per-tile rendering stage of the pipeline.”) an instruction to process the data to produce an output and an indicator that the portion of the output is to be processed with redundancy, the indicator further indicating the redundancy policy selected for the portion of the output (Please see [0054] “The graphics processing unit 302 receives graphics data submitted by an application 324 running on a host computer system 322 (e.g. a CPU). The host computer system 322 further comprises a graphics driver 326. The computer system may execute the application 324 to invoke application instructions. These application instructions may take the form of render requests that are submitted by the application” and [0056] “… To perform the render, the graphics unit may execute the one or more draw calls submitted by the application 324 to render geometry associated with those draw calls to generate rendered image data. The graphics processing unit 302 performs the render in accordance with a graphics pipeline.” Also, please see [0067] again where the indicator indicating the redundancy policy is used).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 15 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Howson (Pub No. US 20230401778 A1) in view of Cerny (Pub No. US 2021/0001220 A1).
As per claim 15, Howson teaches the claimed:
15. A method implemented by a driver on a host processor ([0054] “… The host computer system 322 further comprises a graphics driver 326. “); wherein the method includes ([0055] “The render request is received by the driver 326, which causes graphics data associated with the request (and thus the one or more draw calls composing the render request) to be submitted to the graphics unit 302” And [0056] “The graphics processing unit 302 operates to perform the render as part of rendering an image of a scene.”) with redundancy communicating by the driver to a graphics processor configured as a tile-based graphics processor ([0067] “… The graphics processing unit 302 further comprises a testing unit 312 which operates at the per-tile rendering stage of the pipeline. The testing unit 312 reads the data about the current and previous tile render from the memory 304.sub.1 and, if this indicates that the render is suitable for redundancy testing, then the testing unit 312 compares the data between the current and previous render”):
an instruction to process the data to produce an output ([0054] “The graphics processing unit 302 receives graphics data submitted by an application 324 running on a host computer system 322 (e.g. a CPU). The host computer system 322 further comprises a graphics driver 326. The computer system may execute the application 324 to invoke application instructions. These application instructions may take the form of render requests that are submitted by the application” and [0056] “… To perform the render, the graphics unit may execute the one or more draw calls submitted by the application 324 to render geometry associated with those draw calls to generate rendered image data. The graphics processing unit 302 performs the render in accordance with a graphics pipeline.”); and
an indicator that the portion of the output is to be processed with redundancy, the indicator further indicating a redundancy policy selected for the portion of the output, wherein the redundancy policy comprises temporal redundancy and/or spatial redundancy ([0067] “… The graphics processing unit 302 further comprises a testing unit 312 which operates at the per-tile rendering stage of the pipeline. The testing unit 312 reads the data about the current and previous tile render from the memory 304.sub.1 and, if this indicates that the render is suitable for redundancy testing, then the testing unit 312 compares the data between the current and previous render. If this data matches, then this indicates that the rendering of this tile is redundant and can be skipped and the output from the previous tile render re-used as the current output.” In this passage, an indication is used to determine whether a given tile is to be processed with redundancy. This indicator further indicates that the redundancy policy comprises temporal redundancy because the redundancy in this passage is between the previous render and the current render).
Howson alone does not explicitly teach the remaining claim limitations.
However, Howson in combination with Cerny teaches the claimed:
includes responsive to an Application Programming Interface (API) command (It is noted that above Howson teaches of performing rendering using commands from the driver. Howson does not mention an API per se. However, Cerny teaches that it was known in the art to use an API to communicate commands and rendering instructions to a GPU, e.g. please see Cerny in [0005] “… when the central processing unit (CPU) executing the game uses a graphics application programming interface (API) to construct one or more command buffers for the draw calls as executed by a graphics processing unit (GPU) implementing a graphics pipeline”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the API as taught by Cerny with the system of Howson because the API provides a common set of commands and/or protocols that compliant GPU drivers and processors can understand and support. This helps provide more consistency across different brands or models of GPUs for communicating with the software as well.
As per claim 18, Howson teaches the claimed:
18. The method of claim 15, wherein the instructions include setting a redundant tile area by image coordinates (Please see Howson in figure 2 where an X and Y axes are defined and it shows tiles 204A-D being defined with borders and corner points. These corner points define the image coordinates that set the spatial boundaries of each tile. Howson in [0067] refers to using the individual tiles as part of the instructions being rendered and checking for redundancy).
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Howson in view of Cerny in further view of Pacejo (US 20150220375 A1).
As per claim 17, Howson teaches the claimed:
17. The method of claim 15, wherein the instructions include a selection of redundant tiles (Howson in [0067] teaches of a selection of redundant tiles, e.g. using a given tile from a previous render and a current render)
Howson alone does not explicitly teach the remaining claim limitations.
However, Howson and Cerny in combination with Pacejo teaches the claimed:
and graphics processor core mapping (Pacejo [0013]: “The first memory includes instructions which, when executed by a processing unit that includes the first processor and/or a second processor and that is in electronic communication with a memory module that includes the first memory and/or a second memory, program the processing unit, for facilitating inter-unit communication, to receive a unit-core mapping that includes a mapping of a target unit instance to one of several cores and a mapping of each source unit instance in a set of source units instances to one core in the several cores.” Pacejo teaches the instruction that include the unit-core mapping (core mapping).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the core mapping as taught by Pacejo with the system of Howson as modified by Cerny in order to help organize the processing of instructions where multiple or concurrent cores are available to help execute the instructions.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
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/JOSHUA JUNGWOOK SUO/Examiner, Art Unit 2616
/DANIEL F HAJNIK/Supervisory Patent Examiner, Art Unit 2616