Prosecution Insights
Last updated: August 17, 2026
Application No. 18/625,284

DYNAMIC SENSOR CONFIGURATIONS IN A HETEROGENEOUS COMPUTING PLATFORM

Non-Final OA §103
Filed
Apr 03, 2024
Examiner
FATIMA, AYMAN
Art Unit
2176
Tech Center
2100 — Computer Architecture & Software
Assignee
Dell Products L.P.
OA Round
3 (Non-Final)
79%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
19 granted / 24 resolved
+24.2% vs TC avg
Strong +20% interview lift
Without
With
+20.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
16 currently pending
Career history
47
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
62.1%
+22.1% vs TC avg
§102
31.3%
-8.7% vs TC avg
§112
6.0%
-34.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 24 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status Applicant’s amendment, filed 04/30/2026, for application number 18/625,284 has been received and entered into record. Claims 1, 12 and 18 are amended. Thus, claims 1-5, 9-14, and 18-20 are presented for examination. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 2, 4, 9, 11-13 are rejected under 35 U.S.C. 103 as being unpatentable over Dewan et al. (US 2017/0180386 A1) in view of Malladi et al. (US 2018/0088859 A1). Regarding claim 1, Dewan teaches an Information Handling System (IHS) (system of Figure 1 and 2), comprising: a plurality of sensors (Figure 2, sensors 200); an Embedded Controller (EC) (Figure 2, operating system 100 and host-OS TEE 120); and a memory coupled to, or integrated into, the EC, wherein the memory comprises program instructions that, upon execution by the EC (“Various approaches to implement the TEE 120 may be used … create the TEE as a … sequestered memory” Par 0019) [TEE 120 is integrated in OS 100], cause the EC to: receive a sensor configuration request (“the external data service communicates configuration data for the sensor… receive the configuration data, via the API, from the host-based TEE; ” par 0077); identify a first of the plurality of sensors of the IHS for configuration based on the sensor configuration request (“the external data host application 122 collects configuration data from external data providers…and communicates the configuration data, via the unified APIs 214, through the microcontroller-based TEE 210, which in turn communicates the configuration data to one or more of the sensors 200 via the sensor hub 202.” Par 0034 and “the external data service communicates configuration data for the sensor from the external data service to the software application via the secure connection; wherein the microcontroller is further to perform operations that … communicate the configuration data to the sensor hub, the sensor hub to implement the configuration data for the sensor.” Par 0077 and paragraph 0113); identify an interface for accessing the first sensor (“The microcontroller-based TEE may then transmit the secure sensor data to a secure agent (e.g., a software application of the TEE or another TEE) using a secure channel, API, or other data communication interface (operation 460).” Par 0053 and Figure 4), wherein the interface for accessing the first sensor comprises an interface operated by a sensor hub of the IHS (“The sensor hub 202 includes a direct hardware interface to the microcontroller-based TEE 210.” Par 0024 and Figure 2), and wherein the sensor hub is implemented by an SoC (System-on-Chip) of the IHS (“In an example of a System-on-Chip (SoC) configuration, the protected hardware channel 208 may be established as a special channel between the two entities that cannot be sniffed by any other party in the SoC or system architecture.” Par 0044); wherein the SoC receives the modifications transmitted by the EC and relays the modifications to the first sensor without interfacing with the plurality of hardware registers of the first sensor (“communicate the configuration data to the sensor hub, the sensor hub to implement the configuration data for the sensor.” Par 0077 and “the sensor hub 202 directly implements the commands and updates received from the microcontroller-based TEE 210 without needing to authenticate the originating trusted agent” par 0029 and “the sensor hub and any associated sensors and sensor controllers may remain security agnostic, and in some examples, such sensors and sensor controllers do not need to incorporate heavy duty cryptographic firmware or security logic.” Par 0017 and “this configuration ensures that secure sensor data with certain properties is accessible to only the right party and trusted agent, delegating the role of gatekeeper at the microcontroller-based TEE 210 rather than at the sensor hub 202 or sensors 200.” Par 0037) [the microcontroller transmits the configuration data/ commands to the sensor hub that directly implements the configuration data, thereby not interfacing with internal registers (firmware/ security logic)]. However, Dewan does not explicitly teach identify a plurality of hardware registers for configuring the first sensor; associate the hardware registers with their respective hardware register addresses using a listing of hardware register addresses; and via the identified interface, modify the plurality of hardware registers of the first sensor based on the sensor configuration request using the associated hardware register addresses. In the analogous art, Malladi teaches identify a plurality of hardware registers for configuring the first sensor (“The offset data 306 may provide the offsets into the sensor mote memory (e.g., 122) or the NVM (e.g., 102), which stores detection registers, configuration registers, data read/capture registers, and any other registers that may be needed for sensor configuration” par 0024 and Figure 3) [the offset data is used to locate registers used for sensor configuration]; associate the hardware registers with their respective hardware register addresses using a listing of hardware register addresses (“The configuration register data 310 may include at least one register address and a value to write in the indicated register in order to configure the sensor device.” Par 0025 and Figure 3) [the configuration data contained in the EDS (listing) provides mapping between the registers and their corresponding hardware addresses]; and via the identified interface, modify the plurality of hardware registers of the first sensor based on the sensor configuration request using the associated hardware register addresses (“writing configuration values into a set of configuration registers to configure the sensing device” par 0055 and “the configuration registers and the one or more capture registers are specified by the configuration data.” Par 0056 and “The configuration registers and the pre-defined values may be specified by the configuration register data (e.g., register data 310 of FIG. 3) within the EDS (e.g., EDS 302 of FIG. 3).” Par 0028 and Figure 1 and 5) [the modification is carried out by writing specific configuration values to the register addresses that are identified]. It would have been obvious to a person having ordinary skill in the art, having the teachings of Dewan and Malladi before him before the effective filing date of the claimed invention, to have modified Dewan to incorporate the teachings of Malladi to provide specific hardware-level mechanism for the sensor hub to program the sensors based on working policies to reduce power consumption and system latency. Claim 12 corresponds to claim 1 and is rejected accordingly. Regarding claim 2, Dewan and Malladi teach the IHS of claim 1. Dewan further teaches wherein the first sensor comprises at least one of: an accelerometer, a gyroscope, or an Inertial Measurement Unit (IMU) (“As shown in FIG. 3, a number of sensors are connected to the sensor hub 202, including a cellular communications chipset 314, a Wi-Fi communications chipset 316, a Global Navigation Satellite System (GNSS) communications chipset 312, a gyroscope sensor 318, and an accelerometer sensor 320.” Par 0041 and Figures 2 and 3). Regarding claim 4, Dewan and Malladi teach the IHS of claim 1, Dewan further teaches wherein the sensor configuration request is received from an operating system application running on the IHS (“the external data service communicates configuration data for the sensor… receive the configuration data, via the API, from the host-based TEE; ” par 0077 and Figure 2, Host-OS TEE 120). Claim 13 corresponds to claim 4 and is rejected accordingly. Regarding claim 9, Dewan and Malladi teach the IHS of claim 1. Dewan further teaches wherein the modifications are requested by a service OS operating on the SoC (“the host-based TEE is executed within an operating system,” par 0074 and “receive the configuration data, via the API, from the host-based TEE; and communicate the configuration data to the sensor hub, the sensor hub to implement the configuration data for the sensor.” Par 0077) [sensor configuration modifications are requested by trusted applications in a host-based execution environment managed by the OS in the SoC]. Regarding claim 11, Dewan and Malladi teach the IHS of claim 1, Dewan teaches wherein operations of the first sensor are updated according to the sensor configuration request without modifications to firmware used to operate the IHS (“the sensor hub 202 directly implements the commands and updates received from the microcontroller-based TEE 210” par 0029 and “such sensors and sensor controllers do not need to incorporate heavy duty cryptographic firmware or security logic.” Par 0017 and “the external data host application 122 … communicates the configuration data, via the unified APIs 214, through the microcontroller-based TEE 210, which in turn communicates the configuration data to one or more of the sensors 200 via the sensor hub 202.” Par 0034) [the sensors are modified without modifying the firmware]. Claims 3, 5, 14 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Dewan in view of Malladi and in further view of Kanigicherla et al. (US 2016/0267239 A1). Regarding claim 3, Dewan and Malladi teach the IHS of claim 1. Dewan further teaches wherein the first sensor comprises an accelerometer (Figure 3, accelerometer 320). However, Dewan and Malladi do not explicitly teach wherein the sensor configuration request comprises a request to modify a sensitivity setting for use by the accelerometer in detecting shock events experienced by the IHS. In the analogous art, Kanigicherla teaches wherein the sensor configuration request comprises a request to modify a sensitivity setting for use by the accelerometer in detecting shock events experienced by the IHS (“The sensor information comprises of activities or tasks related to the sensor. Activities or tasks may possibly be gesture pattern detection, location detection,” par 0073 and “ the registers enable the Host CPU 101 to modify any configuration or settings related functionalities of the ISIU 102, like data sensing, filtering, etc.” par 0045) [the host CPU modifies hardware registers for filtering and sensing settings to adjust the accelerometer’s sensitivity for detecting physical activities]. It would have been obvious to a person having ordinary skill in the art, having the teachings of Dewan, Malladi and Kanigicherla before him before the effective filing date of the claimed invention, to have modified Dewan and Malladi to incorporate the teachings of Kanigicherla to increase a sensitivity setting of the accelerometer to ensure the corrective actions are executed earlier in response to a shock event, preventing damage to the system. Claim 18 is anticipated by claims 1, 2 and 3 and is rejected accordingly. Regarding claim 5, Dewan and Malladi teach the IHS of claim 1. However, Dewan and Malladi do not explicitly teach wherein the interface for accessing the first sensor comprises a sideband management pathway between the first sensor and the EC. In the analogous art, Kanigicherla teaches wherein the interface for accessing the first sensor comprises a sideband management pathway between the first sensor and the EC (“The PIs 216 directly interface the ISIU 102 to the sensors 103.” Par 0043 and “As a part of the process of initialization the Initialization Module 204 performs sensor register programming based on the sensor characteristics.” Par 0055) [the PIs correspond to the sideband management pathway]. It would have been obvious to a person having ordinary skill in the art, having the teachings of Dewan, Malladi and Kanigicherla before him before the effective filing date of the claimed invention, to have modified Dewan and Malladi to incorporate the teachings of Kanigicherla to include a sideband management pathway to increase bandwidth efficiency and improve power utilization. Claims 14 and 19 correspond to claim 5 and are rejected accordingly. Regarding claim 20, Dewan and Malladi teach the storage device of claim 18, Dewan further teaches wherein the interface for accessing the first sensor comprises an interface operated by a sensor hub of the IHS (“The sensor hub 202 includes a direct hardware interface to the microcontroller-based TEE 210.” Par 0024 and Figure 2). Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Dewan in view of Malladi and in further view of Iyer et al. (US 2022/0413938 A1). Regarding claim 10, Dewan and Malladi teach the IHS of claim 1. However, Dewan and Malladi do not explicitly teach wherein operations of the first sensor are updated according to the sensor configuration request without reinitializing hardware or software of the IHS. In the analogous art, Iyer teaches wherein operations of the first sensor are updated according to the sensor configuration request without reinitializing hardware or software of the IHS (“If there is a runtime modification of the policy during a user's session, the application may need to be reset. To address these, and other issues, systems and methods described herein provide…commands that allow an arbitration object to manage the loading of runtime objects and thereby perform system policy updates.” Par 0120 and “the plurality of runtime objects may include at least one of: operating temperature objects, battery metrics objects, IHS performance objects, IHS posture objects, audio capture objects, video capture objects, IHS location objects, or user proximity objects.” Par 0006) [the platform framework manages runtime objects for sensor functions (i.e. video, audio, proximity) to perform dynamic updates without resetting/reinitializing applications during an active session]. It would have been obvious to a person having ordinary skill in the art, having the teachings of Dewan, Malladi and Iyer before him before the effective filing date of the claimed invention, to have modified Dewan and Malladi to incorporate the teachings of Iyer to update operations of a sensor without reinitializing hardware or software of the IHS to reduce system latency. Response to Arguments Applicant’s arguments, see pages 2-3, filed 04/30/2026, with respect to the rejection(s) of claim(s) 1, 12 and 18 under 35 U.S.C. 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Dewan in view of Malladi. Malladi teaches association of the registers with the register addresses to configure the sensing device. Examiner respectfully points to the updated mapping of claim 1. No additional arguments were presented as to the remaining claims. As such, the rejection is maintained. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. Joshi (US 2019/0243660 A1) teaches an IHS with an EC that manages two OS-specific chips to provide pre-boot services, enabling diagnostics and recovery from a common motherboard design without fully booting an operating system. Rahardjo (US 2020/0134183 A1) teaches a remote access controller in an IHS securely recovering corrupted FPGA firmware by generating a security key and replacing inconsistent firmware with a verified master version via a sideband management bus. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to AYMAN FATIMA whose telephone number is (571)270-0830. The examiner can normally be reached M to Fri EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jaweed Abbaszadeh can be reached on (571)270-1640. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AYMAN FATIMA/Examiner, Art Unit 2176 /JAWEED A ABBASZADEH/Supervisory Patent Examiner, Art Unit 2176
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Prosecution Timeline

Show 1 earlier event
Sep 11, 2025
Non-Final Rejection mailed — §103
Dec 08, 2025
Examiner Interview Summary
Dec 08, 2025
Response Filed
Dec 08, 2025
Applicant Interview (Telephonic)
Feb 02, 2026
Non-Final Rejection mailed — §103
Apr 30, 2026
Response Filed
May 27, 2026
Final Rejection mailed — §103
Jul 20, 2026
Response after Non-Final Action

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Prosecution Projections

3-4
Expected OA Rounds
79%
Grant Probability
99%
With Interview (+20.0%)
2y 4m (~0m remaining)
Median Time to Grant
High
PTA Risk
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