DETAILED ACTION
This Office Action, based on application 18/625,307 filed 3 April 2024, is filed in response to applicant’s amendment and remarks filed 29 January 2026. Claims 1-20 are currently pending and have been fully considered below.
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 17 February 2026 has been entered.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s remarks, filed 29 January 2026 in response to the Office Action mailed 5 December 2025, have been fully considered below.
Claim Objections
The Office withdraws the previously issued objections in view of applicant’s amendment and remarks. The Office introduces new objections due to new issues introduced via amendment.
Claim Rejections under 35 U.S.C. § 101 (patent eligible subject matter)
The applicant traverses the patent eligibility subject matter rejection alleging the claims, as amended, (1) do not recite a mental process nor is directed to an abstract idea (Step 2A, Prong 1: NO), and (2) relates to an improvement in memory circuit error detection.
Regarding (1), the Office has fully reviewed applicant’s remarks presented on Pages 9-11 and remains unpersuaded. While the Office acknowledges the additional features incorporated into Claim 1, the Office maintains applicant’s response fails to address the particular limitations and associated reasons (present in the claims before and after applicant’s amendment) noted by the Office as constituting a mental process. Stated another way, the claims may incorporate additional elements (e.g. features that may include firmware, a diagnostic system, callback pathways, identifying a handle, and a notification) and still recite a mental process. The Office presents an analysis of the new features in the grounds of rejection below. The Office further maintains the response provided in the “Response to Arguments” section of the previous Office Action mailed 5 December 2025:
In response, the Office notes applicant’s response seems to summarily dismiss the Office’s assertion that the claims are directed to an abstract idea since the claims involve the use of components of a computer. While the Office acknowledges the claims do involve the use of components of a computer and thus the claims recite additional elements beyond the abstract idea, the Office maintains those additional elements have been addressed via analysis of the claims under Step 2A Prong 2 and Step 2B below. The Office reminds the applicant of MPEP 2106.04(a)(2)(III)(C) in that “A claim that requires a computer may still recite a mental process”. The Office notes applicant’s response fails to address the particular limitations and associated reasons noted by the Office as constituting a mental process. For example, regarding the limitation “detect a memory error that results from an attempt to access {memory}”, the Office reasserts the limitation may be interpreted as an observation of feedback provided in response to the triggering of the memory error as set forth in the rejection of record. A flash drive may have a light indicator that blinks red due to abnormal behavior accessing contents of the flash drive; a person may observe the blinking red light to determine (and thus ‘detect’) the abnormal behavior or memory error. As such, the Office maintains the claims are directed to an abstract idea for reasons presented in the rejection of record.
Regarding (2), the applicant alleges the claimed subject matter relates specifically to an improvement in memory circuit error detection and mitigation technology citing ¶[0061] and ¶[0072] of the specification. While the Office agrees the cited portions of the specification may recite an improvement (e.g. after identifying a specific replaceable memory module, performing a corrective action including (a) deploying diagnostic tools to repair the identified memory module or (b) using an auto-healing algorithm that implements advanced error correction capabilities), the Office asserts the claimed invention does not improve the functioning of a computer or improves another technology or technical field (e.g. the claimed invention is not directed to doing anything beyond memory module identification and specifically, is not further limited to performing any sort of corrective action noted in the specification). Again, the Office further maintains the response provided in the “Response to Arguments” section of the previous Office Action mailed 5 December 2025:
While the applicant alleges the claims are directed to improving the functioning of a computer by being directed to improved memory circuit address error detection while a memory module is still operational, the Office asserts at least Claim 1 fails to realize such an improvement. The claim is merely directed to (1) ‘detecting’ a memory error (without further limiting how such a detection is performed or how such a detection provides the alleged improvement), (2) determining a memory address, and (3) identifying a memory module as the source of the error (noting such identification is not limited in any way or based upon the determined memory address). Furthermore, merely identifying the source of a memory error fails to improve the functionality of a computer because the mere identification does not change anything (the source of the memory error operates the same regardless of whether or not the source was identified).
Further regarding (2), the applicant reiterates Claim 1 recites features that are not well understood or routine in the memory circuit error detection and mitigation technology field based on the previous Office Action indicating allowable subject matter over prior art. The Office again maintains the response provided in the “Response to Arguments” section of the previous Office Action mailed 5 December 2025:
Again, the Office asserts the applicant summarily dismisses the Office’s assertion that the additional elements noted in the grounds of rejection amount to ‘significantly more’ under Step 2B of the patent subject matter eligibility analysis without identifying any particular additional element(s) of the claims such that they amount to an inventive concept. While the applicant alleges the claims recite additional elements that are not well-understood, routine, conventional activities since the claims are not rejected under prior art, the Office reminds the applicant that “As made clear by the courts, the "‘novelty’ of any element or steps in a process, or even of the process itself, is of no relevance in determining whether the subject matter of a claim falls within the § 101 categories of possibly patentable subject matter." (see MPEP 2106.05(I)). The Office maintains that while the claims recite additional elements, the additional elements of the claim do not amount to ‘significantly more’ than the abstract idea for reasons set forth in the grounds of rejection.
Conclusion
The Office acknowledges applicant’s telephone request. The Examiner may be contacted at the phone number below and will grant an interview upon request should such an interview be deemed to advance prosecution.
Claim Objections
The following claims are objected to due to informalities:
Claims 1, 14, and 18: Lack of antecedent basis of the term “the diagnostic API supported by the respective memory device driver”. Exemplary Claim 1 is limited to “wherein each memory device driver {of the plurality of memory device drivers} supports a diagnostic API”. For example, if ‘a diagnostic API’ is ‘Windows Memory API’, then the limitation would be read as “wherein each memory device driver supports Windows Memory API”. As such, “Windows Memory API supported by the respective memory device driver” is indefinite since a particular memory device driver is referenced without first setting forth the particular memory device driver referenced. The Office is unsure what the applicant is trying to suggest. Does each device driver support a distinct diagnostic API or does each device driver support the same diagnostic API? If the former, the claim must be updated to reflect distinct APIs; if the latter, then the language “supported by the respective memory device driver” or “supported by the first memory device driver” is insignificant and instead read as “the diagnostic API supported by the plurality of memory device drivers” or just “the diagnostic API” alone.
Appropriate correction is required.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception without significantly more. Patent Eligibility is determined as set forth under the 2019 Patent Eligibility Guidelines (see MPEP § 2106). The analysis of the claims in view of the guidelines are presented below.
Claim 1:
Regarding Step 1, the claim is directed to a system (or machine/manufacture). Thus, the claim is directed to one of the four categories of invention.
Regarding Step 2A Prong 1, this part of the eligibility analysis evaluates whether the claim recites a judicial exception. The claim includes the following limitations:
An Information Handling System (IHS), that comprises: one or more replaceable memory modules; one or more memory devices; and one or more processors coupled to the one or more memory devices, wherein the one or more memory devices comprise instructions that, upon execution by the one or more processors, cause the IHS to:
load a plurality of memory device drivers for access to the one or more replaceable memory modules, wherein each memory device driver supports a diagnostic Application Programming Interface (API);
detect a memory error that results from an attempt to access the one or more replaceable memory modules, based at least in part on a callback registered with a diagnostic system to receive memory error notifications and return a handle to the diagnostic API supported by the respective memory device driver;
determine a memory address associated with the memory error;
identify, based on the memory address, a first memory device driver of the plurality of memory device drivers for access to the memory address, and retrieve the handle to the diagnostic API supported by the first memory device driver; and
utilize, via the handle, the diagnostic API supported by the first memory device driver to identify a first of the one or more replaceable memory modules that correspond to the memory address as a source of the memory error.
The Office submits the underlined portions above recite a judicial exception.
The underlined portions of limitations (3) through (6) are directed to a series of steps to determine which memory is a source of a memory error. Limitation (3) is directed to “detecting a memory error” which may be interpreted as an observation of feedback (similar to results provided by a ‘callback’) provided in response to the triggering of the memory error. Limitation (4) is directed to “determining a memory address” which may be interpreted as evaluating the feedback provided in response to triggering of the memory error. Limitation (5) is directed to “identify, based on the memory address, a first memory device driver of the plurality of memory device drivers for access to the memory address” without further limiting how the identification is performed. As such, the limitation may simply be performed by evaluating a mapping table that maps memory addresses to device drivers. Finally, Limitation (6) is directed to “identify a first of the replaceable memory modules as a source of the memory error” which may be interpreted as evaluating another mapping table to determine an identification of a memory associated with the memory address provided in the feedback in response to triggering of the memory error. Enumerated groups of abstract ideas include “Mental Processes” (MPEP 2106.04(a)). The Office has determined limitations (3) through (6) fall within the “Mental Processes” grouping of abstract ideas as the limitations may practically be performed in the human mind, including for example, observations, evaluations, judgements, and opinions (MPEP 2106.04(a)(2)(III)).
The Office has determined the claim recites a judicial exception requiring further analysis in Prong 2.
Regarding Step 2A Prong 2, this part of the eligibility analysis evaluates whether the claim as a whole integrates the recited judicial exception into a practical application of the exception. This evaluation is performed by (a) identifying whether there are any additional elements recited in the claim beyond the judicial exception, and (b) evaluating those additional elements individually and in combination to determine whether the claim as a whole integrates the exception into a practical application. Besides the abstract idea of the claim, the claim further recites the following additional elements:
An Information Handling System (IHS), that comprises: one or more replaceable memory modules; one or more memory devices; and one or more processors coupled to the one or more memory devices, wherein the one or more memory devices comprise instructions that, upon execution by the one or more processors, cause the IHS to:
load a plurality of memory device drivers for access to the one or more replaceable memory modules, wherein each memory device driver supports a diagnostic Application Programming Interface (API);
detect a memory error that results from an attempt to access the one or more replaceable memory modules, based at least in part on a callback registered with a diagnostic system to receive memory error notifications and return a handle to the diagnostic API supported by the respective memory device driver;
determine a memory address associated with the memory error;
identify, based on the memory address, a first memory device driver of the plurality of memory device drivers for access to the memory address, and retrieve the handle to the diagnostic API supported by the first memory device driver; and
utilize, via the handle, the diagnostic API supported by the first memory device driver to identify a first of the one or more replaceable memory modules that correspond to the memory address as a source of the memory error.
Limitations (1) through (3), (5), and (6) recite the claimed system is practiced using additional elements including a replaceable memory module, a memory device, a processor, and a diagnostic system. The Office asserts the claimed additional elements are recited at a high-level of generality such that the broadest reasonable interpretation of the additional elements comprises a generic computer (e.g. ¶[0014] of the specification states the host processor may include any processor including “any general-purpose or embedded processor”). Accordingly, the additional elements do not integrate the abstract idea into a practical application because the replaceable memory module, memory device, and processor do not impose any meaningful limits on practicing the abstract idea (MPEP 2106.05(f)).
Limitations (2), (3), (5), and (6) recite additional elements that a plurality of memory device drivers are loaded {presumably into the system} where the memory device drivers further support a diagnostic API that is utilized for the identification of the memory module with the memory error. While the recited additional elements recite specific software entities are used to perform the functions of the claimed abstract idea, the additional elements of memory device drivers including support for a diagnostic API merely serve to provide a software grouping or location for the instructions used to perform the abstract idea. As such, the Office has determined that the additional elements of memory device drivers including support for a diagnostic API do no more than generally link the judicial exception to a particular technological environment or field of use (MPEP 2106.05(h)).
Limitation (2) further recites the plurality of memory device drivers are loaded; Limitation (3) and (5) further recite returning and retrieving a handle. The claim is not further limited to reciting the source or destination of the memory device drivers; the claim does not further define what a ‘handle’ is and may simply be characterized as an identifier or tag. The Office asserts the loading of memory device drivers are nominally or tangentially related to the invention of determining a particular memory as a source of a memory error based on an address associated with the error; the Office further asserts the acts of returning or retrieving a handle as being similar to writing or reading data (the handle) to a memory. As such, the Office further asserts the acts of ‘loading’, ‘returning’, and ‘retrieving’ are insignificant extra-solution activity of the abstract idea as the ‘loading’, ‘returning’, and ‘retrieving’ may be interpreted as a mere form of data gathering (MPEP 2106.05(g)).
Thus, the Office has determined that the noted additional elements fail to integrate the recited judicial exception into a practical application requiring further analysis in Step 2B.
Regarding Step 2B, this part of the eligibility analysis evaluates the additional elements of the claim to determine whether they amount to an inventive concept. As noted in the analysis of Step 2A Prong 2, the Office has determined those additional elements.
Regarding limitations (1) through (3), (5), and (6), the additional elements including a replaceable memory module, memory device, processor, and diagnostic system are recited at a high-level of generality such that they merely constitute generic computing elements and the claim thus amounts to no more than mere instructions to apply the identified abstract idea using a generic computer (MPEP 2106.05(f)).
Regarding limitations (2), (3), (5), and (6), the Office has determined that the additional elements of memory device drivers including support for a diagnostic API do no more than generally link the judicial exception to a particular technological environment or field of use since the limitations merely serve to provide a software grouping or location for the instructions used to perform the abstract idea (MPEP 2106.05(h)).
Regarding limitation (2), (3), and (5), the courts have recognized, similar to the elements of the limitations, that computer functions including “storing and retrieving information in memory” to be well-understood, routine, and conventional functions when they are claimed in merely a generic manner or as insignificant extra-solution activity (MPEP 2106.05(d)(II)).
As such, the claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception and thus is not patent eligible.
Claim 14:
The claim recites the following limitations:
A method for memory diagnostics by an Information Handling System (IHS), the method comprising:
loading a plurality of memory device drivers for accessing one or more replaceable memory modules, each memory device driver supporting a diagnostic Application Programming Interface (API);
detecting a memory error resulting from an attempt to access the one or more replaceable memory modules, based at least in part on a callback registered with a diagnostic system to receive memory error notifications and return a handle to the diagnostic API supported by the respective memory device driver;
determining a memory address associated with the memory error;
identifying, based on the memory address, a first memory device driver of the plurality of memory device drivers for access the memory address, and retrieving the handle to the diagnostic API supported by the first memory device driver; and
utilizing, via the handle, the diagnostic API supported by the first memory device driver to identify a first of the one or more replaceable memory modules as a source of the memory error.
Similar to the analysis of Claim 1 above:
The claim is directed to a method (or process); thus, the claim is directed to one of the four categories of invention.
The underlined limitations above recite a judicial exception
Limitations (2), (3), (5), and (6) recite additional elements that fail to integrate the recited judicial exception into a practical application
Limitations (2), (3), (5), and (6) do not include additional elements that are sufficient to amount to significantly more than the judicial exception
Claim 18:
The claim recites the following limitations:
A non-transitory storage device that comprises instructions stored thereon, wherein execution of the instructions by one or more processors of an Information Handling System (IHS) causes the one or more processors to:
load a plurality of memory device drivers for access to one or more replaceable memory modules, wherein each memory device driver supports a diagnostic Application Programming Interface (API);
detect a memory error that resulted from an attempt to access the one or more replaceable memory modules, based at least in part on a callback registered with a diagnostic system to receive memory error notifications and return a handle to the diagnostic API supported by the respective memory device driver;
determine a memory address associated with the memory error;
identify, based on the memory address, a first memory device driver of the plurality of memory device drivers for access the memory address, and retrieving the handle to the diagnostic API supported by the first memory device driver; and
utilize, via the handle, the diagnostic API supported by the first memory device driver to identify a first of the one or more replaceable memory modules as a source of the memory error.
Similar to the analysis of Claim 1 above:
The claim is directed to a storage device; however, the claim has not been determined to be directed to one of the four categories of invention. The remainder of this analysis assumes the ‘storage device’ is determined to be a machine/manufacture.
The underlined limitations above recite a judicial exception
Limitations (1) through (3), (5), and (6) recite additional elements that fail to integrate the recited judicial exception into a practical application
Limitations (1) through (3), (5), and (6) do not include additional elements that are sufficient to amount to significantly more than the judicial exception
Claims 2, 15, and 19:
Claim 2 recites the following limitation beyond that recited in parent Claim 1:
wherein the memory device drivers are loaded as part of a boot sequence of the IHS
The limitation is not found to further the identified “Mental Process” identified in parent Claim 1; however, Claim 2 is further directed to a judicial exception due to the identified “Mental Process” of Claim 1. Claim 2 comprises additional elements requiring further analysis under Step 2A Prong 2 and Step 2B.
While Claim 2 further recites an additional element as to when the memory device drivers are loaded, the Office maintains the additional element fails to integrate the recited judicial exception into a practical application and the additional element is not sufficient to amount to significantly more than the judicial exception for reasons similarly recited with respect to Claim 1’s analysis regarding generally linking the judicial exception to a particular technological environment or field (MPEP 2106.05(h)).
Claims 15 and 19 recite an additional limitation beyond that recited in parent Claims 14 and 18, respectively, and similar to the additional limitation recited in Claim 2. Claims 15 and 19 have been determined not to be patent eligible for reasons similarly recited in regards to the analysis performed for parent Claims 14 and 18, respectively, and related Claim 2.
Claim 3:
Claim 3 recites the following limitation beyond that recited in parent Claim 2:
wherein the boot sequence comprises a Unified Extensible Firmware Interface (UEFI) boot sequence
The limitation is not found to further the identified “Mental Process” identified in parent Claim 2; however, Claim 3 is further directed to a judicial exception due to the identified “Mental Process” of Claim 2. Claim 3 comprises additional elements requiring further analysis under Step 2A Prong 2 and Step 2B.
While Claim 3 further recites an additional element as to further limit when the memory device drivers are loaded, the Office maintains the additional element fails to integrate the recited judicial exception into a practical application and the additional element is not sufficient to amount to significantly more than the judicial exception for reasons similarly recited with respect to Claim 2’s analysis regarding generally linking the judicial exception to a particular technological environment or field (MPEP 2106.05(h)).
Claims 4, 16, and 20:
Claim 4 recites the following limitation beyond that recited in parent Claim 1:
wherein at least one of the plurality of loaded memory device drivers is selected to correspond to a computer architecture of the one or more processors
The limitation is not found to further the identified “Mental Process” identified in parent Claim 1; however, Claim 2 is further directed to a judicial exception due to the identified “Mental Process” of Claim 1. Claim 2 comprises additional elements requiring further analysis under Step 2A Prong 2 and Step 2B.
While Claim 4 further recites an additional element of a particular type of memory device driver, the Office maintains the additional element fails to integrate the recited judicial exception into a practical application and the additional element is not sufficient to amount to significantly more than the judicial exception for reasons similarly recited with respect to Claim 1’s analysis of memory device drivers regarding generally linking the judicial exception to a particular technological environment or field (MPEP 2106.05(h)).
Claims 16 and 20 recite an additional limitation beyond that recited in parent Claims 14 and 18, respectively, and similar to the additional limitation recited in Claim 4. Claims 16 and 20 have been determined not to be patent eligible for reasons similarly recited in regards to the analysis performed for parent Claims 14 and 18, respectively, and related Claim 4.
Claim 5:
Claim 5 recites the following limitation beyond that recited in parent Claim 4:
wherein the computer architecture of the one or more processors comprises x86 or Advanced RISC Machine (ARM)
The limitation is not found to further the identified “Mental Process” identified in parent Claim 4; however, Claim 5 is further directed to a judicial exception due to the identified “Mental Process” of Claim 4. Claim 5 comprises additional elements requiring further analysis under Step 2A Prong 2 and Step 2B.
While Claim 5 further recites an additional element of a particular type of processor, the Office maintains the additional element fails to integrate the recited judicial exception into a practical application and the additional element is not sufficient to amount to significantly more than the judicial exception for reasons similarly recited with respect to Claim 1’s analysis of the processors comprising generic computing elements that do not impose any meaningful limits on practicing the abstract idea (MPEP 2106.05(f)).
Claim 6:
Claim 6 recites the following limitation beyond that recited in parent Claim 1:
further comprising an embedded controller that operates from a separate power plane from the one or more processors, wherein the embedded controller identifies the detected memory error in management of the one or more replaceable memory modules
The limitation is not found to further the identified “Mental Process” identified in parent Claim 1; however, Claim 6 is further directed to a judicial exception due to the identified “Mental Process” of Claim 1. Claim 6 comprises additional elements requiring further analysis under Step 2A Prong 2 and Step 2B.
While Claim 6 further recites an additional element of an embedded controller, the Office maintains the additional element fails to integrate the recited judicial exception into a practical application and the additional element is not sufficient to amount to significantly more than the judicial exception for reasons similarly recited with respect to Claim 1’s analysis of the processors comprising generic computing elements that do not impose any meaningful limits on practicing the abstract idea (MPEP 2106.05(f)).
Claim 7:
Claim 7 recites the following limitation beyond that recited in parent Claim 1:
wherein the memory error comprises an error that resulted from an attempt to read or write to the memory address.
Beyond the analysis of Claim 1, the underlined portions of Claim 7 further limit the identified abstract idea of Claim 1 effectively by characterizing when and how the ‘memory error’ is observed. For similar reasons provided in the analysis the limitations in conjunction with Claim 1 above, the Office has determined that the limitation further falls within the “Mental Processes” grouping as the limitation can practically be performed in the human mind, including for example, observations, evaluations, judgements, and opinions (MPEP 2106.04(a)(2)(III)). The claim does not comprise any additional elements requiring analysis under Step 2A Prong 2 and Step 2B.
Claim 8:
Claim 8 recites the following limitation beyond that recited in parent Claim 1:
wherein execution of the instructions by the one or more processors further causes the IHS to track memory errors attributed to each of the one or more replaceable memory modules
Beyond the analysis of Claim 1, the underlined portions of Claim 8 further limit the identified abstract idea of Claim 1 effectively by further observing memory errors by tracking. For similar reasons provided in the analysis the limitations in conjunction with Claim 1 above, the Office has determined that the limitation further falls within the “Mental Processes” grouping as the limitation can practically be performed in the human mind, including for example, observations, evaluations, judgements, and opinions (MPEP 2106.04(a)(2)(III)). The claim comprises additional elements requiring further analysis under Step 2A Prong 2 and Step 2B.
While Claim 8 further recites an additional elements of processors and replaceable memory modules, the Office maintains the additional element fails to integrate the recited judicial exception into a practical application and the additional element is not sufficient to amount to significantly more than the judicial exception for reasons similarly recited with respect to Claim 1’s analysis of the processors and memory modules comprise generic computing elements that do not impose any meaningful limits on practicing the abstract idea (MPEP 2106.05(f)).
Claim 9:
Claim 9 recites the following limitation beyond that recited in parent Claim 8:
wherein execution of the instructions by the one or more processors further causes the IHS to signal a fault in the first of the one or more replaceable memory modules when the tracked memory errors attributed to the first of the one or more replaceable memory modules are in excess of a threshold level
Beyond the analysis of Claim 8, the underlined portions of Claim 9 further limit the identified abstract idea of Claim 8 by issuing a message when a number of memory errors is compared to a threshold number. For similar reasons provided in the analysis the limitations in conjunction with Claim 8 above, the Office has determined that the limitation further falls within the “Mental Processes” grouping as the limitation can practically be performed in the human mind, including for example, observations, evaluations, judgements, and opinions (MPEP 2106.04(a)(2)(III)). The claim comprises additional elements requiring further analysis under Step 2A Prong 2 and Step 2B.
While Claim 9 further recites an additional elements of processors and replaceable memory modules, the Office maintains the additional element fails to integrate the recited judicial exception into a practical application and the additional element is not sufficient to amount to significantly more than the judicial exception for reasons similarly recited with respect to Claim 8’s analysis of the processors and memory modules comprise generic computing elements that do not impose any meaningful limits on practicing the abstract idea (MPEP 2106.05(f)).
Claim 10:
Claim 10 recites the following limitation beyond that recited in parent Claim 9:
wherein the fault is signaled in the first of the one or more replaceable memory modules when the tracked memory errors attributed to the first of the one or more replaceable memory modules are in excess of a threshold level over a moved time interval
Beyond the analysis of Claim 9, the underlined portions of Claim 10 further limit the identified abstract idea of Claim 9 by issuing a message when a rate of a number of memory errors over a period of time is compared to a threshold number. For similar reasons provided in the analysis the limitations in conjunction with Claim 9 above, the Office has determined that the limitation further falls within the “Mental Processes” grouping as the limitation can practically be performed in the human mind, including for example, observations, evaluations, judgements, and opinions (MPEP 2106.04(a)(2)(III)). The claim comprises additional elements requiring further analysis under Step 2A Prong 2 and Step 2B.
While Claim 10 further recites an additional elements of replaceable memory modules, the Office maintains the additional element fails to integrate the recited judicial exception into a practical application and the additional element is not sufficient to amount to significantly more than the judicial exception for reasons similarly recited with respect to Claim 8’s analysis of the memory modules comprise generic computing elements that do not impose any meaningful limits on practicing the abstract idea (MPEP 2106.05(f)).
Claim 11:
Claim 11 recites the following limitation beyond that recited in parent Claim 9:
wherein diagnostic operations are initiated on the first of the one or more replaceable memory modules in response to the signaled fault
The limitation is not found to further the identified “Mental Process” identified in parent Claim 9; however, Claim 11 is further directed to a judicial exception due to the identified “Mental Process” of Claim 9. Claim 11 comprises additional elements requiring further analysis under Step 2A Prong 2 and Step 2B.
While Claim 11 further recites an additional element of ‘the first replaceable memory module’, the Office maintains the additional element fails to integrate the recited judicial exception into a practical application and the additional element is not sufficient to amount to significantly more than the judicial exception for reasons similarly recited with respect to Claim 1’s analysis of the memory modules comprising generic computing elements that do not impose any meaningful limits on practicing the abstract idea (MPEP 2106.05(f)). While Claim 11 further recites an additional element of initiating diagnostic operations in response to the signaled fault, the Office asserts the limitation serves to merely indicate the idea of a solution or outcome while failing to recite any details as to how a solution of a problem is accomplished. The Office maintains the additional element fails to integrate the recited judicial exception into a practical application and the additional element is not sufficient to amount to significantly more than the judicial exception since the limitation amounts to no more than the words “apply it” (MPEP 2106.05(f)).
Claims 12 and 17:
Claim 12 recites the following limitation beyond that recited in parent Claim 1:
wherein execution of the instructions by the one or more processors further causes the IHS to request a handle to the diagnostic API from each of the one or more memory device drivers
The limitation is not found to further the identified “Mental Process” identified in parent Claim 1; however, Claim 12 is further directed to a judicial exception due to the identified “Mental Process” of Claim 1. Claim 12 comprises additional elements requiring further analysis under Step 2A Prong 2 and Step 2B.
While Claim 12 further recites a request for an identifier of a software interface, the Office maintains the additional element fails to integrate the recited judicial exception into a practical application and the additional element is not sufficient to amount to significantly more than the judicial exception for reasons similarly recited with respect to Claim 1’s analysis regarding generally linking the judicial exception to a particular technological environment or field (MPEP 2106.05(h)).
Claim 17 recites an additional limitation beyond that recited in parent Claim 14 and similar to the additional limitation recited in Claim 12. Claim 17 have been determined not to be patent eligible for reasons similarly recited in regards to the analysis performed for parent Claim 14 and related Claim 12.
Claim 13:
Claim 13 recites the following limitation beyond that recited in parent Claim 12:
wherein the handle to the diagnostic API is utilized to identify the first of the replaceable memory modules as the source of the memory error
The limitation is not found to further the identified “Mental Process” identified in parent Claim 12; however, Claim 13 is further directed to a judicial exception due to the identified “Mental Process” of Claim 12. Claim 13 comprises additional elements requiring further analysis under Step 2A Prong 2 and Step 2B.
While Claim 13 further recites using an identifier of a software interface, the Office maintains the additional element fails to integrate the recited judicial exception into a practical application and the additional element is not sufficient to amount to significantly more than the judicial exception for reasons similarly recited with respect to Claim 12’s analysis regarding generally linking the judicial exception to a particular technological environment or field (MPEP 2106.05(h)).
Claims in view of Prior Art
Claims 1-20 are allowed over prior art.
Exemplary independent Claim 1 (and similarly independent Claims 14 and 18) is directed to a system for determining a source memory of a detected memory error. While prior art including ROBERTS (US PGPub 2021/0318922) disclose the determination of a faulty physical memory region responsive to a memory fault map determined by multiple addresses from multiple physical memory faults, prior art has not been found to anticipate or render obvious the particular components and process as a whole for determining the source of the memory error including using memory device drivers supporting a diagnostic API.
The Office would like to emphasize that while one or more reasons are offered as to why the claims are allowable over the prior art, it is each claim, taken as a whole, including interrelationships and interconnections between various claimed elements which are allowable over the prior art of record and not any individual limitation of a claim.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC T LOONAN whose telephone number is (571)272-6994. The examiner can normally be reached M-F 8am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arpan Savla can be reached at 571-272-1077. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERIC T LOONAN/Examiner, Art Unit 2137