DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are pending in the application.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
Acknowledgment is made of applicant’s Information Disclosure Statement(s) (IDS), Form PTO-1449, filed 03 April 2024 and 11 February 2025. The information therein was considered.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 20 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 20 recites “The method of claim 19, wherein the method further comprises: preparing a pixel definition layer on the substrate, wherein the pixel definition layer comprises pixel defining portions and pixel openings enclosed by the pixel defining portions, and at least part of each pixel electrode is exposed by a respective pixel opening; the pixel openings comprise first pixel openings, second pixel openings, and third pixel openings; the light-emitting unit comprises a first light-emitting unit located within respective first pixel opening, a second light-emitting unit located within respective second pixel opening, and a third light-emitting unit located within respective third pixel opening; the first encapsulation portion comprises a first encapsulation portion located on a side of the first light-emitting unit away from the substrate, a second encapsulation portion located on a side of the second light-emitting unit away from the substrate, and a third encapsulation portion located on a side of the third light-emitting unit away from the substrate; and in the step of preparing a light-emitting layer and a encapsulation layer on the substrate, the method further comprises: disposing a first light-emitting material layer and a first encapsulation sub material layer on a side of the pixel definition layer away from the substrate, and patterning the first light-emitting material layer and the first encapsulation sub material layer to form a first light-emitting unit and a first encapsulation portion; continuing to dispose a second light-emitting material layer and a second encapsulation sub material layer on the side of the pixel definition layer away from the substrate, and to pattern the second light-emitting material layer and the second encapsulation sub material layer to form a second light-emitting unit and a second encapsulation portion; continuing to dispose a third light-emitting material layer and a third encapsulation sub material layer on the side of the pixel definition layer away from the substrate, and to pattern the third light-emitting material layer and the third encapsulation sub material layer to form a third light-emitting unit and a third encapsulation portion; and preparing second encapsulation portions on the first encapsulation portion, the second encapsulation portion, the third encapsulation portion, and the pixel definition layer” (emphasis added).
The term “first encapsulation portion” is recited in lines 8-9, 18 and 27. It is unclear whether “the first encapsulation portion” of lines 8-9 is referring to the same “first encapsulation portion” recited in line 18 and/or line 27. It is unclear whether the “second encapsulation portion” of line 10 is referring to the same “second encapsulation portion” recited in line 22 and/or line 27 and/or line 27-28. It is unclear whether the “third encapsulation portion” of line 11 is referring to the same “third encapsulation portion” recited in line 26 and/or line 28. The limitation “the first encapsulation portion comprises a first encapsulation portion” in lines 8-9 is ambiguous. Clarification is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-6, 13-15 and 18-20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kim et al. (US 2023/0403884) (hereinafter, “Kim”).
Re: independent claim 1, Kim discloses in fig. 4 a display panel, comprising: a substrate (110); a spacer layer located on the substrate and comprising a first portion (SPC) and a second portion (134) located on a side of the first portion (SPC) facing the substrate, an orthographic projection area of the first portion (SPC) on the substrate (110) being greater than that of the second portion (134) on the substrate (110), the spacer layer enclosing an isolation space (EA), and the spacer layer having a groove (UC_134) protruding to a side wall of the isolation space (EA); a light-emitting layer (EML) comprising a light-emitting unit (EMD) located in the isolation space (EA); and an encapsulation layer (140) located on a side of the light-emitting layer (EML) away from the substrate and comprising a first encapsulation portion (141) and a second encapsulation portion (142, 143) that are stacked, at least a portion of the first encapsulation portion (141) being located in the groove (UC_134), and the second encapsulation portion (142, 143) being located on a side of the first encapsulation portion (141) away from the substrate (110).
Re: claim 2, Kim discloses in fig. 4 the display panel of claim 1, wherein the display panel further comprises: a pixel definition layer (133) located on the substrate, wherein the pixel definition layer comprises a plurality of pixel defining portions (NEA) and a plurality of pixel openings (EA) enclosed by the pixel defining portions, and at least part of each pixel electrode (AND) is exposed from a respective pixel opening.
Re: claim 3, Kim discloses in fig. 4 the display panel of claim 1, wherein a thickness of the first encapsulation portion (141) is smaller than that of the second encapsulation portion (142).
Re: claim 4, Kim discloses in fig. 4 the display panel of claim 1, wherein a material of the first encapsulation (141) portion comprises silicon oxide or silicon oxynitride [0193].
Re: claim 5, Kim discloses in fig. 4 the display panel of claim 1, wherein a material of the second encapsulation portion (143) comprises silicon nitride [0193].
Re: claim 6, Kim discloses in fig. 4 the display panel of claim 1, wherein a distance between a surface of the first portion (SPC) facing the substrate (110) and the substrate is defined as a first distance, a distance between a surface of the first encapsulation portion (141) away from the substrate (110) and the substrate is defined as a second distance, and the second distance is smaller than or equal to the first distance (fig. 4).
Re: claim 13, Kim discloses in fig. 4 the display panel of claim 1, wherein the second encapsulation portion (142) is at least partially located within the isolation space (EA).
Re: claim 14, Kim discloses in fig. 4 the display panel according to claim 1, wherein the second encapsulation portion (142, 143) comprises a first portion and a second portion that are integrated, the first portion is located within the isolation space (EA), and the second portion is located on a surface of the spacer layer (SPC, 134) away from the substrate (110).
Re: claim 15, Kim discloses in fig. 4 the display panel of claim 1, wherein the second encapsulation portion (142, 143) fully covers the first encapsulation portion (141).
Re: claim 18, Kim discloses in fig. 4 the display device, comprising the display panel of claim 1 (fig. 1).
Re: independent claim 19, Kim discloses in figs. 4 and 14-30 the method for preparing a display panel, comprising: preparing a spacer layer on a substrate, wherein the spacer layer comprises a first portion (SPC) and a second portion (134) located on a side of the first portion facing the substrate, an orthographic projection area of the first portion (SPC) on the substrate (110) is greater than that of the second portion (134) on the substrate (110), the spacer layer encloses an isolation space (EA), and the spacer layer has a groove (UC_134) protruding a side wall of the isolation space (EA); preparing a light-emitting layer (EML) and a encapsulation layer (140) on the substrate, wherein the light-emitting layer (EML) comprises a light-emitting unit (EMD) located in the isolation space (EA), the encapsulation layer comprises a first encapsulation portion (140) and a second encapsulation portion (142, 143) that are stacked, at least a portion of the first encapsulation portion (141) is located in the groove (UC_134), and the second encapsulation portion (142, 143) is located on a side of the first encapsulation (141) portion away from the substrate (110).
Re: claim 20, Kim discloses in figs. 4 and 14-30 the method of claim 19, wherein the method further comprises: preparing a pixel definition layer (133) on the substrate, wherein the pixel definition layer comprises pixel defining portions (NEA) and pixel openings (EA) enclosed by the pixel defining portions, and at least part of each pixel electrode (AND) is exposed by a respective pixel opening; the pixel openings comprise first pixel openings (EA1), second pixel openings (EA2), and third pixel openings (EA3); the light-emitting unit (EMD) comprises a first light-emitting unit (including EML1) located within respective first pixel opening (EA1), a second light-emitting unit (including EML2) located within respective second pixel opening (EA2), and a third light-emitting unit (including EML3) located within respective third pixel opening (EA3); the first encapsulation portion (141) comprises a first encapsulation portion (see 35 U.S.C. 112(b) rejection above) located on a side of the first light-emitting unit (including EML1) away from the substrate, a second encapsulation portion (141) located on a side of the second light-emitting unit (including EML2) away from the substrate, and a third encapsulation portion (141) located on a side of the third light-emitting unit (including EML3) away from the substrate; and in the step of preparing a light-emitting layer and an encapsulation layer on the substrate, the method further comprises: disposing a first light-emitting material layer (EML1) and a first encapsulation sub material layer (141) on a side of the pixel definition layer (133) away from the substrate, and patterning the first light-emitting material layer and the first encapsulation sub material layer to form a first light-emitting unit and a first encapsulation portion (fig. 27) (see 35 U.S.C. 112(b) rejection above); continuing to dispose a second light-emitting material layer (EML2) and a second encapsulation sub material layer (141) on the side of the pixel definition layer (133) away from the substrate, and to pattern the second light-emitting material layer and the second encapsulation sub material layer to form a second light-emitting unit and a second encapsulation portion (fig. 27) (see 35 U.S.C. 112(b) rejection above); continuing to dispose a third light-emitting material layer (EML3) and a third encapsulation sub material layer (141) on the side of the pixel definition layer away from the substrate, and to pattern the third light-emitting material layer and the third encapsulation sub material layer to form a third light-emitting unit and a third encapsulation portion (fig. 27) (see 35 U.S.C. 112(b) rejection above); and preparing second encapsulation portions (142, 143) on the first encapsulation portion (141), the second encapsulation portion (141), the third encapsulation portion (141), and the pixel definition layer (133) (see 35 U.S.C. 112(b) rejection above).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2023/0403884) (hereinafter, “Kim”).
Re: claim 16, Kim discloses the display panel of claim 1.
Kim does not disclose expressly wherein a thickness of the first encapsulation portion ranges from 0.1 μm to 0.5 μm.
However, these limitations would have been obvious to one of ordinary skill in the art at the time of the invention since it has been held that claimed ranges of a result effective variable are unpatentable unless they produce a new and unexpected result which is different in kind and not merely in degree from the results of the prior art. In re Huang, 40 USPQ2d 1685, 1688 (Fed. Cir. 1996). These claims are prima facie obvious without showing that the claimed ranges achieve unexpected results relative to the prior art range. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). See also In re Boesch, 205 USPQ 215 (CCPA 1980) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art) and In re Aller, 105 USPQ 233 (CCPA 1955) (selection of optimum ranges within prior art general conditions is obvious). See MPEP § 2144.05.
Allowable Subject Matter
Claims 7-12 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Choung et al. US 11,476,313 teach an OLED panel including inorganic overhang structures disposed on pixel-defining layers and an encapsulation layer extending under the inorganic overhang structures.
The examiner has cited particular columns and line numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. When responding to this office action, applicants are advised to provide the examiner with the line numbers and page numbers in the application and/or references cited to assist the examiner in locating appropriate paragraphs.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALLISON BERNSTEIN whose telephone number is (571)272-9011. The examiner can normally be reached M-F 8AM-5PM.
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/ALLISON BERNSTEIN/Primary Examiner, Art Unit 2824 6/1/2026
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