Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-22 are presented for examination
Information Disclosure Statement
The information disclosure statement (IDS) filed on April 3rd, 2023 is being considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
PNG
media_image1.png
406
667
media_image1.png
Greyscale
Annotated Fig. 9 – Mishra
PNG
media_image2.png
420
582
media_image2.png
Greyscale
Annotated Fig.3 - Mishra
Claim(s) 1-21 is/are rejected under 35 U.S.C 103 as being unpatentable over Mishra et al. (US 20100289067 A1), hereinafter Mishra, and further in view of Torabi et al. (US 20210202729 A1); hereinafter Torabi.
As to Claim 1, Mishra teaches: A field effect transistor (Fig.9) comprising:
a substrate (substrate 1);
a buffer region (buffer layer 2) over the substrate (substrate 1) and doped with a deep acceptor (Fig.9, [0026] “buffer layer 2 can be intentionally doped, such as with iron (Fe), carbon (C)”);
a backbarrier region (dispersion blocking layer 3) over the buffer region (buffer layer 2) having a thickness in a range of 50 to 5000 Angstroms (Fig.9, [0027] “less than 500 nm thick, for example, less than 200 nm thick”);
a channel region (channel layer 4) over the backbarrier region (dispersion blocking layer 3, Fig.9);
a source region (source contact 6) and a drain region (drain contact 9) arranged such that at least a portion of the channel
region (channel layer 4) resides between the source region and the drain region (Fig. 9. [0009] “source contact and drain contact are in electrical contact with the 2DEG and the device is a depletion mode FET”; and
a gate contact (gate contact 7) over the channel region (channel layer 4) and between the source region (source contact 6) and the drain region (drain contact 9, Fig.9).
Mishra does not disclose the exact claimed thickness of the backbarrier region to be in a range of 50 to 5000 Angstroms, but teaches a range of less than 500nm [5000 Angstroms]. A prima facie case of obviousness exists where the claimed ranges or amounts “overlap or lie inside ranges disclosed by the prior art”. See MPEP 2144.05. Mishra states that a thin layer allows for intentional doping which prevents electrons from getting trapped in the buffer layer reducing electron injection and trapping (Mishra, [0027]).
Mishra does not explicitly teach: at a concentration in a range of 1 X 1016 cm-3 to 1 X 1019 cm-3 ; Mishra discloses doping a buffer layer 2 [buffer region] with carbon, but fails to include the concentration at which it was doped at.
However, in an analogous art, Torabi teaches: at a concentration in a range of 1 X 1016 cm-3 to 1 X 1019 cm-3 ([0037] “a beryllium dopant having a doping concentration in a range of 5×1016 to 3×1019 atoms/cm3; and, a carbon dopant having a doping concentration less than the doping concentration of the beryllium, but higher than 1×1016 atoms/cm3”); A prima facie case of obviousness exists where the claimed ranges or amounts “overlap or lie inside ranges disclosed by the prior art”. See MPEP 2144.05. Torabi discloses that levels higher than the doping concentrations provided would result in significant degradation of the GaN crystal quality and results in higher levels of off state leakage and current collapse ([0011], [0020]).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the instant application to apply the teaching of Torabi to modify Mishra. One would be motivated to do so as the concentration range given by Torabi prevents the dopants from acting as high levels of long-lived traps which reduces the current collapse and keeps the off-state leakage at a low and manageable level (Torabi, [0023]).
As to Claim 2, Mishra/Torabi teaches: The field effect transistor of claim 1 (Mishra, Fig.9; Torabi [0037]) wherein the buffer region (Mishra, buffer layer 2) is formed from gallium nitride (GaN) (Mishra, Fig.3, [0026] “can be a simple layer of a single material” [0030] “an iron doped GaN layer 22 on the nucleation layer”), and the backbarrier region (Mishra, dispersion blocking layer 3) is formed from aluminum gallium nitride (AlGaN) (Mishra, Fig.3, [0029] “ can be formed of a III-nitride layer… ternary alloy such as AxGa1-xN with 0≦x<1”).
As to Claim 3, Mishra/Torabi teaches: The field effect transistor of claim 2 (Fig. 3,9; Torabi [0037]) wherein the buffer region (buffer layer 2) is doped with the deep acceptor ([0026] “buffer layer 2 can be intentionally doped, such as with iron (Fe), carbon (C)”).
Mishra does not explicitly teach: at a concentration in a range of 2 X 1016 cm-3 to 5 X 1017 cm-3. Mishra discloses doping a buffer layer 2 [buffer region] with carbon, but fails to include the concentration at which it was doped at.
However, in an analogous art, Torabi teaches: at a concentration in a range of 2 X 1016 cm-3 to 5 X 1017 cm-3. ([0037] “a beryllium dopant having a doping concentration in a range of 5×1016 to 3×1019 atoms/cm3; and, a carbon dopant having a doping concentration less than the doping concentration of the beryllium, but higher than 1×1016 atoms/cm3”); A prima facie case of obviousness exists where the claimed ranges or amounts “overlap or lie inside ranges disclosed by the prior art”. See MPEP 2144.05. Torabi discloses that levels higher than the doping concentrations provided would result in significant degradation of the GaN crystal quality and results in higher levels of off state leakage and current collapse ([0011], [0020]).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the instant application to apply the teaching of Torabi to modify Mishra. One would be motivated to do so as the concentration range given by Torabi prevents the dopants from acting as high levels of long-lived traps which reduces the current collapse and keeps the off-state leakage at a low and manageable level ([Torabi, [0023]).
As to Claim 4, Mishra/Torabi teaches: The field effect transistor of claim 2 (Mishra, Fig. 3, 9; Torabi [0037]) wherein the thickness of the backbarrier region (Mishra, dispersion blocking layer 3) is in a range of 200 to 2000 Angstroms (Mishra, [0027] “less than 500 nm thick, for example, less than 200 nm thick”).
Mishra does not disclose the exact claimed thickness of the backbarrier region to be in a range of 200 to 2000 Angstroms, but teaches a range of less than 500nm [5000 Angstroms]. A prima facie case of obviousness exists where the claimed ranges or amounts “overlap or lie inside ranges disclosed by the prior art”. See MPEP 2144.05. Mishra states that a thin layer allows for intentional doping which prevents electrons from getting trapped in the buffer layer reducing electron injection and trapping (Mishra, [0027]).
As to Claim 5, Mishra/Torabi teaches: The field effect transistor of claim 2 (Mishra, Fig. 3, 9; Torabi [0037]) wherein the thickness of the backbarrier region (Mishra, dispersion blocking layer 3) is in a range of 500 to 1500 Angstroms (Mishra, [0027] “less than 500 nm thick, for example, less than 200 nm thick”).
Mishra does not disclose the exact claimed thickness of the backbarrier region to be in a range of 500 to 1500 Angstroms, but teaches a range of less than 500nm [5000 Angstroms]. A prima facie case of obviousness exists where the claimed ranges or amounts “overlap or lie inside ranges disclosed by the prior art”. See MPEP 2144.05. Mishra states that a thin layer allows for intentional doping which prevents electrons from getting trapped in the buffer layer reducing electron injection and trapping (Mishra, [0027]).
As to Claim 6, Mishra/Torabi teaches: The field effect transistor of claim 2 (Mishra, Fig. 3, 9; Torabi [0037]) wherein the deep acceptor is carbon (Mishra, [0026] “buffer layer 2 can be intentionally doped, such as with iron (Fe), carbon (C)”).
As to Claim 7, Mishra/Torabi teaches: The field effect transistor of claim 2 (Mishra, Fig. 3, 9; Torabi [0037]) wherein the substrate (Mishra, substrate 1) is formed from silicon carbide (SiC) (Mishra, [0030] “Substrate 1 is silicon carbide”).
As to Claim 8, Mishra/Torabi teaches: The field effect transistor of claim 1 (Fig.9; Torabi [0037]) wherein:
the substrate (substrate 1) is formed from silicon carbide (SiC) ([0030] “Substrate 1 is silicon carbide”);
the buffer region (buffer layer 2) is formed from gallium nitride (GaN) (Fig.3, [0026] “can be a simple layer of a single material”; [0030] “an iron doped GaN layer 22 on the nucleation layer”);
the backbarrier region (dispersion blocking layer 3) is formed from aluminum gallium nitride (AlGaN) (Fig.3, [0029] “ can be formed of a III-nitride layer… ternary alloy such as AlxGa1-xN with 0≦x<1”); and
the buffer region is doped with the deep acceptor (Mishra, [0026] “buffer layer 2 can be intentionally doped, such as with iron (Fe), carbon (C)”)
Mishra does not explicitly teach: at a concentration in a range of 2 X 1016 cm-3 to 5 X 1017 cm-3. Mishra discloses doping a buffer layer 2 [buffer region] with carbon, but fails to include the concentration at which it was doped at.
However, in an analogous art, Torabi teaches: at a concentration in a range of 2 X 1016 cm-3 to 5 X 1017 cm-3 ([0037] “a beryllium dopant having a doping concentration in a range of 5×1016 to 3×1019 atoms/cm3; and, a carbon dopant having a doping concentration less than the doping concentration of the beryllium, but higher than 1×1016 atoms/cm3”); A prima facie case of obviousness exists where the claimed ranges or amounts “overlap or lie inside ranges disclosed by the prior art”. See MPEP 2144.05. Torabi discloses that levels higher than the doping concentrations provided would result in significant degradation of the GaN crystal quality and results in higher levels of off state leakage and current collapse ([0011], [0020]).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the instant application to apply the teaching of Torabi to modify Mishra. One would be motivated to do so as the concentration range given by Torabi prevents the dopants from acting as high levels of long-lived traps which reduces the current collapse and keeps the off-state leakage at a low and manageable level (Torabi, [0023]).
As to Claim 9, Mishra/Torabi teaches: The field effect transistor of claim 8 (Mishra, Fig.3,9; Torabi [0037]) wherein the thickness of the backbarrier region (Mishra, dispersion blocking layer 3) is in a range of 200 to 2000 Angstroms (Mishra, [0027] “less than 500 nm thick, for example, less than 200 nm thick”).
Mishra does not disclose the exact claimed thickness of the backbarrier region to be in a range of 200 to 2000 Angstroms, but teaches a range of less than 500nm [5000 Angstroms]. A prima facie case of obviousness exists where the claimed ranges or amounts “overlap or lie inside ranges disclosed by the prior art”. See MPEP 2144.05. Mishra states that a thin layer allows for intentional doping which prevents electrons from getting trapped in the buffer layer reducing electron injection and trapping (Mishra, [0027]).
As to Claim 10, Mishra/Torabi teaches: The field effect transistor of claim 8 (Mishra, Fig.3,9; Torabi [0037]) wherein the thickness of the backbarrier region (Mishra, dispersion blocking layer 3) is in a range of 500 to 1500 Angstroms (Mishra, [0027] “less than 500 nm thick, for example, less than 200 nm thick”).
Mishra does not disclose the exact claimed thickness of the backbarrier region to be in a range of 500 to 1500 Angstroms, but teaches a range of less than 500nm [5000 Angstroms]. A prima facie case of obviousness exists where the claimed ranges or amounts “overlap or lie inside ranges disclosed by the prior art”. See MPEP 2144.05. Mishra states that a thin layer allows for intentional doping which prevents electrons from getting trapped in the buffer layer reducing electron injection and trapping (Mishra, [0027]).
As to Claim 11, Mishra/Torabi teaches: The field effect transistor of claim 10 (Mishra, Fig.3,9; Torabi [0037]) wherein the deep acceptor dopant is carbon (Mishra, [0026] “buffer layer 2 can be intentionally doped, such as with iron (Fe), carbon (C)”).
As to Claim 12, Mishra/Torabi teaches: The field effect transistor of claim 8 (Mishra, Fig.3,9; Torabi [0037]) wherein the deep acceptor is carbon (Mishra, [0026] “buffer layer 2 can be intentionally doped, such as with iron (Fe), carbon (C)”).
As to Claim 13, Mishra/Torabi teaches: The field effect transistor of claim 12 (Mishra Fig.3,9; Torabi [0037]) further comprising:
a spacer region (Mishra, Fig.3, [0030] “0.6 nm AlN layer 51”) over the channel region (channel layer 4);
a top barrier region (Mishra, Fig. 3, [0030] “27 nm Al0.28Ga0.72N layer 52”) over the spacer region (Mishra, 0.6 nm AlN layer 51);
the spacer region is formed from aluminum nitride (AlN) (Mishra, [0030] “0.6 nm AlN layer 51”);
the top barrier region comprises aluminum, gallium, and nitride (AlGaN) (Mishra, [0030] “27 nm Al0.28Ga0.72N layer 52”);
and the cap region comprises gallium nitride (GaN).
Mishra does not explicitly teach: and a cap region over the top barrier region, wherein: the gate contact is over the cap region; Mishra discloses a 27 nm Al0.28Ga0.72N layer 52 [top barrier region] and a gate contact 7 [gate contact] but does not form a cap region which is over a top barrier layer or disclose a gate contact over a cap region as claimed.
However, in an analogous art, Torabi teaches: and a cap region (Fig.3C, GaN cap layer) over the top barrier region (Fig.3C, AlGaN barrier), wherein: the gate contact (Schottky gate contact, [0039]) is over the cap region (Fig.3C, [0039] “drain contacts and a Schottky gate contact, fabricated from the epitaxial structures shown in FIGS. 3A, 3B and 3C”).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the instant application to supplement the FET structure as taught by Mishra to include a GaN cap layer. One would be motivated to do so as the GaN cap layer acts as a high resistivity buffer layer (Torabi, [0038]).
As to Claim 14, Mishra/Torabi teaches: The field effect transistor of claim 8 (Mishra, Fig.3, 9; Torabi [0037]) wherein the backbarrier region (Mishra, dispersion blocking layer 3) is formed from AlxGa1-xN, wherein x = 0.01 – 0.15 (Mishra, Fig.3, [0029] “ can be formed of a III-nitride layer… ternary alloy such as AlxGa1-xN with 0≦x<1”).
Mishra does not disclose the exact range of ‘x’ of the chemical compound to be in a range of x=0.01-0.15 but teaches a range 0≦x<1, which the claimed range lies entirely within. A prima facie case of obviousness exists where the claimed ranges or amounts “overlap or lie inside ranges disclosed by the prior art”. See MPEP 2144.05. The range disclosed by Mishra is where the compound is graded or stepped in Al composition (Mishra, [0029]).
As to Claim 15, Mishra/Torabi teaches: The field effect transistor of claim 1 (Mishra, Fig.9; Torabi [0037]) wherein the backbarrier region (Mishra, dispersion blocking layer 3) is formed from AlxGa1-xN, wherein x = 0.01 – 0.15 (Mishra, Fig.3, [0029] “ can be formed of a III-nitride layer… ternary alloy such as AlxGa1-xN with 0≦x<1”).
Mishra does not disclose the exact range of ‘x’ of the chemical compound to be in a range of x=0.01-0.15 but teaches a range 0≦x<1, which the claimed range lies entirely within. A prima facie case of obviousness exists where the claimed ranges or amounts “overlap or lie inside ranges disclosed by the prior art”. See MPEP 2144.05. The range disclosed by Mishra is where the compound is graded or stepped in Al composition (Mishra, [0029]).
As to Claim 16, Mishra/Torabi teaches: The field effect transistor of claim 15 (Mishra, Fig.9; Torabi [0037]) wherein the channel region (Mishra, channel layer 4) has a thickness in a range of 30 to 500 Angstroms (Mishra, [0030] “thickness of less than 500 nm, such as about 50 nm”).
Mishra does not disclose the exact claimed thickness of the channel region to be in a range of 30 to 500 Angstroms, but teaches a range of less than 500nm [5000 Angstroms]. A prima facie case of obviousness exists where the claimed ranges or amounts “overlap or lie inside ranges disclosed by the prior art”. See MPEP 2144.05. Mishra states that a thick channel region is not needed since it is difficult to grow uninterrupted gallium nitride layers on silicon substrates (Mishra, [0010]).
As to Claim 17, Mishra/Torabi teaches: The field effect transistor of claim 1 (Mishra, Fig.9; Torabi [0037]) wherein the channel region (Mishra, channel layer 4) has a thickness in a range of 30 to 500 Angstroms (Mishra, [0030] “thickness of less than 500 nm, such as about 50 nm”).
Mishra does not disclose the exact claimed thickness of the channel region to be in a range of 30 to 500 Angstroms, but teaches a range of less than 500nm [5000 Angstroms]. A prima facie case of obviousness exists where the claimed ranges or amounts “overlap or lie inside ranges disclosed by the prior art”. See MPEP 2144.05. Mishra states that channel region within this region is the optimal thickness range for this since it is difficult to grow uninterrupted gallium nitride layers on silicon substrates (Mishra, [0010]).
As to Claim 18, Mishra/Torabi teaches: The field effect transistor of claim 1 (Mishra Fig.9; Torabi [0037]) further comprising:
a spacer region (0.6 nm AlN layer 51) over the channel region (channel layer 4) (Fig.3);
a top barrier region (27 nm Al0.28Ga0.72N layer 52) over the spacer region (0.6 nm AlN layer 51, Fig.3);
Mishra does not explicitly teach: and a cap region over the top barrier region, wherein: the gate contact is over the cap region; Mishra discloses a 27 nm Al0.28Ga0.72N layer 52 [top barrier region] and a gate contact 7 [gate contact] but does not form a cap region which is over a top barrier layer or disclose a gate contact over a cap region as claimed.
However, in an analogous art, Torabi teaches: and a cap region (Fig.3C, GaN cap layer) over the top barrier region (Fig.3C, AlGaN barrier), wherein: the gate contact (Schottky gate contact, [0039]) is over the cap region (Fig.3C, [0039] “drain contacts and a Schottky gate contact, fabricated from the epitaxial structures shown in FIGS. 3A, 3B and 3C”).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the instant application to supplement the FET structure as taught by Mishra to include a GaN cap layer. One would be motivated to do so as the GaN cap layer acts as a high resistivity buffer layer (Torabi, [0038]).
As to Claim 19, Mishra/Torabi teaches: The field effect transistor of claim 18 (Mishra FIG. 9; ; Torabi [0037]) wherein:
the substrate (substrate 1) is formed from silicon carbide (SiC) ([0030] “Substrate 1 is silicon carbide”);
the spacer region (0.6 nm AlN layer 51) is formed from aluminum nitride (AlN) (Fig.3, [0030] “0.6 nm AlN layer 51”);
the top barrier region (27 nm Al0.28Ga0.72N layer 52) comprises aluminum gallium nitride (AlGaN) ([0030] “27 nm Al0.28Ga0.72N layer 52”);
Mishra does not explicitly teach: and the cap region comprises gallium nitride (GaN).
However, in an analogous art, Torabi teaches: and the cap region comprises gallium nitride (GaN) (Fig.3C, GaN cap layer) .
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the instant application to supplement the FET structure as taught by Mishra to include a GaN cap layer. One would be motivated to do so as the GaN cap layer acts as a high resistivity buffer layer (Torabi, [0038]).
As to Claim 20, Mishra/Torabi teaches: The field effect transistor of claim 1 (Mishra, Fig.9; ; Torabi [0037]) wherein the field effect transistor is a high electron mobility transistor (Mishra, [0035] “Fig. 9 shows a cross-section of a GaN-on-Si depletion mode (D-mode) HEMT that has a dispersion blocking layer”).
As to Claim 21, Mishra teaches: A method of fabricating a field effect transistor comprising (Fig.9):
providing a substrate (Fig.9, substrate 1);
providing a buffer region (buffer layer 2) over the substrate (substrate 1) and doped with a deep acceptor (Fig.9, [0026] “buffer layer 2 can be intentionally doped, such as with iron (Fe), carbon (C)”);
providing a backbarrier region (dispersion blocking layer 3) over the buffer region (buffer layer 2) having a thickness in a range of 50-5000 Angstroms (Fig.9, [0027] “less than 500 nm thick, for example, less than 200 nm thick”);
providing a channel region (channel layer 4) over the backbarrier region (dispersion blocking layer 3, Fig.9);
providing a source region (source contact 6) and a drain region (drain contact 9) arranged such that at least a portion of the channel region (channel layer 4) resides between the source region and the drain region (Fig. 9, [0009] “source contact and drain contact are in electrical contact with the 2DEG and the device is a depletion mode FET”); and
providing a gate contact (gate contact 7) over the channel region (channel layer 4) and between the source region (source contact 6) and the drain region (drain contact 9, Fig.9).
Mishra does not disclose the exact claimed thickness of the backbarrier region to be in a range of 50 to 5000 Angstroms, but teaches a range of less than 500nm [5000 Angstroms]. A prima facie case of obviousness exists where the claimed ranges or amounts “overlap or lie inside ranges disclosed by the prior art”. See MPEP 2144.05. Mishra states that a thin layer allows for intentional doping which prevents electrons from getting trapped in the buffer layer reducing electron injection and trapping (Mishra, [0027]).
Mishra does not explicitly teach: at a concentration: at a concentration in a range of 5 X 1016 cm-3 to 1 X 1018 cm-3. Mishra discloses doping a buffer layer 2 [buffer region] with carbon, but fails to include the concentration at which it was doped at.
However, in an analogous art, Torabi teaches: of 5 X 1016 cm-3 to 1 X 1018 cm-3 ([0037] “a beryllium dopant having a doping concentration in a range of 5×1016 to 3×1019 atoms/cm3; and, a carbon dopant having a doping concentration less than the doping concentration of the beryllium, but higher than 1×1016 atoms/cm3”); A prima facie case of obviousness exists where the claimed ranges or amounts “overlap or lie inside ranges disclosed by the prior art”. See MPEP 2144.05. Torabi discloses that levels higher than the doping concentrations provided would result in significant degradation of the GaN crystal quality and results in higher levels of off state leakage and current collapse ([0011], [0020]).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the instant application to apply the teaching of Torabi to modify Mishra. One would be motivated to do so as the concentration range given by Torabi prevents the dopants from acting as high levels of long-lived traps which reduces the current collapse and keeps the off-state leakage at a low and manageable level (Torabi, [0023]).
Claim(s) 22 is/are rejected under 35 U.S.C 103 as being unpatentable over Mishra/Torabi as applied to claims 1-21 above, and further in view of Zhao et al. (US 20050014473 A1); hereinafter Zhao.
As to Claim 22, Mishra/Torabi teaches: comprises a field effect transistor (Mishra, Fig. 9) comprising:
a substrate (substrate 1);
a buffer region (buffer layer 2) over the substrate (substrate 1) and doped with a deep acceptor (Fig.9, [0026] “buffer layer 2 can be intentionally doped, such as with iron (Fe), carbon (C)”);
a backbarrier region (dispersion blocking layer 3) over the buffer region (buffer layer 2) having a thickness in a range of 50 to 5000 Angstroms (Fig.9, [0027] “less than 500 nm thick, for example, less than 200 nm thick”);
a channel region (channel layer 4) over the backbarrier region (dispersion blocking layer 3, Fig.9);
a source region (source contact 6) and a drain region (drain contact 9) arranged such that at least a portion of the channel
region (channel layer 4) resides between the source region and the drain region (Fig. 9. [0009] “source contact and drain contact are in electrical contact with the 2DEG and the device is a depletion mode FET”; and
a gate contact (gate contact 7) over the channel region (channel layer 4) and between the source region (source contact 6) and the drain region (drain contact 9, Fig.9).
Mishra does not explicitly teach: at a concentration in a range of 1 X 1016 cm-3 to 1 X 1019 cm-3 ; Mishra discloses doping a buffer layer 2 [buffer region] with carbon, but fails to include the concentration at which it was doped at.
However, in an analogous art, Torabi teaches: at a concentration in a range of 1 X 1016 cm-3 to 1 X 1019 cm-3 ([0037] “a beryllium dopant having a doping concentration in a range of 5×1016 to 3×1019 atoms/cm3; and, a carbon dopant having a doping concentration less than the doping concentration of the beryllium, but higher than 1×1016 atoms/cm3”); A prima facie case of obviousness exists where the claimed ranges or amounts “overlap or lie inside ranges disclosed by the prior art”. See MPEP 2144.05. Torabi discloses that levels higher than the doping concentrations provided would result in significant degradation of the GaN crystal quality and results in higher levels of off state leakage and current collapse ([0011], [0020]).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the instant application to apply the teaching of Torabi to modify Mishra. One would be motivated to do so as the concentration range given by Torabi prevents the dopants from acting as high levels of long-lived traps which reduces the current collapse and keeps the off-state leakage at a low and manageable level (Torabi, [0023]).
However, Mishra as modified by Torabi, does not explicitly teach: A user element ([001] “wireless communication systems”) comprising transmit and receive circuitry wherein at least one of the transmit and receive circuitry comprises a field effect transistor comprising: Mishra/Torabi do teach a field effect transistor (Mishra, Fig.9; Torabi, Fig. 3C) specifically a High Electron Mobility transistor. Mishra also teaches the advantages of HEMTs for high power electronics including a larger bandgap and low thermal generation current (Mishra, [0002]).
In an analogous art, Zhao teaches: A user element ([001] “wireless communication systems”) comprising transmit (transmitter port 3) and receive circuitry (receiver port 8) wherein at least one of the transmit and receive circuitry comprises a field effect transistor (Fig. 1, FET 5) comprising:
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the instant application to apply the teaching of Zhao to the field effect transistor device as taught by Mishra/Torabi. One would be motivated to do so as HEMT switches allow for high power, low insertion loss, and low distortion performance in wireless communication systems (Zhao, Abstract).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mashal Ahmed whose telephone number is (571)270-1754. The examiner can normally be reached M-F, 9AM to 5 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William (Blake) Partridge can be reached at (571) 270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/MASHAL AHMED/Examiner, Art Unit 2812
/William B Partridge/Supervisory Patent Examiner, Art Unit 2812
Prosecution Insights